diff --git a/.gitattributes b/.gitattributes
new file mode 100644
index 0000000000000000000000000000000000000000..f04fdab1f16f553ed277bbadfdd87b0cd8f6fbeb
--- /dev/null
+++ b/.gitattributes
@@ -0,0 +1,14 @@
+# Auto detect text files and perform LF normalization
+* text=auto
+
+
+# Denote all files that are truly binary and should not be modified.
+*.png binary
+*.jpg binary
+*.hex binary
+*.zip binary
+*.sch binary
+*.brd binary
+*.epf binary
+*.lbr binary
+*.deb binary
diff --git a/AstroEQ-Bootloader/optiboot_atmega162.hex b/AstroEQ-Bootloader/optiboot_atmega162.hex
index 9c2d7e1d356bdb6011d4ae033a07d24aa48e4aa5..b2f7741215549be311d374de93632e60d2c3de70 100644
Binary files a/AstroEQ-Bootloader/optiboot_atmega162.hex and b/AstroEQ-Bootloader/optiboot_atmega162.hex differ
diff --git a/AstroEQ-ConfigUtility/hex/AstroEQATMega162Based(Legacy).hex b/AstroEQ-ConfigUtility/hex/AstroEQATMega162Based(Legacy).hex
index 21bfd9a40eaedb1542a45cb20107300c55cb250d..7bc538bfd3fc40340b00f928908d7421c4d95c7d 100644
Binary files a/AstroEQ-ConfigUtility/hex/AstroEQATMega162Based(Legacy).hex and b/AstroEQ-ConfigUtility/hex/AstroEQATMega162Based(Legacy).hex differ
diff --git a/AstroEQ-ConfigUtility/hex/AstroEQATMega162Based(Legacy)EEPROMReader.hex b/AstroEQ-ConfigUtility/hex/AstroEQATMega162Based(Legacy)EEPROMReader.hex
index ee837981584a8f8b94f6707860901b75ae5926c0..ad1aa4fd6481b2b39821f41790272b81eeccf6be 100644
Binary files a/AstroEQ-ConfigUtility/hex/AstroEQATMega162Based(Legacy)EEPROMReader.hex and b/AstroEQ-ConfigUtility/hex/AstroEQATMega162Based(Legacy)EEPROMReader.hex differ
diff --git a/AstroEQ-ConfigUtility/hex/AstroEQArduinoMega1280(Legacy).hex b/AstroEQ-ConfigUtility/hex/AstroEQArduinoMega1280(Legacy).hex
index ab805ea8f1a1288a922e97052757517482ce02d0..029ff92d6d341464af5f280ba9601059d2b1d173 100644
Binary files a/AstroEQ-ConfigUtility/hex/AstroEQArduinoMega1280(Legacy).hex and b/AstroEQ-ConfigUtility/hex/AstroEQArduinoMega1280(Legacy).hex differ
diff --git a/AstroEQ-ConfigUtility/hex/AstroEQArduinoMega1280(Legacy)EEPROMReader.hex b/AstroEQ-ConfigUtility/hex/AstroEQArduinoMega1280(Legacy)EEPROMReader.hex
index f2f08ca7c4d6cfe9729dfa94944a1baf8c32c5cb..273c0e8c51f2b3c33c65976bd72a9ed8eaca7084 100644
Binary files a/AstroEQ-ConfigUtility/hex/AstroEQArduinoMega1280(Legacy)EEPROMReader.hex and b/AstroEQ-ConfigUtility/hex/AstroEQArduinoMega1280(Legacy)EEPROMReader.hex differ
diff --git a/AstroEQ-ConfigUtility/hex/AstroEQArduinoMega2560(Legacy).hex b/AstroEQ-ConfigUtility/hex/AstroEQArduinoMega2560(Legacy).hex
index f1d4060f99ed224defc1076c96fba5e0d819c1bf..5cadeaeefe83c7a64624b7a72f720aa88ae2506b 100644
Binary files a/AstroEQ-ConfigUtility/hex/AstroEQArduinoMega2560(Legacy).hex and b/AstroEQ-ConfigUtility/hex/AstroEQArduinoMega2560(Legacy).hex differ
diff --git a/AstroEQ-ConfigUtility/hex/AstroEQArduinoMega2560(Legacy)EEPROMReader.hex b/AstroEQ-ConfigUtility/hex/AstroEQArduinoMega2560(Legacy)EEPROMReader.hex
index ccff4f72070cf70a1ec530e88740f6e9d9a1f42d..c1b2e6bc93255890eca6d762f2e9ea81b69343f6 100644
Binary files a/AstroEQ-ConfigUtility/hex/AstroEQArduinoMega2560(Legacy)EEPROMReader.hex and b/AstroEQ-ConfigUtility/hex/AstroEQArduinoMega2560(Legacy)EEPROMReader.hex differ
diff --git a/AstroEQ-ConfigUtility/hex/AstroEQV4-DIYBoard(includingKits).hex b/AstroEQ-ConfigUtility/hex/AstroEQV4-DIYBoard(includingKits).hex
index 54ab1d1831cc9065572d3f6a84df62dbf63dc198..e5c85febe1e647d0dacbcb7b8f097b625cc76ac5 100644
Binary files a/AstroEQ-ConfigUtility/hex/AstroEQV4-DIYBoard(includingKits).hex and b/AstroEQ-ConfigUtility/hex/AstroEQV4-DIYBoard(includingKits).hex differ
diff --git a/AstroEQ-ConfigUtility/hex/AstroEQV4-DIYBoard(includingKits)EEPROMReader.hex b/AstroEQ-ConfigUtility/hex/AstroEQV4-DIYBoard(includingKits)EEPROMReader.hex
index 00254a11c64e336db644d920f174146b025553f1..54b66465cccc252cc7b9abff1dc20f90bd6f485b 100644
Binary files a/AstroEQ-ConfigUtility/hex/AstroEQV4-DIYBoard(includingKits)EEPROMReader.hex and b/AstroEQ-ConfigUtility/hex/AstroEQV4-DIYBoard(includingKits)EEPROMReader.hex differ
diff --git a/AstroEQ-ConfigUtility/hex/AstroEQV4-EQ5Board.hex b/AstroEQ-ConfigUtility/hex/AstroEQV4-EQ5Board.hex
index 54ab1d1831cc9065572d3f6a84df62dbf63dc198..e5c85febe1e647d0dacbcb7b8f097b625cc76ac5 100644
Binary files a/AstroEQ-ConfigUtility/hex/AstroEQV4-EQ5Board.hex and b/AstroEQ-ConfigUtility/hex/AstroEQV4-EQ5Board.hex differ
diff --git a/AstroEQ-ConfigUtility/hex/AstroEQV4-EQ5BoardEEPROMReader.hex b/AstroEQ-ConfigUtility/hex/AstroEQV4-EQ5BoardEEPROMReader.hex
index 00254a11c64e336db644d920f174146b025553f1..54b66465cccc252cc7b9abff1dc20f90bd6f485b 100644
Binary files a/AstroEQ-ConfigUtility/hex/AstroEQV4-EQ5BoardEEPROMReader.hex and b/AstroEQ-ConfigUtility/hex/AstroEQV4-EQ5BoardEEPROMReader.hex differ
diff --git a/AstroEQ-ConfigUtility/hex/hexNames.txt b/AstroEQ-ConfigUtility/hex/hexNames.txt
index a766f48b6e554bcf49c57a4829cd4cb343925567..c6b2995c3dc93dd42a0d66bd71d999e33d4138f8 100644
--- a/AstroEQ-ConfigUtility/hex/hexNames.txt
+++ b/AstroEQ-ConfigUtility/hex/hexNames.txt
@@ -1,8 +1,8 @@
-AstroEQArduinoMega1280(Legacy)	6.7
-AstroEQArduinoMega2560(Legacy)	6.7
-AstroEQATMega162Based(Legacy)	6.7
-AstroEQV4-EQ5Board	6.7
-AstroEQV4-DIYBoard(includingKits)	6.7
+AstroEQArduinoMega1280(Legacy)	6.8
+AstroEQArduinoMega2560(Legacy)	6.8
+AstroEQATMega162Based(Legacy)	6.8
+AstroEQV4-EQ5Board	6.8
+AstroEQV4-DIYBoard(includingKits)	6.8
 AstroEQArduinoMega1280(Legacy)EEPROMReader	1.2
 AstroEQArduinoMega2560(Legacy)EEPROMReader	1.2
 AstroEQATMega162Based(Legacy)EEPROMReader	1.2
diff --git a/AstroEQ-Firmware/AstroEQ6.ino b/AstroEQ-Firmware/AstroEQ6.ino
index 0391101b0cfc3f9378bb4f71f09547aa0c34ab21..4a9cab9dddad6a891faba5bd62ec7f9ac146a82f 100644
--- a/AstroEQ-Firmware/AstroEQ6.ino
+++ b/AstroEQ-Firmware/AstroEQ6.ino
@@ -9,7 +9,7 @@
  
   Works with EQ5, HEQ5, and EQ6 mounts
  
-  Current Verison: 6.7
+  Current Verison: 6.8
 */
 
 //Only works with ATmega162, and Arduino Mega boards (1280 and 2560)
@@ -522,9 +522,9 @@ void gotoMode(byte axis){
   Serial1.println(synta.cmd.jVal[axis]);
 #endif
   HVal -= decelerationLength;
-  if (axis == RA){
+  /*if (axis == RA){
     HVal += (decelerationLength>>2);
-  }
+  }*/
   gotoPosn[axis] = synta.cmd.jVal[axis] + (synta.cmd.stepDir[axis] * HVal); //current position + relative change - decelleration region
     
 #ifdef DEBUG
@@ -606,8 +606,13 @@ void motorStartRA(unsigned int gotoDeceleration){
   currentMotorSpeed(RA) = startSpeed;
   stopSpeed[RA] = stoppingSpeed;
   interruptCount(RA) = 1;
+  if (encodeDirection[RA]^synta.cmd.dir[RA]) {
+    *digitalPinToPortReg(dirPin[RA]) |= _BV(digitalPinToBit(dirPin[RA]));
+  } else {
+    *digitalPinToPortReg(dirPin[RA]) &= ~_BV(digitalPinToBit(dirPin[RA]));
+  }
   if(synta.cmd.stopped[RA]) { //if stopped, configure timers
-    digitalWrite(dirPin[RA],encodeDirection[RA]^synta.cmd.dir[RA]); //set the direction
+    //digitalWrite(dirPin[RA],encodeDirection[RA]^synta.cmd.dir[RA]); //set the direction
     stepIncrementRepeat[RA] = 0;
     distributionSegment(RA) = 0;
     int* decelerationSteps = (int*)&decelerationStepsLow(RA); //low and high are in sequential registers so we can treat them as an int in the sram.
@@ -658,8 +663,13 @@ void motorStartDC(unsigned int gotoDeceleration){
   currentMotorSpeed(DC) = startSpeed;
   stopSpeed[DC] = stoppingSpeed;
   interruptCount(DC) = 1;
+  if (encodeDirection[DC]^synta.cmd.dir[DC]) {
+    *digitalPinToPortReg(dirPin[DC]) |= _BV(digitalPinToBit(dirPin[DC]));
+  } else {
+    *digitalPinToPortReg(dirPin[DC]) &= ~_BV(digitalPinToBit(dirPin[DC]));
+  }
   if(synta.cmd.stopped[DC]) { //if stopped, configure timers
-    digitalWrite(dirPin[DC],encodeDirection[DC]^synta.cmd.dir[DC]); //set the direction
+    //digitalWrite(dirPin[DC],encodeDirection[DC]^synta.cmd.dir[DC]); //set the direction
     stepIncrementRepeat[DC] = 0;
     distributionSegment(DC) = 0;
     int* decelerationSteps = (int*)&decelerationStepsLow(DC); //low and high are in sequential registers so we can treat them as an int in the sram.
diff --git a/AstroEQ-Firmware/Open me first/Driver (Atmega162 Version)/AstroEQ USB-Serial.hex b/AstroEQ-Firmware/Open me first/Driver (Atmega162 Version)/AstroEQ USB-Serial.hex
index 038d1a356db71fde4e1f068083fd7ffae8710bdd..0f9878e8746a60458ad5e5a01271d208298b2ba8 100644
Binary files a/AstroEQ-Firmware/Open me first/Driver (Atmega162 Version)/AstroEQ USB-Serial.hex and b/AstroEQ-Firmware/Open me first/Driver (Atmega162 Version)/AstroEQ USB-Serial.hex differ
diff --git a/AstroEQ-Firmware/HardwareSerial.cpp b/AstroEQ-Firmware/Open me first/HardwareSerial.cpp
similarity index 100%
rename from AstroEQ-Firmware/HardwareSerial.cpp
rename to AstroEQ-Firmware/Open me first/HardwareSerial.cpp
diff --git a/AstroEQ-Firmware/HardwareSerial.h b/AstroEQ-Firmware/Open me first/HardwareSerial.h
similarity index 100%
rename from AstroEQ-Firmware/HardwareSerial.h
rename to AstroEQ-Firmware/Open me first/HardwareSerial.h
diff --git a/AstroEQ-Firmware/Open me first/README.txt b/AstroEQ-Firmware/Open me first/README.txt
new file mode 100644
index 0000000000000000000000000000000000000000..c91e87c6d318eb10edfc52432da4253e1aaf0941
--- /dev/null
+++ b/AstroEQ-Firmware/Open me first/README.txt	
@@ -0,0 +1,18 @@
+Replace the following two files:
+
+HardwareSerial.h
+HardwareSerial.cpp
+
+In the directory:
+
+<arduino install>\hardware\arduino\cores\arduino\
+
+--------------------------------------
+
+Replace the following file:
+
+iom162.h
+
+In the directory:
+
+<arduino install>\hardware\tools\avr\avr\include\avr\
\ No newline at end of file
diff --git a/AstroEQ-Firmware/Open me first/iom162.h b/AstroEQ-Firmware/Open me first/iom162.h
new file mode 100644
index 0000000000000000000000000000000000000000..0a95150c8228c6f9871b0318dc68c8c624c22f96
--- /dev/null
+++ b/AstroEQ-Firmware/Open me first/iom162.h	
@@ -0,0 +1,951 @@
+/* Copyright (c) 2002, Nils Kristian Strom <nilsst@omegav.ntnu.no>
+   All rights reserved.
+
+   Redistribution and use in source and binary forms, with or without
+   modification, are permitted provided that the following conditions are met:
+
+   * Redistributions of source code must retain the above copyright
+     notice, this list of conditions and the following disclaimer.
+
+   * Redistributions in binary form must reproduce the above copyright
+     notice, this list of conditions and the following disclaimer in
+     the documentation and/or other materials provided with the
+     distribution.
+
+   * Neither the name of the copyright holders nor the names of
+     contributors may be used to endorse or promote products derived
+     from this software without specific prior written permission.
+
+  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+  AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+  IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+  ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+  LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+  CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+  SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+  INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+  CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+  ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+  POSSIBILITY OF SUCH DAMAGE. */
+
+/* $Id: iom162.h,v 1.13.2.5 2008/10/17 23:27:47 arcanum Exp $ */
+
+/* iom162.h - definitions for ATmega162 */
+
+#ifndef _AVR_IOM162_H_
+#define _AVR_IOM162_H_ 1
+
+/* This file should only be included from <avr/io.h>, never directly. */
+
+#ifndef _AVR_IO_H_
+#  error "Include <avr/io.h> instead of this file."
+#endif
+
+#ifndef _AVR_IOXXX_H_
+#  define _AVR_IOXXX_H_ "iom162.h"
+#else
+#  error "Attempt to include more than one <avr/ioXXX.h> file."
+#endif 
+
+/* Memory mapped I/O registers */
+
+/* Timer/Counter3 Control Register A */
+#define TCCR3A	_SFR_MEM8(0x8B)
+
+/* Timer/Counter3 Control Register B */
+#define TCCR3B	_SFR_MEM8(0x8A)
+
+/* Timer/Counter3 - Counter Register */
+#define TCNT3H	_SFR_MEM8(0x89)
+#define TCNT3L	_SFR_MEM8(0x88)
+#define TCNT3	_SFR_MEM16(0x88)
+
+/* Timer/Counter3 - Output Compare Register A */
+#define OCR3AH	_SFR_MEM8(0x87)
+#define OCR3AL	_SFR_MEM8(0x86)
+#define OCR3A	_SFR_MEM16(0x86)
+
+/* Timer/Counter3 - Output Compare Register B */
+#define OCR3BH	_SFR_MEM8(0x85)
+#define OCR3BL	_SFR_MEM8(0x84)
+#define OCR3B	_SFR_MEM16(0x84)
+
+/* Timer/Counter3 - Input Capture Register */
+#define ICR3H	_SFR_MEM8(0x81)
+#define ICR3L	_SFR_MEM8(0x80)
+#define ICR3	_SFR_MEM16(0x80)
+
+/* Extended Timer/Counter Interrupt Mask */
+#define ETIMSK	_SFR_MEM8(0x7D)
+
+/* Extended Timer/Counter Interrupt Flag Register */
+#define ETIFR	_SFR_MEM8(0x7C)
+
+/* Pin Change Mask Register 1 */
+#define PCMSK1	_SFR_MEM8(0x6C)
+
+/* Pin Change Mask Register 0 */
+#define PCMSK0	_SFR_MEM8(0x6B)
+
+/* Clock PRescale */
+#define CLKPR	_SFR_MEM8(0x61)
+
+
+/* Standard I/O registers */
+
+/* 0x3F SREG */
+/* 0x3D..0x3E SP */
+#define	UBRR1H  _SFR_IO8(0x3C)  /* USART 1 Baud Rate Register High Byte, Shared with UCSR1C */
+#define UCSR1C  _SFR_IO8(0x3C)  /* USART 1 Control and Status Register, Shared with UBRR1H */
+#define GICR    _SFR_IO8(0x3B)	/* General Interrupt Control Register */
+#define GIFR	_SFR_IO8(0x3A)	/* General Interrupt Flag Register */
+#define TIMSK	_SFR_IO8(0x39)	/* Timer Interrupt Mask */
+#define TIFR	_SFR_IO8(0x38)	/* Timer Interrupt Flag Register */
+#define SPMCR	_SFR_IO8(0x37)	/* Store Program Memory Control Register */
+#define EMCUCR	_SFR_IO8(0x36)	/* Extended MCU Control Register */
+#define MCUCR	_SFR_IO8(0x35)	/* MCU Control Register */
+#define MCUCSR	_SFR_IO8(0x34)	/* MCU Control and Status Register */
+#define TCCR0	_SFR_IO8(0x33)	/* Timer/Counter 0 Control Register */
+#define TCNT0	_SFR_IO8(0x32)	/* TImer/Counter 0 */
+#define OCR0	_SFR_IO8(0x31)	/* Output Compare Register 0 */
+#define SFIOR	_SFR_IO8(0x30)	/* Special Function I/O Register */
+#define TCCR1A	_SFR_IO8(0x2F)	/* Timer/Counter 1 Control Register A */
+#define TCCR1B	_SFR_IO8(0x2E)	/* Timer/Counter 1 Control Register A */
+#define TCNT1H	_SFR_IO8(0x2D)	/* Timer/Counter 1 High Byte */
+#define TCNT1L	_SFR_IO8(0x2C)	/* Timer/Counter 1 Low Byte */
+#define TCNT1	_SFR_IO16(0x2C)	/* Timer/Counter 1 */
+#define OCR1AH	_SFR_IO8(0x2B)	/* Timer/Counter 1 Output Compare Register A High Byte */
+#define OCR1AL	_SFR_IO8(0x2A)  /* Timer/Counter 1 Output Compare Register A Low Byte */
+#define OCR1A	_SFR_IO16(0x2A) /* Timer/Counter 1 Output Compare Register A */
+#define OCR1BH	_SFR_IO8(0x29)	/* Timer/Counter 1 Output Compare Register B High Byte */
+#define OCR1BL	_SFR_IO8(0x28)	/* Timer/Counter 1 Output Compare Register B Low Byte */
+#define OCR1B	_SFR_IO16(0x28)	/* Timer/Counter 1 Output Compare Register B */
+#define TCCR2	_SFR_IO8(0x27)	/* Timer/Counter 2 Control Register */
+#define ASSR	_SFR_IO8(0x26)	/* Asynchronous Status Register */
+#define ICR1H	_SFR_IO8(0x25)	/* Input Capture Register 1 High Byte */
+#define ICR1L	_SFR_IO8(0x24)	/* Input Capture Register 1 Low Byte */
+#define ICR1	_SFR_IO16(0x24)	/* Input Capture Register 1 */
+#define TCNT2	_SFR_IO8(0x23)	/* Timer/Counter 2 */
+#define OCR2	_SFR_IO8(0x22)	/* Timer/Counter 2 Output Compare Register */
+#define WDTCR	_SFR_IO8(0x21)	/* Watchdow Timer Control Register */
+#define UBRR0H	_SFR_IO8(0x20)	/* USART 0 Baud-Rate Register High Byte, Shared with UCSR0C */
+#define UCSR0C	_SFR_IO8(0x20)	/* USART 0 Control and Status Register C, Shared with UBRR0H */
+#define EEARH	_SFR_IO8(0x1F)  /* EEPROM Address Register High Byte */
+#define EEARL	_SFR_IO8(0x1E)  /* EEPROM Address Register Low Byte */
+#define EEAR	_SFR_IO16(0x1E) /* EEPROM Address Register */
+#define EEDR	_SFR_IO8(0x1D)  /* EEPROM Data Register */
+#define EECR	_SFR_IO8(0x1C)  /* EEPROM Control Register */
+#define PORTA	_SFR_IO8(0x1B)	/* Port A */
+#define DDRA	_SFR_IO8(0x1A)	/* Port A Data Direction Register */
+#define PINA	_SFR_IO8(0x19)	/* Port A Pin Register */
+#define PORTB	_SFR_IO8(0x18)	/* Port B */
+#define DDRB	_SFR_IO8(0x17)	/* Port B Data Direction Register */
+#define PINB	_SFR_IO8(0x16)	/* Port B Pin Register */
+#define PORTC	_SFR_IO8(0x15)	/* Port C */
+#define DDRC	_SFR_IO8(0x14)	/* Port C Data Direction Register */
+#define PINC	_SFR_IO8(0x13)	/* Port C Pin Register */
+#define PORTD	_SFR_IO8(0x12)	/* Port D */
+#define DDRD	_SFR_IO8(0x11)	/* Port D Data Direction Register */
+#define PIND	_SFR_IO8(0x10)	/* Port D Pin Register */
+#define SPDR	_SFR_IO8(0x0F)  /* SPI Data Register */
+#define SPSR	_SFR_IO8(0x0E)	/* SPI Status Register */
+#define SPCR	_SFR_IO8(0x0D)	/* SPI Control Register */
+#define UDR0	_SFR_IO8(0x0C)	/* USART 0 Data Register */
+#define UCSR0A	_SFR_IO8(0x0B)	/* USART 0 Control and Status Register A */
+#define UCSR0B	_SFR_IO8(0x0A)	/* USART 0 Control and Status Register B */
+#define UBRR0L	_SFR_IO8(0x09)	/* USART 0 Baud-Rate Register Low Byte */
+#define ACSR	_SFR_IO8(0x08)	/* Analog Comparator Status Register */
+#define PORTE	_SFR_IO8(0x07)	/* Port E */
+#define DDRE	_SFR_IO8(0x06)	/* Port E Data Direction Register */
+#define PINE	_SFR_IO8(0x05)	/* Port E Pin Register */
+#define OSCCAL	_SFR_IO8(0x04) 	/* Oscillator Calibration, Shared with OCDR */
+#define OCDR	_SFR_IO8(0x04) 	/* On-Chip Debug Register, Shared with OSCCAL */
+#define UDR1	_SFR_IO8(0x03)	/* USART 1 Data Register */
+#define UCSR1A	_SFR_IO8(0x02)	/* USART 1 Control and Status Register A */
+#define UCSR1B	_SFR_IO8(0x01)	/* USART 1 Control and Status Register B */
+#define	UBRR1L  _SFR_IO8(0x00)  /* USART 0 Baud Rate Register High Byte */
+ 
+
+/* Interrupt vectors (byte addresses) */
+
+/* External Interrupt Request 0 */
+#define INT0_vect			_VECTOR(1)
+#define SIG_INTERRUPT0			_VECTOR(1)
+
+/* External Interrupt Request 1 */
+#define INT1_vect			_VECTOR(2)
+#define SIG_INTERRUPT1			_VECTOR(2)
+
+/* External Interrupt Request 2 */
+#define INT2_vect			_VECTOR(3)
+#define SIG_INTERRUPT2			_VECTOR(3)
+
+/* Pin Change Interrupt Request 0 */
+#define PCINT0_vect			_VECTOR(4)
+#define SIG_PIN_CHANGE0			_VECTOR(4)
+
+/* Pin Change Interrupt Request 1 */
+#define PCINT1_vect			_VECTOR(5)
+#define SIG_PIN_CHANGE1			_VECTOR(5)
+
+/* Timer/Counter3 Capture Event */
+#define TIMER3_CAPT_vect		_VECTOR(6)
+#define SIG_INPUT_CAPTURE3		_VECTOR(6)
+
+/* Timer/Counter3 Compare Match A */
+#define TIMER3_COMPA_vect		_VECTOR(7)
+#define SIG_OUTPUT_COMPARE3A		_VECTOR(7)
+
+/* Timer/Counter3 Compare Match B */
+#define TIMER3_COMPB_vect		_VECTOR(8)
+#define SIG_OUTPUT_COMPARE3B		_VECTOR(8)
+
+/* Timer/Counter3 Overflow */
+#define TIMER3_OVF_vect			_VECTOR(9)
+#define SIG_OVERFLOW3			_VECTOR(9)
+
+/* Timer/Counter2 Compare Match */
+#define TIMER2_COMP_vect		_VECTOR(10)
+#define SIG_OUTPUT_COMPARE2		_VECTOR(10)
+
+/* Timer/Counter2 Overflow */
+#define TIMER2_OVF_vect			_VECTOR(11)
+#define SIG_OVERFLOW2			_VECTOR(11)
+
+/* Timer/Counter1 Capture Event */
+#define TIMER1_CAPT_vect		_VECTOR(12)
+#define SIG_INPUT_CAPTURE1		_VECTOR(12)
+
+/* Timer/Counter1 Compare Match A */
+#define TIMER1_COMPA_vect		_VECTOR(13)
+#define SIG_OUTPUT_COMPARE1A		_VECTOR(13)
+
+/* Timer/Counter Compare Match B */
+#define TIMER1_COMPB_vect		_VECTOR(14)
+#define SIG_OUTPUT_COMPARE1B		_VECTOR(14)
+
+/* Timer/Counter1 Overflow */
+#define TIMER1_OVF_vect			_VECTOR(15)
+#define SIG_OVERFLOW1			_VECTOR(15)
+
+/* Timer/Counter0 Compare Match */
+#define TIMER0_COMP_vect		_VECTOR(16)
+#define SIG_OUTPUT_COMPARE0		_VECTOR(16)
+
+/* Timer/Counter0 Overflow */
+#define TIMER0_OVF_vect			_VECTOR(17)
+#define SIG_OVERFLOW0			_VECTOR(17)
+
+/* SPI Serial Transfer Complete */
+#define SPI_STC_vect			_VECTOR(18)
+#define SIG_SPI				_VECTOR(18)
+
+/* USART0, Rx Complete */
+#define USART0_RX_vect			_VECTOR(19)
+#define SIG_USART0_RECV			_VECTOR(19)
+
+/* USART1, Rx Complete */
+#define USART1_RX_vect			_VECTOR(20)
+#define SIG_USART1_RECV			_VECTOR(20)
+
+/* USART0 Data register Empty */
+#define USART0_UDRE_vect		_VECTOR(21)
+#define SIG_USART0_DATA			_VECTOR(21)
+
+/* USART1, Data register Empty */
+#define USART1_UDRE_vect		_VECTOR(22)
+#define SIG_USART1_DATA			_VECTOR(22)
+
+/* USART0, Tx Complete */
+#define USART0_TX_vect			_VECTOR(23)
+#define SIG_USART0_TRANS		_VECTOR(23)
+
+/* USART1, Tx Complete */
+#define USART1_TX_vect			_VECTOR(24)
+#define SIG_USART1_TRANS		_VECTOR(24)
+
+/* EEPROM Ready */
+#define EE_RDY_vect			_VECTOR(25)
+#define SIG_EEPROM_READY		_VECTOR(25)
+
+/* Analog Comparator */
+#define ANA_COMP_vect			_VECTOR(26)
+#define SIG_COMPARATOR			_VECTOR(26)
+
+/* Store Program Memory Read */
+#define SPM_RDY_vect			_VECTOR(27)
+#define SIG_SPM_READY			_VECTOR(27)
+
+#define _VECTORS_SIZE 112 /* = (num vec+1) * 4 */
+
+
+
+
+
+/* TCCR3B bit definitions, memory mapped I/O */
+
+#define ICNC3	7
+#define ICES3	6
+#define WGM33	4
+#define WGM32	3
+#define CS32	2
+#define CS31	1
+#define CS30	0
+
+
+
+/* TCCR3A bit definitions, memory mapped I/O */
+
+#define COM3A1	7
+#define COM3A0	6
+#define COM3B1	5
+#define COM3B0	4
+#define FOC3A	3
+#define FOC3B	2
+#define WGM31	1
+#define WGM30	0
+
+
+
+/* ETIMSK bit definitions, memory mapped I/O */
+
+#define TICIE3		5
+#define OCIE3A		4
+#define OCIE3B		3
+#define TOIE3		2
+
+
+
+/* ETIFR bit definitions, memory mapped I/O */
+
+#define ICF3		5
+#define OCF3A		4
+#define OCF3B		3
+#define TOV3		2
+
+
+
+/* PCMSK1 bit definitions, memory mapped I/O */
+#define PCINT15	7
+#define PCINT14	6
+#define PCINT13	5
+#define PCINT12	4
+#define PCINT11	3
+#define PCINT10	2
+#define PCINT9	1
+#define PCINT8	0
+
+
+
+/* PCMSK0 bit definitions, memory mapped I/O */
+
+#define PCINT7	7
+#define PCINT6	6
+#define PCINT5	5
+#define PCINT4	4
+#define PCINT3	3
+#define PCINT2	2
+#define PCINT1	1
+#define PCINT0	0
+
+
+
+/* CLKPR bit definitions, memory mapped I/O */
+
+#define CLKPCE	7
+#define CLKPS3	3
+#define CLKPS2	2
+#define CLKPS1	1
+#define CLKPS0	0
+
+
+
+/* SPH bit definitions */
+
+#define SP15	15
+#define SP14	14
+#define SP13	13
+#define SP12	12
+#define SP11	11
+#define SP10	10
+#define SP9	9
+#define SP8	8
+
+
+
+/* SPL bit definitions */
+
+#define SP7	7
+#define SP6	6
+#define SP5	5
+#define SP4	4
+#define SP3	3
+#define SP2	2
+#define SP1	1
+#define SP0	0
+
+
+
+/* UBRR1H bit definitions */
+
+#define URSEL1	7
+#define UBRR111	3
+#define UBRR110	2
+#define UBRR19	1
+#define UBRR18	0
+
+
+
+/* UCSR1C bit definitions */
+
+#define URSEL1	7
+#define UMSEL1	6
+#define UPM11	5
+#define UPM10	4
+#define USBS1	3
+#define UCSZ11	2
+#define UCSZ10	1
+#define UCPOL1	0
+
+
+
+/* GICR bit definitions */
+
+#define INT1	7
+#define INT0	6
+#define INT2	5
+#define PCIE1	4
+#define PCIE0	3
+#define IVSEL	1
+#define IVCE	0
+
+
+
+/* GIFR bit definitions */
+
+#define INTF1	7
+#define INTF0	6
+#define INTF2	5
+#define PCIF1	4
+#define PCIF0	3
+
+
+
+/* TIMSK bit definitions */
+
+#define TOIE1	7
+#define OCIE1A	6
+#define OCIE1B  5
+#define OCIE2	4
+#define TICIE1	3
+#define TOIE2	2
+#define TOIE0	1
+#define OCIE0	0
+
+
+
+/* TIFR bit definitions */
+
+#define TOV1	7
+#define OCF1A	6
+#define OCF1B	5
+#define OCF2	4
+#define ICF1	3
+#define TOV2	2
+#define TOV0	1
+#define OCF0	0
+
+
+
+/* SPMCR bit definitions */ 
+
+#define SPMIE	7
+#define RWWSB	6
+#define RWWSRE	4
+#define BLBSET	3
+#define PGWRT	2
+#define PGERS	1
+#define SPMEN	0
+
+
+
+/* EMCUCR bit definitions */
+
+#define SM0	7
+#define SRL2	6
+#define SRL1	5
+#define SRL0	4
+#define SRW01	3
+#define SRW00	2
+#define SRW11	1
+#define ISC2	0
+
+
+
+/* MCUCR bit definitions */
+
+#define SRE	7
+#define SRW10	6
+#define SE	5
+#define SM1	4
+#define ISC11	3
+#define ISC10	2
+#define ISC01	1
+#define ISC00	0
+
+
+
+/* MCUCSR bit definitions */
+
+#define JTD	7
+#define SM2	5
+#define JTRF	4
+#define WDRF	3
+#define BORF	2
+#define EXTRF	1
+#define PORF	0
+
+
+
+/* TCCR0 bit definitions */
+
+#define FOC0	7
+#define WGM00	6
+#define COM01	5
+#define COM00	4
+#define WGM01	3
+#define CS02	2
+#define CS01	1
+#define CS00	0
+
+
+
+/* SFIOR bit definitions */
+
+#define TSM	7
+#define XMBK	6
+#define XMM2	5
+#define XMM1	4
+#define XMM0	3
+#define PUD	2
+#define PSR2	1
+#define PSR310	0
+
+
+
+/* TCCR1A bit definitions */
+
+#define COM1A1  7
+#define COM1A0  6
+#define COM1B1  5
+#define COM1B0  4
+#define FOC1A   3
+#define FOC1B   2
+#define WGM11   1
+#define WGM10   0
+
+
+
+
+/* TCCR1B bit definitions */
+
+#define ICNC1	7		/* Input Capture Noise Canceler */
+#define ICES1	6		/* Input Capture Edge Select */
+#define WGM13	4		/* Waveform Generation Mode 3 */
+#define WGM12	3		/* Waveform Generation Mode 2 */
+#define CS12	2		/* Clock Select 2 */
+#define CS11	1		/* Clock Select 1 */
+#define CS10	0		/* Clock Select 0 */
+
+
+
+/* TCCR2 bit definitions */
+
+#define FOC2	7
+#define WGM20	6
+#define COM21	5
+#define COM20	4
+#define WGM21	3
+#define CS22	2
+#define CS21	1
+#define CS20	0
+
+
+
+/* ASSR bit definitions */
+
+#define AS2	3
+#define TCON2UB	2
+#define OCR2UB	1
+#define TCR2UB	0
+
+
+
+/* WDTCR bit definitions */
+
+#define WDCE	4
+#define WDE	3
+#define WDP2	2
+#define WDP1	1
+#define WDP0	0
+
+
+
+/* UBRR0H bif definitions */
+
+#define URSEL0	7
+#define UBRR011	3
+#define UBRR010	2
+#define UBRR09	1
+#define UBRR08	0
+
+
+
+/* UCSR0C bit definitions */
+
+#define URSEL0	7
+#define UMSEL0	6
+#define UPM01	5
+#define UPM00	4
+#define USBS0	3
+#define UCSZ01	2
+#define UCSZ00	1
+#define UCPOL0	0
+
+
+
+/* EEARH bit definitions */
+
+#define EEAR8	0
+
+
+
+/* EECR bit definitions */
+
+#define EERIE	3
+#define EEMWE	2
+#define EEWE	1
+#define EERE	0
+
+
+
+/* PORTA bit definitions */
+
+#define PA7	7
+#define PA6	6
+#define PA5	5
+#define PA4	4
+#define PA3	3
+#define PA2	2
+#define PA1	1
+#define PA0	0
+
+
+
+/* DDRA bit definitions */
+
+#define DDA7	7
+#define DDA6	6
+#define DDA5	5
+#define DDA4	4
+#define DDA3	3
+#define DDA2	2
+#define DDA1	1
+#define DDA0	0
+
+
+
+/* PINA bit definitions */
+
+#define PINA7	7
+#define PINA6	6
+#define PINA5	5
+#define PINA4	4
+#define PINA3	3
+#define PINA2	2
+#define PINA1	1
+#define PINA0	0
+
+
+/* PORTB bit definitions */
+
+#define PB7	7
+#define PB6	6
+#define PB5	5
+#define PB4	4
+#define PB3	3
+#define PB2	2
+#define PB1	1
+#define PB0	0
+
+
+
+/* DDRB bit definitions */
+
+#define DDB7	7
+#define DDB6	6
+#define DDB5	5
+#define DDB4	4
+#define DDB3	3
+#define DDB2	2
+#define DDB1	1
+#define DDB0	0
+
+
+
+/* PINB bit definitions */
+
+#define PINB7	7
+#define PINB6	6
+#define PINB5	5
+#define PINB4	4
+#define PINB3	3
+#define PINB2	2
+#define PINB1	1
+#define PINB0	0
+
+
+
+/* PORTC bit definitions */
+
+#define PC7	 7
+#define PC6	 6
+#define PC5	 5
+#define PC4	 4
+#define PC3	 3
+#define PC2	 2
+#define PC1	 1
+#define PC0	 0
+
+
+
+/* DDRC bit definitions */
+
+#define DDC7	7
+#define DDC6	6
+#define DDC5	5
+#define DDC4	4
+#define DDC3	3
+#define DDC2	2
+#define DDC1	1
+#define DDC0	0
+
+
+
+/* PINC bit definitions */
+
+#define PINC7	7
+#define PINC6	6
+#define PINC5	5
+#define PINC4	4
+#define PINC3	3
+#define PINC2	2
+#define PINC1	1
+#define PINC0	0
+
+
+
+/* PORTD bit definitions */
+
+#define PD7	 7
+#define PD6	 6
+#define PD5	 5
+#define PD4	 4
+#define PD3	 3
+#define PD2	 2
+#define PD1	 1
+#define PD0	 0
+
+
+
+/* DDRD bit definitions */
+
+#define DDD7	7
+#define DDD6	6
+#define DDD5	5
+#define DDD4	4
+#define DDD3	3
+#define DDD2	2
+#define DDD1	1
+#define DDD0	0
+
+
+
+/* PIND bit definitions */
+
+#define PIND7	7
+#define PIND6	6
+#define PIND5	5
+#define PIND4	4
+#define PIND3	3
+#define PIND2	2
+#define PIND1	1
+#define PIND0	0
+
+
+
+/* SPSR bit definitions */
+
+#define SPIF	7
+#define WCOL	6
+#define SPI2X	0
+
+
+
+/* SPCR bit definitions */
+
+#define SPIE	7
+#define SPE	6
+#define DORD	5
+#define MSTR	4
+#define CPOL	3
+#define CPHA	2
+#define SPR1	1
+#define SPR0	0
+
+
+
+/* UCSR0A bit definitions */
+
+#define RXC0	7
+#define TXC0	6
+#define UDRE0	5
+#define FE0	4
+#define DOR0	3
+#define UPE0	2
+#define U2X0	1
+#define MPCM0	0
+
+
+
+/* UCSR0B bit definitions */
+
+#define RXCIE0	7
+#define TXCIE0	6
+#define UDRIE0	5
+#define RXEN0	4
+#define	TXEN0	3
+#define UCSZ02 	2
+#define RXB80	1
+#define TXB80	0
+
+
+
+/* ACSR bit definitions */
+
+#define ACD	7
+#define ACBG	6
+#define ACO	5
+#define ACI	4
+#define ACIE	3
+#define ACIC	2
+#define ACIS1	1
+#define ACIS0	0
+
+
+
+/* PORTE bit definitions */
+
+#define PE2	2
+#define PE1	1
+#define PE0	0
+
+
+
+/* DDRE bit definitions */
+
+#define DDE2	2
+#define DDE1	1
+#define DDE0	0
+
+
+
+/* PINE bit definitions */
+
+#define PINE2	2
+#define PINE1	1
+#define PINE0	0
+
+
+
+/* UCSR1A bit definitions */
+
+#define RXC1	7
+#define TXC1	6
+#define UDRE1	5
+#define FE1	4
+#define DOR1	3
+#define UPE1    2
+#define U2X1	1
+#define MPCM1	0
+
+
+
+/* UCSR1B bit definitions */
+
+#define RXCIE1	7
+#define TXCIE1	6
+#define UDRIE1	5
+#define RXEN1	4
+#define TXEN1	3
+#define UCSZ12	2
+#define RXB81	1
+#define TXB81	0
+
+
+/* Constants */
+#define SPM_PAGESIZE 128
+#define RAMEND		0x4FF
+#define XRAMEND		0xFFFF
+#define E2END		0x1FF
+#define E2PAGESIZE  4
+#define FLASHEND	0x3FFF
+
+
+/* Fuses */
+
+#define FUSE_MEMORY_SIZE 3
+
+/* Low Fuse Byte */
+#define FUSE_CKSEL0      (unsigned char)~_BV(0)
+#define FUSE_CKSEL1      (unsigned char)~_BV(1)
+#define FUSE_CKSEL2      (unsigned char)~_BV(2)
+#define FUSE_CKSEL3      (unsigned char)~_BV(3)
+#define FUSE_SUT0        (unsigned char)~_BV(4)
+#define FUSE_SUT1        (unsigned char)~_BV(5)
+#define FUSE_CKOUT       (unsigned char)~_BV(6)
+#define FUSE_CKDIV8      (unsigned char)~_BV(7)
+#define LFUSE_DEFAULT (FUSE_CKSEL0 & FUSE_CKSEL2 & FUSE_CKSEL3 & FUSE_SUT0 & FUSE_CKDIV8)
+
+/* High Fuse Byte */
+#define FUSE_BOOTRST     (unsigned char)~_BV(0)
+#define FUSE_BOOTSZ0     (unsigned char)~_BV(1)
+#define FUSE_BOOTSZ1     (unsigned char)~_BV(2)
+#define FUSE_EESAVE      (unsigned char)~_BV(3)
+#define FUSE_WDTON       (unsigned char)~_BV(4)
+#define FUSE_SPIEN       (unsigned char)~_BV(5)
+#define FUSE_JTAGEN      (unsigned char)~_BV(6)
+#define FUSE_OCDEN       (unsigned char)~_BV(7)
+#define HFUSE_DEFAULT (FUSE_BOOTSZ0 & FUSE_BOOTSZ1 & FUSE_SPIEN & FUSE_JTAGEN)
+
+/* Extended Fuse Byte */
+#define FUSE_BODLEVEL0   (unsigned char)~_BV(1)
+#define FUSE_BODLEVEL1   (unsigned char)~_BV(2)
+#define FUSE_BODLEVEL2   (unsigned char)~_BV(3)
+#define FUSE_M161C       (unsigned char)~_BV(4)
+#define EFUSE_DEFAULT (0xFF)
+
+
+/* Lock Bits */
+#define __LOCK_BITS_EXIST
+#define __BOOT_LOCK_BITS_0_EXIST
+#define __BOOT_LOCK_BITS_1_EXIST 
+
+
+/* Signature */
+#define SIGNATURE_0 0x1E
+#define SIGNATURE_1 0x94
+#define SIGNATURE_2 0x04
+
+
+#endif  /* _AVR_IOM162_H_ */
diff --git a/AstroEQ-Firmware/README.txt b/AstroEQ-Firmware/README.txt
deleted file mode 100644
index 27a871b022f4a326a6527b2a8a3ee2ce81420336..0000000000000000000000000000000000000000
--- a/AstroEQ-Firmware/README.txt
+++ /dev/null
@@ -1,8 +0,0 @@
-Replace the following two files:
-
-HardwareSerial.h
-HardwareSerial.cpp
-
-In the directory:
-
-<arduino install>\hardware\arduino\cores\arduino
\ No newline at end of file
diff --git a/AstroEQ-Firmware/UnionHelpers.h b/AstroEQ-Firmware/UnionHelpers.h
index 2cdd11ac921cfc5b52f29c2de7b863d8fcb6761d..505c60d2ac36694b56070ff5b4b80f88324776c4 100644
--- a/AstroEQ-Firmware/UnionHelpers.h
+++ b/AstroEQ-Firmware/UnionHelpers.h
@@ -48,6 +48,12 @@ typedef union InterMaker{
   InterMaker(unsigned long _integer){
     integer = _integer;
   }
+  InterMaker(byte _top, byte _high, byte _mid, byte _low){
+    low = _low;
+    mid = _mid;
+    high = _high;
+    top = _top;
+  }
 } Inter;
 
 typedef union{
@@ -58,6 +64,10 @@ typedef union{
     unsigned int high:4;
     unsigned int:4;
   };
+  struct {
+    Nibbler lowNibbler;
+    Nibbler highNibbler;
+  };
 } DoubleNibbler;
 
 #endif
diff --git a/AstroEQ-Firmware/commands.cpp b/AstroEQ-Firmware/commands.cpp
index bbc3ff2b482dd317d6da79a38a3ff26f76b4ec30..124aa0bf780ddd9e78e545925b9ade375ec31b05 100644
--- a/AstroEQ-Firmware/commands.cpp
+++ b/AstroEQ-Firmware/commands.cpp
@@ -90,55 +90,3 @@ char Commands::getLength(char cmd, boolean sendRecieve){
 //  }
 //}
 
-void Commands::setDir(byte target, byte _dir){ //Set Method
-  _dir &= 1;
-  //byte sign = _dir ^ target;
-  //if (sign & 1){
-//  if(_dir){
-//    stepDir[target] = -1; //set step direction
-//  } else {//if (dir == 0){}
-//    stepDir[target] = 1; //set step direction
-//  }
-  dir[target] = _dir; //set direction
-}
-
-void Commands::updateStepDir(byte target){
-  byte _dir = dir[target];
-  if(_dir){
-    stepDir[target] = -1; //set step direction
-  } else {//if (dir == 0){}
-    stepDir[target] = 1; //set step direction
-  }
-}
-
-void Commands::setStopped(byte target, byte _stopped){ //Set Method
-  stopped[target] = _stopped & 1;
-}
-
-void Commands::setGotoEn(byte target, byte _gotoEn){ //Set Method
-  gotoEn[target] = _gotoEn & 1;
-}
-
-void Commands::setFVal(byte target, byte _FVal){ //Set Method
-  FVal[target] = _FVal & 1;
-}
-
-unsigned int Commands::fVal(byte target){ //_fVal: 00ds000g000f
-  return ((dir[target] << 9)|(stopped[target] << 8)|(gotoEn[target] << 4)|(FVal[target] << 0));
-}
-
-void Commands::setjVal(byte target, unsigned long _jVal){ //Set Method
-  jVal[target] = _jVal;
-}
-
-void Commands::setIVal(byte target, unsigned int _IVal){ //Set Method
-  IVal[target] = _IVal;
-}
-
-void Commands::setHVal(byte target, unsigned long _HVal){ //Set Method
-  HVal[target] = _HVal;
-}
-
-void Commands::setGVal(byte target, byte _GVal){ //Set Method
-  GVal[target] = _GVal;
-}
diff --git a/AstroEQ-Firmware/commands.h b/AstroEQ-Firmware/commands.h
index fd2422d700694ba280e3a6dfc966a3237c501b68..4a39a5a05b2286e0b776fc0d32cc7a746aec431e 100644
--- a/AstroEQ-Firmware/commands.h
+++ b/AstroEQ-Firmware/commands.h
@@ -35,16 +35,52 @@
       static const char command[numberOfCommands][3];
       
       //Methods for accessing class variables
-      //void setStepLength(byte target, byte stepLength); //in highspeed mode, one step is gVal increments of the jVal.
-      void updateStepDir(byte target); //Update current direction to match required.
-      void setDir(byte target, byte _dir); //Set Method
-      void setStopped(byte target, byte _stopped); //Set Method
-      void setGotoEn(byte target, byte _gotoEn); //Set Method
-      void setFVal(byte target, byte _FVal); //Set Method
-      void setjVal(byte target, unsigned long _jVal); //Set Method
-      void setIVal(byte target, unsigned int _IVal); //Set Method
-      void setHVal(byte target, unsigned long _HVal); //Set Method
-      void setGVal(byte target, byte _GVal); //Set Method
+      inline void setDir(byte target, byte _dir){ //Set Method
+        _dir &= 1;
+        dir[target] = _dir; //set direction
+      }
+      
+      inline void updateStepDir(byte target){
+        byte _dir = dir[target];
+        if(_dir){
+          stepDir[target] = -1; //set step direction
+        } else {
+          stepDir[target] = 1; //set step direction
+        }
+      }
+
+      inline unsigned int fVal(byte target){ //_fVal: 00ds000g000f; d = dir, s = stopped, g = goto, f = energised
+        return ((dir[target] << 9)|(stopped[target] << 8)|(gotoEn[target] << 4)|(FVal[target] << 0));
+      }
+
+      inline void setStopped(byte target, byte _stopped){ //Set Method
+        stopped[target] = _stopped & 1;
+      }
+      
+      inline void setGotoEn(byte target, byte _gotoEn){ //Set Method
+        gotoEn[target] = _gotoEn & 1;
+      }
+      
+      inline void setFVal(byte target, byte _FVal){ //Set Method
+        FVal[target] = _FVal & 1;
+      }
+      
+      inline void setjVal(byte target, unsigned long _jVal){ //Set Method
+        jVal[target] = _jVal;
+      }
+      
+      inline void setIVal(byte target, unsigned int _IVal){ //Set Method
+        IVal[target] = _IVal;
+      }
+      
+      inline void setHVal(byte target, unsigned long _HVal){ //Set Method
+        HVal[target] = _HVal;
+      }
+      
+      inline void setGVal(byte target, byte _GVal){ //Set Method
+        GVal[target] = _GVal;
+      }
+      
       
       char getLength(char cmd, boolean sendRecieve);
       
@@ -54,7 +90,6 @@
       unsigned int motorSpeed[2]; //speed at which moving. Accelerates to IVal.
       byte GVal[2]; //_GVal: slew/goto mode
       unsigned long HVal[2]; //_HVal: steps to move if in goto mode
-      unsigned int fVal(byte target); //_fVal: 00ds000g000f; d = dir, s = stopped, g = goto, f = energised
       volatile char stepDir[2]; 
       byte dir[2];
       byte FVal[2];
diff --git a/AstroEQ-Firmware/synta.cpp b/AstroEQ-Firmware/synta.cpp
index 00a8f11363e686a7ca8c023975e4879a68d6af70..e36e9923428480616663f5749df879734da76eda 100644
--- a/AstroEQ-Firmware/synta.cpp
+++ b/AstroEQ-Firmware/synta.cpp
@@ -34,17 +34,87 @@ void Synta::clearBuffer(char* buf, byte len){
 //  buf[dataLen + 1] = 0;
 //}
 
+
+
+
+//const char hexLookup[] = {'0','1','2','3','4','5','6','7','8','9','A','B','C','D','E','F'};
+inline void nibbleToHex(char* hex/*, const byte offset*/, byte nibble) {
+//  char hexChar;
+//  asm volatile(
+//    "movw   Y, %1  \n\t"
+//    "add  r28, %2  \n\t"
+//    "adc  r29, r1  \n\t"
+//    "ld    %0, Y   \n\t"
+//    : "=r" (hexChar) //goto selects r18:r21. This adds sts commands for all 4 bytes
+//    : "e" (hexLookup),"r" (nibble)       //stepDir is in r19 to match second byte of goto.
+//    : "r28","r29"
+//  );
+//  hex[offset] = hexChar;
+  if (nibble > 9){
+    nibble += (('A'-'0')-0xA);
+  }
+  *hex = (nibble + '0');
+  //char hexChar = hexLookup[nibble];
+  //hex[offset] = hexChar;
+}
+inline void private_byteToHex(char* lower, char* upper, Nibbler nibbler){
+  nibbleToHex(lower, nibbler.low);
+  nibbleToHex(upper, nibbler.high);
+}
+/*
+inline void longToHex(char* hex, unsigned long data){  
+  Inter inter = Inter(data);
+  private_byteToHex(hex+5,hex+4,inter.highByter.lowNibbler);
+  private_byteToHex(hex+3,hex+2,inter.lowByter.highNibbler);
+  private_byteToHex(hex+1,hex+0,inter.lowByter.lowNibbler);
+  hex[6] = 0;
+}
+
+inline void intToHex(char* hex, unsigned int data){
+  DoubleNibbler nibble = {data};
+  hex[3] = 0;
+  nibbleToHex(hex+2, nibble.low);
+  nibbleToHex(hex+1, nibble.mid);
+  nibbleToHex(hex+0, nibble.high);
+}
+
+inline void byteToHex(char* hex, byte data){
+  Nibbler nibble = {data};
+  hex[2] = 0;
+  private_byteToHex(hex+1,hex+0,nibble);
+}*/
+
+
+
+
 void Synta::assembleResponse(char* dataPacket, char commandOrError, unsigned long responseData){
   char replyLength = cmd.getLength(commandOrError,0); //get the number of data bytes for response
   
   //char tempStr[11];
   if (replyLength == -1) {
+    replyLength++;
     dataPacket[0] = errorChar;  
   } else {
     dataPacket[0] = startOutChar;
+  
+    if (replyLength == 2) {
+      Nibbler nibble = {responseData};
+      private_byteToHex(dataPacket+2,dataPacket+1,nibble);
+    } else if (replyLength == 3) {
+      DoubleNibbler nibble = {responseData};
+      nibbleToHex(dataPacket+3, nibble.low);
+      nibbleToHex(dataPacket+2, nibble.mid);
+      nibbleToHex(dataPacket+1, nibble.high);
+    } else if (replyLength == 6) {
+      Inter inter = Inter(responseData);
+      private_byteToHex(dataPacket+6,dataPacket+5,inter.highByter.lowNibbler);
+      private_byteToHex(dataPacket+4,dataPacket+3,inter.lowByter.highNibbler);
+      private_byteToHex(dataPacket+2,dataPacket+1,inter.lowByter.lowNibbler);
+    }
+  
   }
+  /*
   dataPacket++;
-  
   switch (replyLength){
     case -1:
         //error(dataPacket); //In otherwords, invalid command, so send error
@@ -62,10 +132,10 @@ void Synta::assembleResponse(char* dataPacket, char commandOrError, unsigned lon
     case 6:
         longToHex(dataPacket,responseData);
         break;
-  }
+  }*/
   
-  dataPacket[(byte)replyLength] = endChar;
-  dataPacket[(byte)replyLength + 1] = 0;  
+  dataPacket[(byte)replyLength + 1] = endChar;
+  dataPacket[(byte)replyLength + 2] = 0;  
   //success(dataPacket,tempStr,replyLength + 1); //compile response
   return;
 }
@@ -122,15 +192,18 @@ error:
   return -1;
 }
 
-byte hexToNibbler(char hex) {
+inline byte hexToNibbler(char hex) {
   if (hex > '9'){
     hex -= (('A'-'0')-0xA); //even if hex is lower case (e.g. 'a'), the lower nibble will have the correct value as (('a'-'A')&0x0F) = 0.
   }
   return (hex - '0'); //as we are keeping the lower nibble, the -'0' gets optimised away.
 }
-void hexToByte(char* hex, Nibbler &nibble){
-  nibble.low = hexToNibbler(hex[1]);
-  nibble.high = hexToNibbler(hex[0]);
+inline byte hexToByte(char* hex){
+  //nibble.low = hexToNibbler(hex[1]);
+  //nibble.high = hexToNibbler(hex[0]);
+  Nibbler low = {hexToNibbler(hex[1])};
+  Nibbler high = {hexToNibbler(hex[0])<<4};
+  return ((high.high<<4)|low.low);
 }
 unsigned long Synta::hexToLong(char* hex){
 //  char *boo; //waste point for strtol
@@ -141,54 +214,8 @@ unsigned long Synta::hexToLong(char* hex){
 //  str[6] = 0;
 //  return strtol(str,&boo,16); //convert hex to long integer
 
-  Inter inter = Inter(0); //create a blank inter 
-  hexToByte(hex+4,inter.highByter.lowNibbler);
-  hexToByte(hex+2,inter.lowByter.highNibbler);
-  hexToByte(hex,inter.lowByter.lowNibbler);
-  return inter.integer;
-}
-
-const char hexLookup[] = {'0','1','2','3','4','5','6','7','8','9','A','B','C','D','E','F'};
-void nibbleToHex(char* hex, byte offset, byte nibble) {
-//  char hexChar;
-//  asm volatile(
-//    "movw   Y, %1  \n\t"
-//    "add  r28, %2  \n\t"
-//    "adc  r29, r1  \n\t"
-//    "ld    %0, Y   \n\t"
-//    : "=r" (hexChar) //goto selects r18:r21. This adds sts commands for all 4 bytes
-//    : "e" (hexLookup),"r" (nibble)       //stepDir is in r19 to match second byte of goto.
-//    : "r28","r29"
-//  );
-//  hex[offset] = hexChar;
-  char hexChar = hexLookup[nibble];
-  hex[offset] = hexChar;
-}
-void private_byteToHex(char* hex, Nibbler nibbler){
-  nibbleToHex(hex,1, nibbler.low);
-  nibbleToHex(hex,0, nibbler.high);
-}
-
-void Synta::longToHex(char* hex, unsigned long data){  
-  Inter inter = Inter(data);
-  private_byteToHex(hex+4,inter.highByter.lowNibbler);
-  private_byteToHex(hex+2,inter.lowByter.highNibbler);
-  private_byteToHex(hex,inter.lowByter.lowNibbler);
-  hex[6] = 0;
-}
-
-void Synta::intToHex(char* hex, unsigned int data){
-  DoubleNibbler nibble = {data};
-  hex[3] = 0;
-  nibbleToHex(hex,2, nibble.low);
-  nibbleToHex(hex,1, nibble.mid);
-  nibbleToHex(hex,0, nibble.high);
-}
-
-void Synta::byteToHex(char* hex, byte data){
-  Nibbler nibble = {data};
-  hex[2] = 0;
-  private_byteToHex(hex,nibble);
+  Inter inter = Inter(0,hexToByte(hex+4),hexToByte(hex+2),hexToByte(hex)); //create an inter 
+  return inter.integer; //and convert it to an integer
 }
 
 char Synta::command(){
diff --git a/AstroEQ-Firmware/synta.h b/AstroEQ-Firmware/synta.h
index b45d85d8d578f9f8040aa3cff53c12af7e75c4fe..993c0af5c0fb8f65db4fec6d9602cec7b98cdb57 100644
--- a/AstroEQ-Firmware/synta.h
+++ b/AstroEQ-Firmware/synta.h
@@ -25,9 +25,9 @@
       char command(); //make current command readonly to outside world.
       
       unsigned long hexToLong(char* hex);
-      void longToHex(char* hex, unsigned long data);
-      void intToHex(char* hex, unsigned int data);
-      void byteToHex(char* hex, byte data);
+      //void longToHex(char* hex, unsigned long data);
+      //void intToHex(char* hex, unsigned int data);
+      //void byteToHex(char* hex, byte data);
       
       //byte scalar[2];
     
diff --git a/AstroEQ-Hardware/DIY/AstroEQ DIY Etch.brd b/AstroEQ-Hardware/DIY/AstroEQ DIY Etch.brd
index 36c5100c3d92cf916781e3710bb145ae1a2d0faf..56a413001d8051ee2e3efaeb3721f6b42cc91e1f 100644
Binary files a/AstroEQ-Hardware/DIY/AstroEQ DIY Etch.brd and b/AstroEQ-Hardware/DIY/AstroEQ DIY Etch.brd differ
diff --git a/AstroEQ-Hardware/DIY/AstroEQ DIY Etch.sch b/AstroEQ-Hardware/DIY/AstroEQ DIY Etch.sch
index 1df37240dab159ed3dffb0b1ce174c1b7d375238..62137914d30fb2cda21c90333e74279d97560d2d 100644
Binary files a/AstroEQ-Hardware/DIY/AstroEQ DIY Etch.sch and b/AstroEQ-Hardware/DIY/AstroEQ DIY Etch.sch differ
diff --git a/AstroEQ-Hardware/PTH/AstroEQ PTH MK2.brd b/AstroEQ-Hardware/PTH/AstroEQ PTH MK3.brd
similarity index 71%
rename from AstroEQ-Hardware/PTH/AstroEQ PTH MK2.brd
rename to AstroEQ-Hardware/PTH/AstroEQ PTH MK3.brd
index a0b2eef65ac183858fbe6fdd44fbee2392ec45ce..3188381d895b81357aa2e238baf0053962c1a23a 100644
Binary files a/AstroEQ-Hardware/PTH/AstroEQ PTH MK2.brd and b/AstroEQ-Hardware/PTH/AstroEQ PTH MK3.brd differ
diff --git a/AstroEQ-Hardware/PTH/AstroEQ PTH MK2.sch b/AstroEQ-Hardware/PTH/AstroEQ PTH MK3.sch
similarity index 79%
rename from AstroEQ-Hardware/PTH/AstroEQ PTH MK2.sch
rename to AstroEQ-Hardware/PTH/AstroEQ PTH MK3.sch
index 53f0b7a99d9da7eda770ab67f9343a0e74778c39..c468ec6abd2a9d3871e08dacc192c0fa298545be 100644
Binary files a/AstroEQ-Hardware/PTH/AstroEQ PTH MK2.sch and b/AstroEQ-Hardware/PTH/AstroEQ PTH MK3.sch differ
diff --git a/AstroEQ-Hardware/PTH/AstroEQ-PTH-Gerber.zip b/AstroEQ-Hardware/PTH/AstroEQ-PTH-Gerber.zip
index 13c5e38a39835f07bd15e362a1e60928b31b22b8..fd4610e6d1778b0d4cc6bfdeb099c79fb783b9ca 100644
Binary files a/AstroEQ-Hardware/PTH/AstroEQ-PTH-Gerber.zip and b/AstroEQ-Hardware/PTH/AstroEQ-PTH-Gerber.zip differ
diff --git a/AstroEQ-Hardware/SMD/AstroEQ SMD MK2 (EQ5).brd b/AstroEQ-Hardware/SMD/AstroEQ SMD MK2 (EQ5).brd
index 2eca2aebaf98a8467daf958376700720d5fc777a..58f9540cdaed544548c71d2841e93ffa49f60ba0 100644
Binary files a/AstroEQ-Hardware/SMD/AstroEQ SMD MK2 (EQ5).brd and b/AstroEQ-Hardware/SMD/AstroEQ SMD MK2 (EQ5).brd differ
diff --git a/AstroEQ-Hardware/SMD/AstroEQ SMD MK2 (EQ5).sch b/AstroEQ-Hardware/SMD/AstroEQ SMD MK2 (EQ5).sch
index e2bc3c0de5c5d56f51a9b3db95905778fa2f0c8f..4105ae413124b78874be2ddce40f70d00e62aee4 100644
Binary files a/AstroEQ-Hardware/SMD/AstroEQ SMD MK2 (EQ5).sch and b/AstroEQ-Hardware/SMD/AstroEQ SMD MK2 (EQ5).sch differ
diff --git a/AstroEQ-Hardware/eagle.epf b/AstroEQ-Hardware/eagle.epf
index 737a2282cd4e9fcbe25d62d491cefcd4580fb7db..4ad2d0072920c468c40ef3e0903f3b1c320ef8d4 100644
Binary files a/AstroEQ-Hardware/eagle.epf and b/AstroEQ-Hardware/eagle.epf differ
diff --git a/Downloads/AstroEQ6-ConfigUtility.zip b/Downloads/AstroEQ6-ConfigUtility.zip
index eb3b2d8015c249a9070c5de83baec0166a9abdd9..aea581c56587c5f9d58b872e0697ce8b63cdc0f0 100644
Binary files a/Downloads/AstroEQ6-ConfigUtility.zip and b/Downloads/AstroEQ6-ConfigUtility.zip differ
diff --git a/Downloads/AstroEQ6-Firmware.zip b/Downloads/AstroEQ6-Firmware.zip
index 2aa1d9281e62b1b49ec1ffc10f3f1fae9a355ecd..217946a009b67aea852be82a70dd05cea57f93f3 100644
Binary files a/Downloads/AstroEQ6-Firmware.zip and b/Downloads/AstroEQ6-Firmware.zip differ
diff --git a/README b/README
index ff9df85f9d487966df2495744867cdafe3893ea8..38cedaef92b99b064fc399b599bc287bcf7c0a96 100644
--- a/README
+++ b/README
@@ -23,7 +23,7 @@ The EQMOD Project can be found at: http://eq-mod.sourceforge.net/
 
   Works with EQ3, EQ5, HEQ5, and EQ6 mounts. Along With custom mounts.
  
-  Current Software Verison: 6.7
-  Current Hardware Version: 4.1
+  Current Software Verison: 6.8
+  Current Hardware Version: 4.3
 
 ---------------------------------------------------------------------------------------