diff --git a/.travis.yml b/.travis.yml
index b1edf1262c06a1bad8567475e56f19249965eb9d..752fe767d27ad361128b2582c4f9b5a16b4bcf17 100644
--- a/.travis.yml
+++ b/.travis.yml
@@ -1,6 +1,11 @@
language: cpp
-cache: apt
+matrix:
+ include:
+ - os: linux
+ compiler: gcc
+ cache: apt
+ dist: xenial
notifications:
irc:
@@ -27,6 +32,9 @@ script:
- popd
addons:
+ apt:
+ packages:
+ - dfu-util
artifacts:
paths:
- $(ls build/firmware/portapack-h1-havoc-*.tar.bz2 | tr "\n" ":")
diff --git a/CMakeLists.txt b/CMakeLists.txt
index 371e26d3be2dc42777581a1ade5899a1b69fdc5e..ac13907e93af81909962040ef8b19f43d2062308 100644
--- a/CMakeLists.txt
+++ b/CMakeLists.txt
@@ -19,6 +19,8 @@
#
cmake_minimum_required(VERSION 2.8.9)
+cmake_policy(SET CMP0005 NEW)
+
set(CMAKE_TOOLCHAIN_FILE ${CMAKE_CURRENT_LIST_DIR}/firmware/toolchain-arm-cortex-m.cmake)
project(portapack-h1)
diff --git a/README.md b/README.md
index f8126ab071e2dc0dfb3b7c958e325b7f2ad2d8a9..852d2f1636cf8ae8c64ae22ee5aef6c53314abc3 100644
--- a/README.md
+++ b/README.md
@@ -1,125 +1,125 @@
-
-
-HAVOC is a fork of the PortaPack H1 firmware, a portability add-on for the [HackRF One software-defined radio](http://greatscottgadgets.com/hackrf/).
-
-Hardware is available at [ShareBrained Technology](http://sharebrained.com/portapack).
-
-It is build on top of [ShareBrained's firmware](https://github.com/sharebrained/portapack-hackrf/), meaning that the original functionalities are kept (except when I don't sync for 2 months).
-
-# Documentation
-
-[READ THE WIKI](https://github.com/furrtek/portapack-havoc/wiki/Home/)
-
-If you want to submit a bug report, suggest something... Don't hesitate, use this page: https://github.com/furrtek/portapack-havoc/issues (Check the progress list below first).
-
-# Summary
-
-As its name implies, HAVOC's functionalities can be fun, mean and even useful sometimes. You shouldn't use them. No ! Bad ! Put it down.
-
-**In most countries, radio transmissions are tightly regulated. Transmitting outside of free/public bands without a licence or authorization, even at very low power, is certainly forbidden where you live. Always bear that in mind. You're the ONLY ONE responsible for what you do with this software.**
-
-# Fork features
-
-* IQ file replay
-* Microphone FM transmit with CTCSS
-* CTCSS decoder
-* Frequency manager (save & load from SD card, with categories and notes)
-* File manager
-* "Soundboard" wave file player (put 8-bit mono files in SD card /wav directory)
-* ADS-B receiver with map view
-* ADS-B transmitter (aircraft spoof)
-* SSTV transmitter
-* Fully configurable jammer
-* POCSAG transmitter
-* POCSAG receiver/decoder
-* Morse transmitter (FM tone and CW)
-* OOK transmitter for common remote encoders (PT2262, doorbells, remote outlets, some garage doors, ...)
-* RDS (Radio Data System) PSN, RadioText and Time groups transmitter
-* Meteorological radiosonde receiver for M10 and M2K2...
-* AFSK receiver
-* AFSK transmitter (Bell202...)
-* Nuoptix DTMF sync transmitter (quite specific but can be useful in some theme parks :) )
-* TouchTunes jukebox universal remote (by Notpike)
-* LCR (Language de Commande Routier) message generator
-* Street lighting control transmitter (CCIR tones)
-* "Play Dead" in case of emergency
-* Fully configurable RF signal generator
-* RSSI audio output as pitch (for direction finding)
-
-# Progress
-
-Feature | Progress | Notes
-------- | -------- | -----
-POCSAG RX Â | 95% | Needs support for numeric messages
-Morse TX | 95% | Needs fox hunt scheduler and live keying mode
-Mic. TX | 95% | Carrier leak bug, need to find guard tones for various brands of wireless mics
-ADS-B RX | 90% | Needs angle and speed decoding
-Close-Callâ„¢ | 85% | Needs adjustments and optimization for wider frequency range
-ADS-B TX | 85% | Works but baseband module needs cleaning
-SSTV TX | 80% | Needs better bitmap file handling, support for other modes (ROBOT ?) and callsign FSK ID
-Radiosondes | 75% | Needs support for other models
-Wave visualizer | 70% | Needs cleaning and handling of other sample formats, high priority
-AFSK RX | 70% | Needs work regarding flexibility
-Sigfox RX | 40% | Tuning basics done, needs decoding code and testing
-Generic TXs | 30% | Raw AX.25, AFSK, FSK, CCIR, DTMF... Tonesets are ready
-CC1101 TRX | 10% | And other sub-GHz transceiver chips like SI4032...
-SSTV RX | 0% |
-Scanner | 0% | Easy, could be used with POCSAG RX to catch jumping channels
-SSB TX | 0% | Requested but math is hard :(
-OOK RX | 0% | See if rtl_433's author is fine with using protocol defs
-Analog TV TX| 0% | Enough CPU ? B&W and no sound ?
-LoJack RX | 0% | Basically AFSK RX
-DMR info RX | 0% | Retrieve DMR channel info. **No voice** because of vocoder complexity and possible legal issue
-Tetra info? | 0% | Same
-
-# Screenshots
-
-
-
-# Thanks
-
-* Sig and cLx for research on AFSK LCR, Xylos, and for lending remote-controlled outlets
-* Pyr3x, Rainer Matla and DC1RDB for the donations :)
-* Keld Norman and Giorgio Campiotti for ideas and suggestions
-
-# License
-
-Except where specified in subdirectories of this project, all work is offered under the following license:
-
-Copyright (C) 2013-2015 Jared Boone, ShareBrained Technology, Inc.
-
-Copyright (C) 2015-2016 Furrtek
-
-This program is free software; you can redistribute it and/or
-modify it under the terms of the GNU General Public License
-as published by the Free Software Foundation; either version 2
-of the License, or (at your option) any later version.
-
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License
-along with this program; if not, write to the Free Software
-Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
-02110-1301, USA.
-
-# Contact
-
-## Original firmware and hardware
-
-Jared Boone <jared@sharebrained.com>
-
-ShareBrained Technology, Inc.
-
-<http://www.sharebrained.com/>
-
-The latest version of this repository can be found at
-https://github.com/sharebrained/portapack-hackrf/
-
-## HAVOC specific things
-
-Furrtek <furrtek@gmail.com>
-
-<http://www.furrtek.org>
+
+
+HAVOC is a fork of the PortaPack H1 firmware, a portability add-on for the [HackRF One software-defined radio](http://greatscottgadgets.com/hackrf/).
+
+Hardware is available at [ShareBrained Technology](http://sharebrained.com/portapack).
+
+It is build on top of [ShareBrained's firmware](https://github.com/sharebrained/portapack-hackrf/), meaning that the original functionalities are kept (except when I don't sync for 2 months).
+
+# Documentation
+
+[READ THE WIKI](https://github.com/furrtek/portapack-havoc/wiki/Home/)
+
+If you want to submit a bug report, suggest something... Don't hesitate, use this page: https://github.com/furrtek/portapack-havoc/issues (Check the progress list below first).
+
+# Summary
+
+As its name implies, HAVOC's functionalities can be fun, mean and even useful sometimes. You shouldn't use them. No ! Bad ! Put it down.
+
+**In most countries, radio transmissions are tightly regulated. Transmitting outside of free/public bands without a licence or authorization, even at very low power, is certainly forbidden where you live. Always bear that in mind. You're the ONLY ONE responsible for what you do with this software.**
+
+# Fork features
+
+* IQ file replay
+* Microphone FM transmit with CTCSS
+* CTCSS decoder
+* Frequency manager (save & load from SD card, with categories and notes)
+* File manager
+* "Soundboard" wave file player (put 8-bit mono files in SD card /wav directory)
+* ADS-B receiver with map view
+* ADS-B transmitter (aircraft spoof)
+* SSTV transmitter
+* Fully configurable jammer
+* POCSAG transmitter
+* POCSAG receiver/decoder
+* Morse transmitter (FM tone and CW)
+* OOK transmitter for common remote encoders (PT2262, doorbells, remote outlets, some garage doors, ...)
+* RDS (Radio Data System) PSN, RadioText and Time groups transmitter
+* Meteorological radiosonde receiver for M10 and M2K2...
+* AFSK receiver
+* AFSK transmitter (Bell202...)
+* Nuoptix DTMF sync transmitter (quite specific but can be useful in some theme parks :) )
+* TouchTunes jukebox universal remote (by Notpike)
+* LCR (Language de Commande Routier) message generator
+* Street lighting control transmitter (CCIR tones)
+* "Play Dead" in case of emergency
+* Fully configurable RF signal generator
+* RSSI audio output as pitch (for direction finding)
+
+# Progress
+
+Feature | Progress | Notes
+------- | -------- | -----
+POCSAG RX Â | 95% | Needs support for numeric messages
+Morse TX | 95% | Needs fox hunt scheduler and live keying mode
+Mic. TX | 95% | Carrier leak bug, need to find guard tones for various brands of wireless mics
+ADS-B RX | 90% | Needs angle and speed decoding
+Close-Callâ„¢ | 85% | Needs adjustments and optimization for wider frequency range
+ADS-B TX | 85% | Works but baseband module needs cleaning
+SSTV TX | 80% | Needs better bitmap file handling, support for other modes (ROBOT ?) and callsign FSK ID
+Radiosondes | 75% | Needs support for other models
+Wave visualizer | 70% | Needs cleaning and handling of other sample formats, high priority
+AFSK RX | 70% | Needs work regarding flexibility
+Sigfox RX | 40% | Tuning basics done, needs decoding code and testing
+Generic TXs | 30% | Raw AX.25, AFSK, FSK, CCIR, DTMF... Tonesets are ready
+CC1101 TRX | 10% | And other sub-GHz transceiver chips like SI4032...
+SSTV RX | 0% |
+Scanner | 0% | Easy, could be used with POCSAG RX to catch jumping channels
+SSB TX | 0% | Requested but math is hard :(
+OOK RX | 0% | See if rtl_433's author is fine with using protocol defs
+Analog TV TX| 0% | Enough CPU ? B&W and no sound ?
+LoJack RX | 0% | Basically AFSK RX
+DMR info RX | 0% | Retrieve DMR channel info. **No voice** because of vocoder complexity and possible legal issue
+Tetra info? | 0% | Same
+
+# Screenshots
+
+
+
+# Thanks
+
+* Sig and cLx for research on AFSK LCR, Xylos, and for lending remote-controlled outlets
+* Pyr3x, Rainer Matla and DC1RDB for the donations :)
+* Keld Norman and Giorgio Campiotti for ideas and suggestions
+
+# License
+
+Except where specified in subdirectories of this project, all work is offered under the following license:
+
+Copyright (C) 2013-2019 Jared Boone, ShareBrained Technology, Inc.
+
+Copyright (C) 2015-2016 Furrtek
+
+This program is free software; you can redistribute it and/or
+modify it under the terms of the GNU General Public License
+as published by the Free Software Foundation; either version 2
+of the License, or (at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
+02110-1301, USA.
+
+# Contact
+
+## Original firmware and hardware
+
+Jared Boone <jared@sharebrained.com>
+
+ShareBrained Technology, Inc.
+
+<http://www.sharebrained.com/>
+
+The latest version of this repository can be found at
+https://github.com/sharebrained/portapack-hackrf/
+
+## HAVOC specific things
+
+Furrtek <furrtek@gmail.com>
+
+<http://www.furrtek.org>
diff --git a/doc/images/hardware/portapack_h1_operating.jpg b/doc/images/hardware/portapack_h1_operating.jpg
new file mode 100644
index 0000000000000000000000000000000000000000..f452acd79dc3c8bb0456cbf5313ad627e5997c5e
Binary files /dev/null and b/doc/images/hardware/portapack_h1_operating.jpg differ
diff --git a/doc/images/hardware/portapack_h1_parts.jpg b/doc/images/hardware/portapack_h1_parts.jpg
new file mode 100644
index 0000000000000000000000000000000000000000..73d094adcdc2eb5842651418b2caa49e4a6311ea
Binary files /dev/null and b/doc/images/hardware/portapack_h1_parts.jpg differ
diff --git a/firmware/CMakeLists.txt b/firmware/CMakeLists.txt
index 2b5700df64b1acc60cf38e30ea9f1bf9052fb20d..0349444f528fc1f2f31e3c61c53b77638aa152d2 100644
--- a/firmware/CMakeLists.txt
+++ b/firmware/CMakeLists.txt
@@ -25,12 +25,6 @@ set(COMMON ${PROJECT_SOURCE_DIR}/common)
set(CHIBIOS ${PROJECT_SOURCE_DIR}/chibios)
set(CHIBIOS_PORTAPACK ${PROJECT_SOURCE_DIR}/chibios-portapack)
-set(HACKRF_FIRMWARE_FILENAME hackrf_one_usb.dfu)
-set(HACKRF_FIRMWARE_IMAGE ${PROJECT_SOURCE_DIR}/${HACKRF_FIRMWARE_FILENAME})
-
-set(HACKRF_CPLD_SVF_FILENAME hackrf_cpld_portapack.svf)
-set(HACKRF_CPLD_SVF_PATH ${PROJECT_SOURCE_DIR}/${HACKRF_CPLD_SVF_FILENAME})
-
set(EXTRACT_CPLD_DATA ${PROJECT_SOURCE_DIR}/tools/extract_cpld_data.py)
set(EXTRACT_SVF_DATA_XC2C64A ${PROJECT_SOURCE_DIR}/tools/extract_svf_data_xc2c64a.py)
set(STRIP_DFU ${PROJECT_SOURCE_DIR}/tools/strip_dfu.py)
@@ -40,6 +34,29 @@ set(MAKE_IMAGE_CHUNK ${PROJECT_SOURCE_DIR}/tools/make_image_chunk.py)
set(FIRMWARE_NAME portapack-h1-havoc)
set(FIRMWARE_FILENAME ${FIRMWARE_NAME}.bin)
+include(ExternalProject)
+find_program(MAKE_EXE NAMES gmake nmake make)
+ExternalProject_Add(hackrf
+ GIT_REPOSITORY https://github.com/jboone/hackrf.git
+ # SOURCE_SUBDIR firmware
+ # SOURCE_SUBDIR isn't available in CMake 3.5 (Ubuntu 16.04 LTS), so the following is a work-around:
+ CONFIGURE_COMMAND ${CMAKE_COMMAND} -DUSER_INTERFACE=PORTAPACK "-GUnix Makefiles" ../hackrf/firmware
+ BUILD_COMMAND ${MAKE_EXE} hackrf_usb.dfu
+ INSTALL_COMMAND ""
+)
+ExternalProject_Get_Property(hackrf SOURCE_DIR)
+ExternalProject_Get_Property(hackrf BINARY_DIR)
+set(hackrf_SOURCE_DIR ${SOURCE_DIR})
+set(hackrf_BINARY_DIR ${BINARY_DIR})
+
+set(HACKRF_FIRMWARE_DFU_FILENAME hackrf_usb.dfu)
+set(HACKRF_FIRMWARE_BIN_FILENAME hackrf_usb.bin)
+
+set(HACKRF_FIRMWARE_DFU_IMAGE ${hackrf_BINARY_DIR}/hackrf_usb/${HACKRF_FIRMWARE_DFU_FILENAME})
+set(HACKRF_FIRMWARE_BIN_IMAGE ${hackrf_BINARY_DIR}/hackrf_usb/${HACKRF_FIRMWARE_BIN_FILENAME})
+set(HACKRF_CPLD_SVF_FILENAME default.svf)
+set(HACKRF_CPLD_SVF_PATH ${hackrf_SOURCE_DIR}/firmware/cpld/sgpio_if/${HACKRF_CPLD_SVF_FILENAME})
+
add_subdirectory(application)
add_subdirectory(baseband)
@@ -59,8 +76,8 @@ add_custom_target(
add_custom_target(
program
- COMMAND dfu-util --device 1fc9:000c --download ${HACKRF_FIRMWARE_IMAGE}
- COMMAND sleep 1s
+ COMMAND dfu-util --device 1fc9:000c --download ${HACKRF_FIRMWARE_DFU_IMAGE}
+ COMMAND sleep 3s
COMMAND hackrf_spiflash -w ${FIRMWARE_FILENAME}
DEPENDS ${CMAKE_CURRENT_BINARY_DIR}/${FIRMWARE_FILENAME}
)
@@ -69,11 +86,11 @@ add_custom_target(
add_custom_command(
OUTPUT ${FIRMWARE_NAME}-${GIT_REVISION}.tar.bz2 ${FIRMWARE_NAME}-${GIT_REVISION}.zip
COMMAND cp ${LICENSE_PATH} LICENSE
- COMMAND cp ${HACKRF_FIRMWARE_IMAGE} ${HACKRF_FIRMWARE_FILENAME}
- COMMAND tar -c -j -f ${FIRMWARE_NAME}-${GIT_REVISION}.tar.bz2 ${FIRMWARE_FILENAME} ${HACKRF_FIRMWARE_FILENAME} LICENSE
- COMMAND zip -9 -q ${FIRMWARE_NAME}-${GIT_REVISION}.zip ${FIRMWARE_FILENAME} ${HACKRF_FIRMWARE_FILENAME} LICENSE
- COMMAND rm -f LICENSE ${HACKRF_FIRMWARE_FILENAME}
- DEPENDS ${CMAKE_CURRENT_BINARY_DIR}/${FIRMWARE_FILENAME} ${LICENSE_PATH} ${HACKRF_FIRMWARE_IMAGE}
+ COMMAND cp ${HACKRF_FIRMWARE_DFU_IMAGE} ${HACKRF_FIRMWARE_DFU_FILENAME}
+ COMMAND tar -c -j -f ${FIRMWARE_NAME}-${GIT_REVISION}.tar.bz2 ${FIRMWARE_FILENAME} ${HACKRF_FIRMWARE_DFU_FILENAME} LICENSE
+ COMMAND zip -9 -q ${FIRMWARE_NAME}-${GIT_REVISION}.zip ${FIRMWARE_FILENAME} ${HACKRF_FIRMWARE_DFU_FILENAME} LICENSE
+ COMMAND rm -f LICENSE ${HACKRF_FIRMWARE_DFU_FILENAME}
+ DEPENDS ${CMAKE_CURRENT_BINARY_DIR}/${FIRMWARE_FILENAME} ${LICENSE_PATH} ${HACKRF_FIRMWARE_DFU_IMAGE}
VERBATIM
)
diff --git a/firmware/application/CMakeLists.txt b/firmware/application/CMakeLists.txt
index a3a3c1b3532c4aeb0f5539cb4d8ab35bdf2e2c66..f4a776ef0d9b107c9cc6e111a66f441a0d662ae3 100644
--- a/firmware/application/CMakeLists.txt
+++ b/firmware/application/CMakeLists.txt
@@ -82,7 +82,7 @@ set(HACKRF_CPLD_DATA_HPP ${CMAKE_CURRENT_BINARY_DIR}/hackrf_cpld_data.hpp)
set(HACKRF_CPLD_DATA_CPP ${CMAKE_CURRENT_BINARY_DIR}/hackrf_cpld_data.cpp)
# Imported source files and paths
-include(${CHIBIOS_PORTAPACK}/boards/GSG_HACKRF_ONE/board.cmake)
+include(${CHIBIOS_PORTAPACK}/boards/PORTAPACK_APPLICATION/board.cmake)
include(${CHIBIOS_PORTAPACK}/os/hal/platforms/LPC43xx_M0/platform.cmake)
include(${CHIBIOS}/os/hal/hal.cmake)
include(${CHIBIOS_PORTAPACK}/os/ports/GCC/ARMCMx/LPC43xx_M0/port.cmake)
@@ -405,7 +405,7 @@ add_custom_command(
add_custom_command(
OUTPUT ${HACKRF_CPLD_DATA_HPP} ${HACKRF_CPLD_DATA_CPP}
COMMAND ${EXTRACT_SVF_DATA_XC2C64A} ${HACKRF_CPLD_SVF_PATH} hackrf::one::cpld::verify_blocks ${HACKRF_CPLD_DATA_CPP}
- DEPENDS ${EXTRACT_SVF_DATA_XC2C64A} ${HACKRF_CPLD_SVF_PATH}
+ DEPENDS ${EXTRACT_SVF_DATA_XC2C64A} hackrf
)
add_executable(${PROJECT_NAME}.elf ${CSRC} ${CPPSRC} ${ASMSRC})
diff --git a/firmware/application/apps/ui_debug.cpp b/firmware/application/apps/ui_debug.cpp
index f2c9315b095a3cb8c1866ec0d2335db1253cc0d3..1a7ca66f131e439cb578da928fe4b67fb7d1587a 100644
--- a/firmware/application/apps/ui_debug.cpp
+++ b/firmware/application/apps/ui_debug.cpp
@@ -30,6 +30,11 @@
// #include "ui_sd_card_debug.hpp"
+#include "portapack.hpp"
+using namespace portapack;
+
+#include "irq_controls.hpp"
+
namespace ui {
/* DebugMemoryView *******************************************************/
@@ -244,6 +249,74 @@ void RegistersView::focus() {
button_done.focus();
}
+/* ControlsSwitchesWidget ************************************************/
+
+void ControlsSwitchesWidget::on_show() {
+ display.fill_rectangle(
+ screen_rect(),
+ Color::black()
+ );
+}
+
+bool ControlsSwitchesWidget::on_key(const KeyEvent key) {
+ key_event_mask = 1 << toUType(key);
+ return true;
+}
+
+void ControlsSwitchesWidget::paint(Painter& painter) {
+ const std::array<Rect, 7> button_rects { {
+ { 64, 32, 16, 16 }, // Right
+ { 0, 32, 16, 16 }, // Left
+ { 32, 64, 16, 16 }, // Down
+ { 32, 0, 16, 16 }, // Up
+ { 32, 32, 16, 16 }, // Select
+ { 16, 96, 16, 16 }, // Encoder phase 0
+ { 48, 96, 16, 16 }, // Encoder phase 1
+ } };
+ const auto pos = screen_pos();
+ auto switches_raw = control::debug::switches();
+ auto switches_debounced = get_switches_state().to_ulong();
+ auto switches_event = key_event_mask;
+
+ for(const auto r : button_rects) {
+ const auto c =
+ ((switches_event & 1) ?
+ Color::red() :
+ ((switches_debounced & 1) ?
+ Color::green() :
+ ((switches_raw & 1) ?
+ Color::yellow() :
+ Color::blue()
+ )
+ )
+ );
+ painter.fill_rectangle(r + pos, c);
+ switches_raw >>= 1;
+ switches_debounced >>= 1;
+ switches_event >>= 1;
+ }
+}
+
+void ControlsSwitchesWidget::on_frame_sync() {
+ set_dirty();
+}
+
+/* DebugControlsView *****************************************************/
+
+DebugControlsView::DebugControlsView(NavigationView& nav) {
+ add_children({
+ &text_title,
+ &switches_widget,
+ &button_done,
+ });
+
+ button_done.on_select = [&nav](Button&){ nav.pop(); };
+}
+
+void DebugControlsView::focus() {
+ switches_widget.focus();
+}
+
/* DebugPeripheralsMenuView **********************************************/
DebugPeripheralsMenuView::DebugPeripheralsMenuView(NavigationView& nav) {
@@ -261,7 +334,7 @@ DebugPeripheralsMenuView::DebugPeripheralsMenuView(NavigationView& nav) {
[](const size_t register_number) { return portapack::clock_generator.read_register(register_number); }
); } },
{ audio::debug::codec_name(), ui::Color::white(), nullptr, [&nav](){ nav.push<RegistersView>(
- audio::debug::codec_name(), RegistersWidgetConfig { (size_t)audio::debug::reg_count(), (size_t)audio::debug::reg_bits() },
+ audio::debug::codec_name(), RegistersWidgetConfig { audio::debug::reg_count(), audio::debug::reg_bits() },
[](const size_t register_number) { return audio::debug::reg_read(register_number); }
); } },
});
@@ -277,7 +350,7 @@ DebugMenuView::DebugMenuView(NavigationView& nav) {
//{ "SD Card", ui::Color::white(), nullptr, [&nav](){ nav.push<SDCardDebugView>(); } },
{ "Peripherals", ui::Color::white(), nullptr, [&nav](){ nav.push<DebugPeripheralsMenuView>(); } },
{ "Temperature", ui::Color::white(), nullptr, [&nav](){ nav.push<TemperatureView>(); } },
- });
+ { "Controls", ui::Color::white(), nullptr, [&nav](){ nav.push<DebugControlsView>(); } }, });
on_left = [&nav](){ nav.pop(); };
}
diff --git a/firmware/application/apps/ui_debug.hpp b/firmware/application/apps/ui_debug.hpp
index 2d633b84dc2a5fe102ba804c6210cf0a950c5977..fa7aed37e944546aa67ab1d6e4933c5906bf07c5 100644
--- a/firmware/application/apps/ui_debug.hpp
+++ b/firmware/application/apps/ui_debug.hpp
@@ -218,6 +218,56 @@ private:
};
};
+class ControlsSwitchesWidget : public Widget {
+public:
+ ControlsSwitchesWidget(
+ Rect parent_rect
+ ) : Widget { parent_rect },
+ key_event_mask(0)
+ {
+ set_focusable(true);
+ }
+
+ void on_show() override;
+ bool on_key(const KeyEvent key) override;
+
+ void paint(Painter& painter) override;
+
+private:
+ uint8_t key_event_mask;
+
+ MessageHandlerRegistration message_handler_frame_sync {
+ Message::ID::DisplayFrameSync,
+ [this](const Message* const) {
+ this->on_frame_sync();
+ }
+ };
+
+ void on_frame_sync();
+};
+
+class DebugControlsView : public View {
+public:
+ explicit DebugControlsView(NavigationView& nav);
+
+ void focus() override;
+
+private:
+ Text text_title {
+ { 64, 16, 184, 16 },
+ "Controls State",
+ };
+
+ ControlsSwitchesWidget switches_widget {
+ { 80, 80, 80, 112 },
+ };
+
+ Button button_done {
+ { 72, 264, 96, 24 },
+ "Done"
+ };
+};
+
/*class DebugLCRView : public View {
public:
DebugLCRView(NavigationView& nav, std::string lcrstring);
diff --git a/firmware/application/apps/ui_settings.cpp b/firmware/application/apps/ui_settings.cpp
index 35d7119386a8e8bc104889b5bab5a094990818a0..7cee4f0c9a51159d5f21e870206e7a15cc12ae6f 100644
--- a/firmware/application/apps/ui_settings.cpp
+++ b/firmware/application/apps/ui_settings.cpp
@@ -111,11 +111,39 @@ SetRadioView::SetRadioView(
) {
button_cancel.on_select = [&nav](Button&){
nav.pop();
- },
+ };
+
+ const auto reference = portapack::clock_manager.get_reference();
+
+ std::string source_name("---");
+ switch(reference.source) {
+ case ClockManager::ReferenceSource::Xtal: source_name = "HackRF"; break;
+ case ClockManager::ReferenceSource::PortaPack: source_name = "PortaPack"; break;
+ case ClockManager::ReferenceSource::External: source_name = "External"; break;
+ }
+
+ value_source.set(source_name);
+ value_source_frequency.set(to_string_dec_uint(reference.frequency / 1000000, 2) + "." + to_string_dec_uint((reference.frequency % 1000000) / 100, 4, '0') + " MHz");
+
+ label_source.set_style(&style_text);
+ value_source.set_style(&style_text);
+ value_source_frequency.set_style(&style_text);
add_children({
- &labels,
- &field_ppm,
+ &label_source,
+ &value_source,
+ &value_source_frequency,
+ });
+
+ if( reference.source == ClockManager::ReferenceSource::Xtal ) {
+ add_children({
+ &labels_correction,
+ &field_ppm,
+ });
+ }
+
+ add_children({
+ &labels_bias,
&check_bias,
&button_done,
&button_cancel
diff --git a/firmware/application/apps/ui_settings.hpp b/firmware/application/apps/ui_settings.hpp
index 0b788a8f2ddb7b12e621e7b8a92a7c76a96a1368..39ab959793f2bd4a8bcc7e3093d2466abe3a657b 100644
--- a/firmware/application/apps/ui_settings.hpp
+++ b/firmware/application/apps/ui_settings.hpp
@@ -125,17 +125,41 @@ public:
std::string title() const override { return "Radio settings"; };
private:
- Labels labels {
- { { 2 * 8, 2 * 16 }, "Frequency correction:", Color::light_grey() },
- { { 6 * 8, 3 * 16 }, "PPM", Color::light_grey() },
- { { 24, 7 * 16 }, "CAUTION: Ensure that all", Color::red() },
- { { 28, 8 * 16 }, "devices attached to the", Color::red() },
- { { 8, 9 * 16 }, "antenna connector can accept", Color::red() },
- { { 68, 10 * 16 }, "a DC voltage!", Color::red() }
+ const Style style_text {
+ .font = font::fixed_8x16,
+ .background = Color::black(),
+ .foreground = Color::light_grey(),
+ };
+
+ Text label_source {
+ { 0, 1 * 16, 17 * 8, 16 },
+ "Reference Source:"
+ };
+
+ Text value_source {
+ { (240 - 11 * 8), 1 * 16, 11 * 8, 16 },
+ "---"
+ };
+
+ Text value_source_frequency {
+ { (240 - 11 * 8), 2 * 16, 11 * 8, 16 },
+ "---"
+ };
+
+ Labels labels_correction {
+ { { 2 * 8, 4 * 16 }, "Frequency correction:", Color::light_grey() },
+ { { 6 * 8, 5 * 16 }, "PPM", Color::light_grey() },
+ };
+
+ Labels labels_bias {
+ { { 24, 8 * 16 }, "CAUTION: Ensure that all", Color::red() },
+ { { 28, 9 * 16 }, "devices attached to the", Color::red() },
+ { { 8, 10 * 16 }, "antenna connector can accept", Color::red() },
+ { { 68, 11 * 16 }, "a DC voltage!", Color::red() }
};
NumberField field_ppm {
- { 2 * 8, 3 * 16 },
+ { 2 * 8, 5 * 16 },
3,
{ -50, 50 },
1,
@@ -143,7 +167,7 @@ private:
};
Checkbox check_bias {
- { 28, 12 * 16 },
+ { 28, 13 * 16 },
5,
"Turn on bias voltage"
};
diff --git a/firmware/application/audio.cpp b/firmware/application/audio.cpp
index cec0979e86c4746c56cbaff907a48dfb601078a9..958daad2cc136a5910d0308e75abb798b2b8294b 100644
--- a/firmware/application/audio.cpp
+++ b/firmware/application/audio.cpp
@@ -222,6 +222,10 @@ void shutdown() {
audio_codec->reset();
input::stop();
output::stop();
+
+ i2s::i2s0::shutdown();
+
+ clock_manager.stop_audio_pll();
}
void set_rate(const Rate rate) {
diff --git a/firmware/application/clock_manager.cpp b/firmware/application/clock_manager.cpp
index 8acaed5d93e5d92fbaf8eb6040294c64106fc305..f1f6eb2814da67f1a310fb7c8b74c6b79ceb7f4f 100644
--- a/firmware/application/clock_manager.cpp
+++ b/firmware/application/clock_manager.cpp
@@ -29,56 +29,8 @@ using namespace hackrf::one;
#include "lpc43xx_cpp.hpp"
using namespace lpc43xx;
-static void set_clock(LPC_CGU_BASE_CLK_Type& clk, const cgu::CLK_SEL clock_source) {
- clk.AUTOBLOCK = 1;
- clk.CLK_SEL = toUType(clock_source);
-}
-
-static constexpr uint32_t systick_count(const uint32_t clock_source_f) {
- return clock_source_f / CH_FREQUENCY;
-}
-
-static constexpr uint32_t systick_load(const uint32_t clock_source_f) {
- return systick_count(clock_source_f) - 1;
-}
-
-constexpr uint32_t clock_source_irc_f = 12000000;
-constexpr uint32_t clock_source_pll1_boot_f = 96000000;
-//constexpr uint32_t clock_source_gp_clkin = 20000000;
-constexpr uint32_t clock_source_pll1_step_f = 100000000;
-constexpr uint32_t clock_source_pll1_f = 200000000;
-
-constexpr auto systick_count_irc = systick_load(clock_source_irc_f);
-constexpr auto systick_count_pll1 = systick_load(clock_source_pll1_f);
-constexpr auto systick_count_pll1_step = systick_load(clock_source_pll1_step_f);
-
constexpr uint32_t si5351_vco_f = 800000000;
-constexpr uint32_t i2c0_bus_f = 400000;
-constexpr uint32_t i2c0_high_period_ns = 900;
-
-constexpr I2CClockConfig i2c_clock_config_400k_boot_clock {
- .clock_source_f = clock_source_pll1_boot_f,
- .bus_f = i2c0_bus_f,
- .high_period_ns = i2c0_high_period_ns,
-};
-
-constexpr I2CClockConfig i2c_clock_config_400k_fast_clock {
- .clock_source_f = clock_source_pll1_f,
- .bus_f = i2c0_bus_f,
- .high_period_ns = i2c0_high_period_ns,
-};
-
-constexpr I2CConfig i2c_config_boot_clock {
- .high_count = i2c_clock_config_400k_boot_clock.i2c_high_count(),
- .low_count = i2c_clock_config_400k_boot_clock.i2c_low_count(),
-};
-
-constexpr I2CConfig i2c_config_fast_clock {
- .high_count = i2c_clock_config_400k_fast_clock.i2c_high_count(),
- .low_count = i2c_clock_config_400k_fast_clock.i2c_low_count(),
-};
-
constexpr si5351::Inputs si5351_inputs {
.f_xtal = si5351_xtal_f,
.f_clkin = si5351_clkin_f,
@@ -225,9 +177,9 @@ static constexpr ClockControl::MultiSynthSource get_reference_clock_generator_pl
}
constexpr ClockControls si5351_clock_control_common { {
- { ClockControl::ClockCurrentDrive::_6mA, ClockControl::ClockSource::MS_Self, ClockControl::ClockInvert::Normal, get_reference_clock_generator_pll(ClockManager::ReferenceSource::Xtal), ClockControl::MultiSynthMode::Fractional, ClockControl::ClockPowerDown::Power_Off },
- { ClockControl::ClockCurrentDrive::_6mA, ClockControl::ClockSource::MS_Group, ClockControl::ClockInvert::Invert, get_reference_clock_generator_pll(ClockManager::ReferenceSource::Xtal), ClockControl::MultiSynthMode::Integer, ClockControl::ClockPowerDown::Power_Off },
- { ClockControl::ClockCurrentDrive::_6mA, ClockControl::ClockSource::MS_Group, ClockControl::ClockInvert::Normal, get_reference_clock_generator_pll(ClockManager::ReferenceSource::Xtal), ClockControl::MultiSynthMode::Integer, ClockControl::ClockPowerDown::Power_Off },
+ { ClockControl::ClockCurrentDrive::_8mA, ClockControl::ClockSource::MS_Self, ClockControl::ClockInvert::Normal, get_reference_clock_generator_pll(ClockManager::ReferenceSource::Xtal), ClockControl::MultiSynthMode::Fractional, ClockControl::ClockPowerDown::Power_Off },
+ { ClockControl::ClockCurrentDrive::_2mA, ClockControl::ClockSource::MS_Group, ClockControl::ClockInvert::Invert, get_reference_clock_generator_pll(ClockManager::ReferenceSource::Xtal), ClockControl::MultiSynthMode::Integer, ClockControl::ClockPowerDown::Power_Off },
+ { ClockControl::ClockCurrentDrive::_2mA, ClockControl::ClockSource::MS_Group, ClockControl::ClockInvert::Normal, get_reference_clock_generator_pll(ClockManager::ReferenceSource::Xtal), ClockControl::MultiSynthMode::Integer, ClockControl::ClockPowerDown::Power_Off },
{ ClockControl::ClockCurrentDrive::_8mA, ClockControl::ClockSource::MS_Self, ClockControl::ClockInvert::Normal, get_reference_clock_generator_pll(ClockManager::ReferenceSource::Xtal), ClockControl::MultiSynthMode::Integer, ClockControl::ClockPowerDown::Power_Off },
{ ClockControl::ClockCurrentDrive::_8mA, ClockControl::ClockSource::MS_Self, ClockControl::ClockInvert::Normal, get_reference_clock_generator_pll(ClockManager::ReferenceSource::Xtal), ClockControl::MultiSynthMode::Integer, ClockControl::ClockPowerDown::Power_Off },
{ ClockControl::ClockCurrentDrive::_6mA, ClockControl::ClockSource::MS_Self, ClockControl::ClockInvert::Normal, get_reference_clock_generator_pll(ClockManager::ReferenceSource::Xtal), ClockControl::MultiSynthMode::Integer, ClockControl::ClockPowerDown::Power_Off },
@@ -235,8 +187,8 @@ constexpr ClockControls si5351_clock_control_common { {
{ ClockControl::ClockCurrentDrive::_2mA, ClockControl::ClockSource::MS_Self, ClockControl::ClockInvert::Normal, get_reference_clock_generator_pll(ClockManager::ReferenceSource::Xtal), ClockControl::MultiSynthMode::Integer, ClockControl::ClockPowerDown::Power_Off },
} };
-ClockManager::ReferenceSource ClockManager::get_reference_source() const {
- return reference_source;
+ClockManager::Reference ClockManager::get_reference() const {
+ return reference;
}
static void portapack_tcxo_enable() {
@@ -255,38 +207,6 @@ static void portapack_tcxo_disable() {
#include "hackrf_gpio.hpp"
using namespace hackrf::one;
-void ClockManager::init_peripherals() {
- /* Must be sure to run the M4 core from IRC when messing with the signal
- * generator that sources the GP_CLKIN signal that drives the micro-
- * controller's PLL1 input.
- */
- /* When booting from SPIFI, PLL1 is already running at 288MHz. */
- /* TODO: Refactor this blob, there's too much knowledge about post-boot
- * state, which can change depending on where we're running from -- SPIFI
- * or RAM or ???
- */
- // PLL1 is running at 288 MHz upon bootstrap exit.
- LPC_CGU->IDIVA_CTRL.word =
- ( 0 << 0) /* PD */
- | ( 2 << 2) /* IDIV (/3) */
- | ( 1 << 11) /* AUTOBLOCK */
- | ( 9 << 24) /* PLL1 */
- ;
-
- const auto clk_sel = cgu::CLK_SEL::IDIVA;
- set_clock(LPC_CGU->BASE_M4_CLK, clk_sel);
- set_clock(LPC_CGU->BASE_PERIPH_CLK, clk_sel);
- set_clock(LPC_CGU->BASE_APB1_CLK, clk_sel);
- set_clock(LPC_CGU->BASE_APB3_CLK, clk_sel);
- set_clock(LPC_CGU->BASE_SDIO_CLK, clk_sel);
- set_clock(LPC_CGU->BASE_SSP1_CLK, clk_sel);
-
- // IDIVC should no longer be in use.
- LPC_CGU->IDIVC_CTRL.PD = 1;
-
- i2c0.start(i2c_config_boot_clock);
-}
-
void ClockManager::init_clock_generator() {
clock_generator.reset();
clock_generator.set_crystal_internal_load_capacitance(CrystalInternalLoadCapacitance::XTAL_CL_8pF);
@@ -299,11 +219,11 @@ void ClockManager::init_clock_generator() {
);
clock_generator.enable_output(clock_generator_output_mcu_clkin);
- const auto reference_source = choose_reference_source();
+ reference = choose_reference();
clock_generator.disable_output(clock_generator_output_mcu_clkin);
- const auto ref_pll = get_reference_clock_generator_pll(reference_source);
+ const auto ref_pll = get_reference_clock_generator_pll(reference.source);
const ClockControls si5351_clock_control = ClockControls { {
si5351_clock_control_common[0].ms_src(ref_pll),
si5351_clock_control_common[1].ms_src(ref_pll),
@@ -330,15 +250,14 @@ void ClockManager::init_clock_generator() {
// Wait for both PLLs to lock.
// TODO: Disable the unused PLL?
- while((clock_generator.device_status() & 0x60) != 0);
+ const uint8_t device_status_mask = (ref_pll == ClockControl::MultiSynthSource::PLLB) ? 0x40 : 0x20;
+ while((clock_generator.device_status() & device_status_mask) != 0);
clock_generator.set_clock_control(
clock_generator_output_mcu_clkin,
si5351_clock_control_common[clock_generator_output_mcu_clkin].ms_src(ref_pll).clk_pdn(ClockControl::ClockPowerDown::Power_On)
);
clock_generator.enable_output(clock_generator_output_mcu_clkin);
-
- set_m4_clock_to_pll1();
}
uint32_t ClockManager::measure_gp_clkin_frequency() {
@@ -364,23 +283,23 @@ ClockManager::ReferenceSource ClockManager::detect_reference_source() {
}
}
-ClockManager::ReferenceSource ClockManager::choose_reference_source() {
+ClockManager::Reference ClockManager::choose_reference() {
const auto detected_reference = detect_reference_source();
if( (detected_reference == ReferenceSource::External) ||
(detected_reference == ReferenceSource::PortaPack) ) {
const auto frequency = measure_gp_clkin_frequency();
if( (frequency >= 9850000) && (frequency <= 10150000) ) {
- return detected_reference;
+
+ return { detected_reference, 10000000 };
}
}
portapack_tcxo_disable();
- return ReferenceSource::Xtal;
+ return { ReferenceSource::Xtal, 10000000 };
}
void ClockManager::shutdown() {
- // run_from_irc();
clock_generator.reset();
}
@@ -488,110 +407,6 @@ uint32_t ClockManager::get_frequency_monitor_measurement_in_hertz() {
return LPC_CGU->FREQ_MON.FCNT * 25000;
}
-void ClockManager::enable_xtal_oscillator() {
- LPC_CGU->XTAL_OSC_CTRL.BYPASS = 0;
- LPC_CGU->XTAL_OSC_CTRL.ENABLE = 1;
-}
-
-void ClockManager::disable_xtal_oscillator() {
- LPC_CGU->XTAL_OSC_CTRL.ENABLE = 0;
-}
-
-void ClockManager::set_m4_clock_to_pll1() {
- /* Incantation from LPC43xx UM10503 section 12.2.1.1, to bring the M4
- * core clock speed to the 110 - 204MHz range.
- */
-
- /* Set M4 clock to safe default speed (~12MHz IRC) */
-
- i2c0.stop();
-
- // All other peripherals capable of running at 204 MHz.
- LPC_CGU->IDIVA_CTRL.word =
- ( 0 << 0) /* PD */
- | ( 0 << 2) /* IDIV (/1) */
- | ( 1 << 11) /* AUTOBLOCK */
- | ( 1 << 24) /* IRC */
- ;
-
- systick_adjust_period(systick_count_irc);
- halLPCSetSystemClock(clock_source_irc_f);
-
- // SPIFI clock
- LPC_CGU->IDIVB_CTRL.word =
- ( 0 << 0) /* PD */
- | ( 0 << 2) /* IDIV (/1) */
- | ( 1 << 11) /* AUTOBLOCK */
- | ( 1 << 24) /* IRC */
- ;
-
- /* Step into the 90-110MHz M4 clock range */
- /* Fclkin = 40M
- * /N=2 = 20M = PFDin
- * Fcco = PFDin * (M=10) = 200M
- * Fclk = Fcco / (2*(P=1)) = 100M
- */
- cgu::pll1::ctrl({
- .pd = 1,
- .bypass = 0,
- .fbsel = 0,
- .direct = 0,
- .psel = 0,
- .autoblock = 1,
- .nsel = 1,
- .msel = 9,
- .clk_sel = cgu::CLK_SEL::GP_CLKIN,
- });
-
- cgu::pll1::enable();
- while( !cgu::pll1::is_locked() );
-
- /* Switch M4 clock to PLL1 running at intermediate rate */
- // All other peripherals capable of running at 204 MHz.
- LPC_CGU->IDIVA_CTRL.word =
- ( 0 << 0) /* PD */
- | ( 0 << 2) /* IDIV (/1) */
- | ( 1 << 11) /* AUTOBLOCK */
- | ( 9 << 24) /* PLL1 */
- ;
-
- systick_adjust_period(systick_count_pll1_step);
- halLPCSetSystemClock(clock_source_pll1_step_f);
-
- // SPIFI clock
- LPC_CGU->IDIVB_CTRL.word =
- ( 0 << 0) /* PD */
- | ( 0 << 2) /* IDIV (/1) */
- | ( 1 << 11) /* AUTO BLOCK */
- | ( 9 << 24) /* PLL1 */
- ;
-
- /* Delay >50us at 90-110MHz clock speed */
- volatile uint32_t delay = 1400;
- while(delay--);
-
- // SPIFI clock
- LPC_CGU->IDIVB_CTRL.word =
- ( 0 << 0) /* PD */
- | ( 1 << 2) /* IDIV (/2) */
- | ( 1 << 11) /* AUTOBLOCK */
- | ( 9 << 24) /* PLL1 */
- ;
-
- /* Remove /2P divider from PLL1 output to achieve full speed */
- cgu::pll1::direct();
-
- systick_adjust_period(systick_count_pll1);
- halLPCSetSystemClock(clock_source_pll1_f);
-
- i2c0.start(i2c_config_fast_clock);
-}
-
-void ClockManager::power_down_pll1() {
- /* Power down PLL1 if not needed */
- cgu::pll1::disable();
-}
-
void ClockManager::start_audio_pll() {
cgu::pll0audio::ctrl({
.pd = 1,
@@ -629,11 +444,13 @@ void ClockManager::start_audio_pll() {
cgu::pll0audio::clock_enable();
set_base_audio_clock_divider(1);
- set_clock(LPC_CGU->BASE_AUDIO_CLK, cgu::CLK_SEL::IDIVC);
+
+ LPC_CGU->BASE_AUDIO_CLK.AUTOBLOCK = 1;
+ LPC_CGU->BASE_AUDIO_CLK.CLK_SEL = toUType(cgu::CLK_SEL::IDIVD);
}
void ClockManager::set_base_audio_clock_divider(const size_t divisor) {
- LPC_CGU->IDIVC_CTRL.word =
+ LPC_CGU->IDIVD_CTRL.word =
(0 << 0)
| ((divisor - 1) << 2)
| (1 << 11)
@@ -646,7 +463,3 @@ void ClockManager::stop_audio_pll() {
cgu::pll0audio::power_down();
while( cgu::pll0audio::is_locked() );
}
-
-void ClockManager::stop_peripherals() {
- i2c0.stop();
-}
diff --git a/firmware/application/clock_manager.hpp b/firmware/application/clock_manager.hpp
index 6216d9e996e161562243b3af30541075126f2082..98af620af71467e8a39bb330637a8432bf3456f7 100644
--- a/firmware/application/clock_manager.hpp
+++ b/firmware/application/clock_manager.hpp
@@ -38,18 +38,22 @@ public:
PortaPack, /* 10 MHz TCXO on 20180820 and newer PortaPack revisions. */
External, /* HackRF external clock input SMA, or from PortaPack with TCXO feature. */
};
+ using ReferenceFrequency = uint32_t;
+
+ typedef struct {
+ ReferenceSource source;
+ ReferenceFrequency frequency;
+ } Reference;
constexpr ClockManager(
I2C& i2c0,
si5351::Si5351& clock_generator
) : i2c0(i2c0),
clock_generator(clock_generator),
- reference_source(ReferenceSource::Xtal)/*
- _clock_f(0)*/
+ reference({ReferenceSource::Xtal, 10000000})
{
}
- void init_peripherals();
void init_clock_generator();
void shutdown();
@@ -73,33 +77,26 @@ public:
uint32_t get_frequency_monitor_measurement_in_hertz();
- ReferenceSource get_reference_source() const;
+ Reference get_reference() const;
private:
I2C& i2c0;
si5351::Si5351& clock_generator;
- ReferenceSource reference_source;
- //uint32_t _clock_f;
+ Reference reference;
void set_gp_clkin_to_clkin_direct();
void start_frequency_monitor_measurement(const cgu::CLK_SEL clk_sel);
void wait_For_frequency_monitor_measurement_done();
- void enable_xtal_oscillator();
- void disable_xtal_oscillator();
-
void set_m4_clock_to_irc();
void set_m4_clock_to_pll1();
- void power_down_pll1();
-
- void stop_peripherals();
uint32_t measure_gp_clkin_frequency();
- ClockManager::ReferenceSource detect_reference_source();
- ClockManager::ReferenceSource choose_reference_source();
+ ReferenceSource detect_reference_source();
+ Reference choose_reference();
};
#endif/*__CLOCK_MANAGER_H__*/
diff --git a/firmware/application/event_m0.cpp b/firmware/application/event_m0.cpp
index c36f1219d2089f8fecacb9229604a69a718d7fb1..3737eb5d6b66f6c6cd1e6364c5b07d876145ea6c 100644
--- a/firmware/application/event_m0.cpp
+++ b/firmware/application/event_m0.cpp
@@ -223,8 +223,6 @@ void EventDispatcher::handle_local_queue() {
void EventDispatcher::handle_rtc_tick() {
sd_card::poll_inserted();
-
- portapack::poll_ext_clock();
portapack::temperature_logger.second_tick();
@@ -294,6 +292,19 @@ void EventDispatcher::handle_switches() {
portapack::bl_tick_counter = 0;
+ if( switches_state.count() == 0 ) {
+ // If all keys are released, we are no longer in a key event.
+ in_key_event = false;
+ }
+
+ if( in_key_event ) {
+ // If we're in a key event, return. We will ignore all additional key
+ // presses until the first key is released. We also want to ignore events
+ // where the last key held generates a key event when other pressed keys
+ // are released.
+ return;
+ }
+
if( EventDispatcher::display_sleep ) {
// Swallow event, wake up display.
if( switches_state.any() ) {
@@ -309,6 +320,8 @@ void EventDispatcher::handle_switches() {
if( !event_bubble_key(event) ) {
context.focus_manager().update(top_widget, event);
}
+
+ in_key_event = true;
}
}
}
diff --git a/firmware/application/event_m0.hpp b/firmware/application/event_m0.hpp
index 664bb0c9147c6dbbdc0464d6553395f3e3875d02..8a43c933dc9ec855ae9ae06ff035f0b377dec5d4 100644
--- a/firmware/application/event_m0.hpp
+++ b/firmware/application/event_m0.hpp
@@ -99,6 +99,7 @@ private:
bool sd_card_present = false;
static bool display_sleep;
bool halt = false;
+ bool in_key_event = false;
eventmask_t wait();
void dispatch(const eventmask_t events);
diff --git a/firmware/application/hw/si5351.cpp b/firmware/application/hw/si5351.cpp
index daa6859f2399f7801a0d70469edd7bdcb558c3d5..db8e6bc7c0b8ea44277813417b549d48f07dc5df 100644
--- a/firmware/application/hw/si5351.cpp
+++ b/firmware/application/hw/si5351.cpp
@@ -34,17 +34,16 @@ void Si5351::reset() {
write_register(Register::InterruptStatusSticky, 0x00);
write_register(Register::InterruptStatusMask, 0xf0);
- update_output_enable_control();
+ disable_output_mask(0xff);
write_register(Register::OEBPinEnableControlMask, 0xff);
write_register(Register::PLLInputSource, 0x00);
- _clock_control = {
+ set_clock_control({
ClockControl::power_off(), ClockControl::power_off(),
ClockControl::power_off(), ClockControl::power_off(),
ClockControl::power_off(), ClockControl::power_off(),
ClockControl::power_off(), ClockControl::power_off()
- };
- update_all_clock_control();
+ });
write(std::array<uint8_t, 70> { Register::CLK3_0DisableState });
diff --git a/firmware/application/hw/si5351.hpp b/firmware/application/hw/si5351.hpp
index 0c72e1d37a8ae8143dd5310d24a24605e42fb672..66cd4b1bde78c798a5d848a4efacc9f4c165f91c 100644
--- a/firmware/application/hw/si5351.hpp
+++ b/firmware/application/hw/si5351.hpp
@@ -454,11 +454,7 @@ public:
_clock_control[n].CLK_PDN = ClockControl::ClockPowerDown::Power_Off;
write_register(Register::CLKControl_Base + n, _clock_control[n]);
}
-
- bool clkin_status() {
- return ((device_status() & DeviceStatus::LOS_Mask) == DeviceStatus::LOS_ValidClockAtCLKIN);
- }
-
+
template<size_t N>
void write_registers(const uint8_t reg, const std::array<uint8_t, N>& values) {
std::array<uint8_t, N + 1> data;
@@ -472,7 +468,7 @@ private:
I2C& _bus;
const I2C::address_t _address;
uint8_t _output_enable;
-
+
void update_output_enable_control() {
write_register(Register::OutputEnableControl, ~_output_enable);
}
diff --git a/firmware/application/irq_controls.cpp b/firmware/application/irq_controls.cpp
index 7cc6c52863b5e340d9c7d5b88089010abb3dbd50..c0fb82c8d061ca1816dfcc31a8221859ef8aa1a7 100644
--- a/firmware/application/irq_controls.cpp
+++ b/firmware/application/irq_controls.cpp
@@ -122,11 +122,13 @@ static bool touch_update() {
}
}
-static bool switches_update(const uint8_t switches_raw) {
+static uint8_t switches_raw = 0;
+
+static bool switches_update(const uint8_t raw) {
// TODO: Only fire event on press, not release?
bool switch_changed = false;
for(size_t i=0; i<switch_debounce.size(); i++) {
- switch_changed |= switch_debounce[i].feed((switches_raw >> i) & 1);
+ switch_changed |= switch_debounce[i].feed((raw >> i) & 1);
}
return switch_changed;
@@ -149,7 +151,7 @@ static bool encoder_read() {
void timer0_callback(GPTDriver* const) {
eventmask_t event_mask = 0;
if( touch_update() ) event_mask |= EVT_MASK_TOUCH;
- const auto switches_raw = portapack::io.io_update(touch_pins_configs[touch_phase]);
+ switches_raw = portapack::io.io_update(touch_pins_configs[touch_phase]);
if( switches_update(switches_raw) ) {
event_mask |= EVT_MASK_SWITCHES;
if( encoder_read() ) event_mask |= EVT_MASK_ENCODER;
@@ -206,3 +208,13 @@ EncoderPosition get_encoder_position() {
touch::Frame get_touch_frame() {
return touch_frame;
}
+
+namespace control {
+namespace debug {
+
+uint8_t switches() {
+ return switches_raw;
+}
+
+} /* debug */
+} /* control */
diff --git a/firmware/application/irq_controls.hpp b/firmware/application/irq_controls.hpp
index 2138e935800352d78dd5689c5663050f70306d35..74c578cc1d26c4c15feb357961612d625b305143 100644
--- a/firmware/application/irq_controls.hpp
+++ b/firmware/application/irq_controls.hpp
@@ -44,4 +44,12 @@ SwitchesState get_switches_state();
EncoderPosition get_encoder_position();
touch::Frame get_touch_frame();
+namespace control {
+namespace debug {
+
+uint8_t switches();
+
+} /* debug */
+} /* control */
+
#endif/*__IRQ_CONTROLS_H__*/
diff --git a/firmware/application/portapack.cpp b/firmware/application/portapack.cpp
index 76d0e4ff4b0451ad5ba96993247420cae1e271bd..04016b69c2ad057194d27818e6a9e51edd36e540 100644
--- a/firmware/application/portapack.cpp
+++ b/firmware/application/portapack.cpp
@@ -83,7 +83,6 @@ TransmitterModel transmitter_model;
TemperatureLogger temperature_logger;
bool antenna_bias { false };
-bool prev_clkin_status { false };
uint8_t bl_tick_counter { 0 };
void set_antenna_bias(const bool v) {
@@ -94,22 +93,73 @@ bool get_antenna_bias() {
return antenna_bias;
}
-bool get_ext_clock() {
- return prev_clkin_status;
+static constexpr uint32_t systick_count(const uint32_t clock_source_f) {
+ return clock_source_f / CH_FREQUENCY;
}
-void poll_ext_clock() {
- auto clkin_status = clock_generator.clkin_status();
+static constexpr uint32_t systick_load(const uint32_t clock_source_f) {
+ return systick_count(clock_source_f) - 1;
+}
- if (clkin_status != prev_clkin_status) {
- prev_clkin_status = clkin_status;
- StatusRefreshMessage message { };
- EventDispatcher::send_message(message);
- clock_manager.init_peripherals();
- }
+constexpr uint32_t i2c0_bus_f = 400000;
+constexpr uint32_t i2c0_high_period_ns = 900;
+
+typedef struct {
+ uint32_t clock_f;
+ uint32_t systick_count;
+ uint32_t idivb;
+ uint32_t idivc;
+} clock_config_t;
+static constexpr uint32_t idiv_config(const cgu::CLK_SEL clk_sel, const uint32_t idiv) {
+ return cgu::IDIV_CTRL { 0, idiv-1, 1, clk_sel };
}
+constexpr clock_config_t clock_config_irc {
+ 12000000, systick_load(12000000),
+ idiv_config(cgu::CLK_SEL::IRC, 1),
+ idiv_config(cgu::CLK_SEL::IRC, 1),
+};
+
+constexpr clock_config_t clock_config_pll1_boot {
+ 96000000, systick_load(96000000),
+ idiv_config(cgu::CLK_SEL::PLL1, 9),
+ idiv_config(cgu::CLK_SEL::PLL1, 3),
+};
+
+constexpr clock_config_t clock_config_pll1_step {
+ 100000000, systick_load(100000000),
+ idiv_config(cgu::CLK_SEL::PLL1, 1),
+ idiv_config(cgu::CLK_SEL::PLL1, 1),
+};
+
+constexpr clock_config_t clock_config_pll1 {
+ 200000000, systick_load(200000000),
+ idiv_config(cgu::CLK_SEL::PLL1, 2),
+ idiv_config(cgu::CLK_SEL::PLL1, 1),
+};
+
+constexpr I2CClockConfig i2c_clock_config_400k_boot_clock {
+ .clock_source_f = clock_config_pll1_boot.clock_f,
+ .bus_f = i2c0_bus_f,
+ .high_period_ns = i2c0_high_period_ns,
+};
+
+constexpr I2CClockConfig i2c_clock_config_400k_fast_clock {
+ .clock_source_f = clock_config_pll1.clock_f,
+ .bus_f = i2c0_bus_f,
+ .high_period_ns = i2c0_high_period_ns,
+};
+
+constexpr I2CConfig i2c_config_boot_clock {
+ .high_count = i2c_clock_config_400k_boot_clock.i2c_high_count(),
+ .low_count = i2c_clock_config_400k_boot_clock.i2c_low_count(),
+};
+
+constexpr I2CConfig i2c_config_fast_clock {
+ .high_count = i2c_clock_config_400k_fast_clock.i2c_high_count(),
+ .low_count = i2c_clock_config_400k_fast_clock.i2c_low_count(),
+};
enum class PortaPackModel {
R1_20150901,
@@ -150,119 +200,165 @@ Backlight* backlight() {
: static_cast<portapack::Backlight*>(&backlight_on_off);
}
-static void configure_unused_mcu_peripherals_power_down(const bool power_down) {
- LPC_CGU->IDIVD_CTRL.PD = power_down;
- LPC_CGU->IDIVE_CTRL.PD = power_down;
-
- LPC_CGU->BASE_USB1_CLK.PD = power_down;
- LPC_CGU->BASE_SPI_CLK.PD = power_down;
- LPC_CGU->BASE_PHY_RX_CLK.PD = power_down;
- LPC_CGU->BASE_PHY_TX_CLK.PD = power_down;
- LPC_CGU->BASE_LCD_CLK.PD = power_down;
- LPC_CGU->BASE_SSP0_CLK.PD = power_down;
- LPC_CGU->BASE_UART0_CLK.PD = power_down;
- LPC_CGU->BASE_UART1_CLK.PD = power_down;
- LPC_CGU->BASE_UART2_CLK.PD = power_down;
- LPC_CGU->BASE_UART3_CLK.PD = power_down;
- LPC_CGU->BASE_OUT_CLK.PD = power_down;
- LPC_CGU->BASE_CGU_OUT0_CLK.PD = power_down;
- LPC_CGU->BASE_CGU_OUT1_CLK.PD = power_down;
-}
-
-static void configure_unused_mcu_peripherals(const bool enabled) {
- /* Disabling these peripherals reduces "idle" (PortaPack at main
- * menu) current by 42mA.
- */
-
- /* Some surprising peripherals in use by PortaPack firmware:
- *
- * RITIMER: M0 SysTick substitute (because M0 has no SysTick)
- * TIMER3: M0 cycle/PCLK counter
- * IDIVB: Clock for SPI (set up in bootstrap code)
- * IDIVC: I2S audio clock
- */
-
- const uint32_t clock_run_state = enabled ? 1 : 0;
- const bool power_down = !enabled;
+#define ARRAY_SIZE(a) (sizeof(a)/sizeof(a[0]))
- if( power_down == false ) {
- // Power up peripheral clocks *before* enabling run state.
- configure_unused_mcu_peripherals_power_down(power_down);
- }
+static LPC_CGU_BASE_CLK_Type* const base_clocks_idivc[] = {
+ &LPC_CGU->BASE_PERIPH_CLK,
+ &LPC_CGU->BASE_M4_CLK,
+ &LPC_CGU->BASE_APB1_CLK,
+ &LPC_CGU->BASE_APB3_CLK,
+ &LPC_CGU->BASE_SDIO_CLK,
+ &LPC_CGU->BASE_SSP1_CLK,
+};
- LPC_CCU1->CLK_APB3_I2C1_CFG.RUN = clock_run_state;
- LPC_CCU1->CLK_APB3_DAC_CFG.RUN = clock_run_state;
- LPC_CCU1->CLK_APB3_CAN0_CFG.RUN = clock_run_state;
- LPC_CCU1->CLK_APB1_MOTOCON_PWM_CFG.RUN = clock_run_state;
- LPC_CCU1->CLK_APB1_CAN1_CFG.RUN = clock_run_state;
- LPC_CCU1->CLK_M4_LCD_CFG.RUN = clock_run_state;
- LPC_CCU1->CLK_M4_ETHERNET_CFG.RUN = clock_run_state;
- LPC_CCU1->CLK_M4_USB0_CFG.RUN = clock_run_state;
- LPC_CCU1->CLK_M4_EMC_CFG.RUN = clock_run_state;
- LPC_CCU1->CLK_M4_SCT_CFG.RUN = clock_run_state;
- LPC_CCU1->CLK_M4_USB1_CFG.RUN = clock_run_state;
- LPC_CCU1->CLK_M4_EMCDIV_CFG.RUN = clock_run_state;
- LPC_CCU1->CLK_M4_WWDT_CFG.RUN = clock_run_state;
- LPC_CCU1->CLK_M4_USART0_CFG.RUN = clock_run_state;
- LPC_CCU1->CLK_M4_UART1_CFG.RUN = clock_run_state;
- LPC_CCU1->CLK_M4_SSP0_CFG.RUN = clock_run_state;
- LPC_CCU1->CLK_M4_TIMER1_CFG.RUN = clock_run_state;
- LPC_CCU1->CLK_M4_USART2_CFG.RUN = clock_run_state;
- LPC_CCU1->CLK_M4_USART3_CFG.RUN = clock_run_state;
- LPC_CCU1->CLK_M4_TIMER2_CFG.RUN = clock_run_state;
- LPC_CCU1->CLK_M4_QEI_CFG.RUN = clock_run_state;
-
- LPC_CCU1->CLK_USB1_CFG.RUN = clock_run_state;
- LPC_CCU1->CLK_SPI_CFG.RUN = clock_run_state;
-
- LPC_CCU2->CLK_APB2_USART3_CFG.RUN = clock_run_state;
- LPC_CCU2->CLK_APB2_USART2_CFG.RUN = clock_run_state;
- LPC_CCU2->CLK_APB0_UART1_CFG.RUN = clock_run_state;
- LPC_CCU2->CLK_APB0_USART0_CFG.RUN = clock_run_state;
- LPC_CCU2->CLK_APB0_SSP0_CFG.RUN = clock_run_state;
-
- if( power_down == true ) {
- // Power down peripheral clocks *after* disabling run state.
- configure_unused_mcu_peripherals_power_down(power_down);
+static void set_idivc_base_clocks(const cgu::CLK_SEL clock_source) {
+ for(uint32_t i=0; i<ARRAY_SIZE(base_clocks_idivc); i++) {
+ base_clocks_idivc[i]->AUTOBLOCK = 1;
+ base_clocks_idivc[i]->CLK_SEL = toUType(clock_source);
}
}
-static void disable_unused_mcu_peripheral_clocks() {
- configure_unused_mcu_peripherals(false);
-}
-
-static void enable_unused_mcu_peripheral_clocks() {
- configure_unused_mcu_peripherals(true);
+static void set_clock_config(const clock_config_t& config) {
+ LPC_CGU->IDIVB_CTRL.word = config.idivb;
+ LPC_CGU->IDIVC_CTRL.word = config.idivc;
+ systick_adjust_period(config.systick_count);
+ halLPCSetSystemClock(config.clock_f);
}
static void shutdown_base() {
- clock_manager.shutdown();
+ i2c0.stop();
- chSysDisable();
+ set_clock_config(clock_config_irc);
- systick_stop();
+ cgu::pll1::disable();
- enable_unused_mcu_peripheral_clocks();
+ set_idivc_base_clocks(cgu::CLK_SEL::IRC);
- hackrf::one::reset();
+ cgu::pll1::ctrl({
+ .pd = 1,
+ .bypass = 0,
+ .fbsel = 0,
+ .direct = 1,
+ .psel = 0,
+ .autoblock = 1,
+ .nsel = 0,
+ .msel = 23,
+ .clk_sel = cgu::CLK_SEL::IRC,
+ });
+
+ cgu::pll1::enable();
+ while( !cgu::pll1::is_locked() );
+
+ set_clock_config(clock_config_pll1_boot);
+
+ i2c0.start(i2c_config_boot_clock);
+
+ clock_manager.shutdown();
}
+/* Clock scheme after exiting bootloader in SPIFI mode:
+ *
+ * XTAL_OSC = powered down
+ *
+ * PLL0USB = powered down
+ * PLL0AUDIO = powered down
+ * PLL1 = IRC * 24 = 288 MHz
+ *
+ * IDIVA = IRC / 1 = 12 MHz
+ * IDIVB = PLL1 / 9 = 32 MHz
+ * IDIVC = PLL1 / 3 = 96 MHz
+ * IDIVD = IRC / 1 = 12 MHz
+ * IDIVE = IRC / 1 = 12 MHz
+ *
+ * BASE_USB0_CLK = PLL0USB
+ * BASE_PERIPH_CLK = IRC
+ * BASE_M4_CLK = IDIVC (96 MHz)
+ * BASE_SPIFI_CLK = IDIVB (32 MHZ)
+ *
+ * everything else = IRC
+ */
+
+/* Clock scheme during PortaPack operation:
+ *
+ * XTAL_OSC = powered down
+ *
+ * PLL0USB = powered down
+ * PLL0AUDIO = GP_CLKIN, Fcco=491.52 MHz, Fout=12.288 MHz
+ * PLL1 = GP_CLKIN * 10 = 200 MHz
+ *
+ * IDIVA = IRC / 1 = 12 MHz
+ * IDIVB = PLL1 / 2 = 100 MHz
+ * IDIVC = PLL1 / 1 = 200 MHz
+ * IDIVD = PLL0AUDIO / N (where N is varied depending on decimation factor)
+ * IDIVE = IRC / 1 = 12 MHz
+ *
+ * BASE_USB0_CLK = PLL0USB
+ * BASE_PERIPH_CLK = IRC
+ * BASE_M4_CLK = IDIVC (200 MHz)
+ * BASE_SPIFI_CLK = IDIVB (100 MHZ)
+ * BASE_AUDIO_CLK = IDIVD
+ *
+ * everything else = IRC
+ */
+
bool init() {
- clock_manager.init_peripherals();
+ set_idivc_base_clocks(cgu::CLK_SEL::IDIVC);
+ i2c0.start(i2c_config_boot_clock);
if( !portapack::cpld::update_if_necessary(portapack_cpld_config()) ) {
shutdown_base();
return false;
}
- if( !hackrf::cpld::load_sram() ) {
- chSysHalt();
- }
-
portapack::io.init();
clock_manager.init_clock_generator();
+
+ i2c0.stop();
+
+ set_clock_config(clock_config_irc);
+
+ cgu::pll1::disable();
+
+ /* Incantation from LPC43xx UM10503 section 12.2.1.1, to bring the M4
+ * core clock speed to the 110 - 204MHz range.
+ */
+
+ /* Step into the 90-110MHz M4 clock range */
+ /* Fclkin = 40M
+ * /N=2 = 20M = PFDin
+ * Fcco = PFDin * (M=10) = 200M
+ * Fclk = Fcco / (2*(P=1)) = 100M
+ */
+ cgu::pll1::ctrl({
+ .pd = 1,
+ .bypass = 0,
+ .fbsel = 0,
+ .direct = 0,
+ .psel = 0,
+ .autoblock = 1,
+ .nsel = 1,
+ .msel = 9,
+ .clk_sel = cgu::CLK_SEL::GP_CLKIN,
+ });
+
+ cgu::pll1::enable();
+ while( !cgu::pll1::is_locked() );
+
+ set_clock_config(clock_config_pll1_step);
+
+ /* Delay >50us at 90-110MHz clock speed */
+ volatile uint32_t delay = 1400;
+ while(delay--);
+
+ set_clock_config(clock_config_pll1);
+
+ /* Remove /2P divider from PLL1 output to achieve full speed */
+ cgu::pll1::direct();
+
+ i2c0.start(i2c_config_fast_clock);
+
clock_manager.set_reference_ppb(persistent_memory::correction_ppb());
audio::init(portapack_audio_codec());
@@ -294,125 +390,4 @@ void shutdown() {
shutdown_base();
}
-/* Bootstrap runs from SPIFI on the M4, immediately after the LPC43xx built-in
- * boot ROM runs.
- */
-
-/* After boot ROM executes:
- * PLL1 is at 288MHz (IRC * 24)
- * IDIVB_CTRL = PLL1 / 9 = 32MHz
- * IDIVC_CTRL = PLL1 / 3 = 96MHz
- * BASE_SPIFI_CLK.CLK_SEL = IDIVB
- * BASE_M4_CLK.CLK_SEL = IDIVC?
- */
-
-static void configure_spifi(void) {
- constexpr Pin pins_spifi[] = {
- { 3, 3, PinConfig::spifi_sck(3) }, /* SPIFI_SCK: W25Q80BV.CLK(I), enable input buffer for timing feedback */
- { 3, 4, PinConfig::spifi_inout(3) }, /* SPIFI_SIO3/P82: W25Q80BV.HOLD(IO) */
- { 3, 5, PinConfig::spifi_inout(3) }, /* SPIFI_SIO2/P81: W25Q80BV.WP(IO) */
- { 3, 6, PinConfig::spifi_inout(3) }, /* SPIFI_MISO: W25Q80BV.DO(IO) */
- { 3, 7, PinConfig::spifi_inout(3) }, /* SPIFI_MOSI: W25Q80BV.DI(IO) */
- { 3, 8, PinConfig::spifi_cs(3) }, /* SPIFI_CS/P68: W25Q80BV.CS(I) */
- };
-
- for(const auto& pin : pins_spifi) {
- pin.init();
- }
-
- /* Tweak SPIFI mode */
- LPC_SPIFI->CTRL =
- (0xffff << 0) /* Timeout */
- | (0x1 << 16) /* CS high time in "clocks - 1" */
- | (0 << 21) /* 0: Attempt speculative prefetch on data accesses */
- | (0 << 22) /* 0: No interrupt on command ended */
- | (0 << 23) /* 0: SCK driven low after rising edge at which last bit of command is captured. Stays low while CS# is high. */
- | (0 << 27) /* 0: Cache prefetching enabled */
- | (0 << 28) /* 0: Quad protocol, IO3:0 */
- | (1 << 29) /* 1: Read data sampled on falling edge of clock */
- | (1 << 30) /* 1: Read data is sampled using feedback clock from SCK pin */
- | (0 << 31) /* 0: DMA request disabled */
- ;
-
- /* Throttle up the SPIFI interface to 96MHz (IDIVA=PLL1 / 3) */
- LPC_CGU->IDIVB_CTRL.word =
- ( 0 << 0) /* PD */
- | ( 2 << 2) /* IDIV (/3) */
- | ( 1 << 11) /* AUTOBLOCK */
- | ( 9 << 24) /* PLL1 */
- ;
-}
-
-extern "C" {
-
-void __early_init(void) {
- /*
- * Upon exit from bootloader into SPIFI boot mode:
- *
- * Enabled:
- * PLL1: IRC, M=/24, N=/1, P=/1, autoblock, direct = 288 MHz
- * IDIVA: IRC /1 = 12 MHz
- * IDIVB: PLL1 /9, autoblock = 32 MHz
- * IDIVC: PLL1 /3, autoblock = 96 MHz
- * IDIVD: IRC /1 = 12 MHz
- * IDIVE: IRC /1 = 12 MHz
- * BASE_M4_CLK: IDIVC, autoblock
- * BASE_SPIFI_CLK: IDIVB, autoblock
- *
- * Disabled:
- * XTAL_OSC
- * PLL0USB
- * PLL0AUDIO
- */
- /* LPC43xx M4 takes about 500 usec to get to __early_init
- * Before __early_init, LPC bootloader runs and starts our code. In user code, the process stack
- * is initialized, hardware floating point is initialized, and stacks are zeroed,
- */
- const uint32_t CORTEX_M4_CPUID = 0x410fc240;
- const uint32_t CORTEX_M4_CPUID_MASK = 0xff0ffff0;
-
- if( (SCB->CPUID & CORTEX_M4_CPUID_MASK) == CORTEX_M4_CPUID ) {
- /* Enable unaligned exception handler */
- SCB_CCR |= (1 << 3);
-
- /* Enable MemManage, BusFault, UsageFault exception handlers */
- SCB_SHCSR |= (1 << 18) | (1 << 17) | (1 << 16);
-
- reset();
-
- // disable_unused_mcu_peripheral_clocks();
- configure_spifi();
-
- LPC_CCU1->CLK_M4_M0APP_CFG.RUN = true;
- LPC_CREG->M0APPMEMMAP = LPC_SPIFI_DATA_CACHED_BASE + 0x0;
- LPC_RGU->RESET_CTRL[1] = 0;
-
- /* Prevent the M4 from doing any more initializing by sleep-waiting forever...
- * ...until the M0 resets the M4 with some code to run.
- */
- while(1) {
- __WFE();
- }
- }
-}
-
-void __late_init(void) {
- /*
- * System initializations.
- * - HAL initialization, this also initializes the configured device drivers
- * and performs the board-specific initializations.
- * - Kernel initialization, the main() function becomes a thread and the
- * RTOS is active.
- */
- halInit();
-
- /* After this call, scheduler, systick, heap, etc. are available. */
- /* By doing chSysInit() here, it runs before C++ constructors, which may
- * require the heap.
- */
- chSysInit();
-}
-
-}
-
} /* namespace portapack */
diff --git a/firmware/application/portapack.hpp b/firmware/application/portapack.hpp
index baf95b4059bdf6058bcd9bc2ce66e6ba5d6baf2f..359b14468a76bc16f9d8a41e4e2c49c4ce9c13d0 100644
--- a/firmware/application/portapack.hpp
+++ b/firmware/application/portapack.hpp
@@ -59,9 +59,6 @@ extern TemperatureLogger temperature_logger;
void set_antenna_bias(const bool v);
bool get_antenna_bias();
-void poll_ext_clock();
-bool get_ext_clock();
-
bool init();
void shutdown();
diff --git a/firmware/application/ui/ui_receiver.cpp b/firmware/application/ui/ui_receiver.cpp
index 58cc270bebffc70c584839c34e5d29dc1f6d5957..db4d059d27699149f66b6e7d3088699c9b56b93a 100644
--- a/firmware/application/ui/ui_receiver.cpp
+++ b/firmware/application/ui/ui_receiver.cpp
@@ -252,12 +252,10 @@ FrequencyOptionsView::FrequencyOptionsView(
&field_step,
});
- if( portapack::clock_manager.get_reference_source() == ClockManager::ReferenceSource::External ) {
- add_child(&text_ext);
- } else {
+ if( portapack::clock_manager.get_reference().source == ClockManager::ReferenceSource::Xtal ) {
add_child(&field_ppm);
+ add_child(&text_ppm);
}
- add_child(&text_ppm);
}
void FrequencyOptionsView::set_step(rf::Frequency f) {
diff --git a/firmware/application/ui_navigation.cpp b/firmware/application/ui_navigation.cpp
index 34e765dceeb0443befc4be958f48d5c65c802c02..997c0e4df0abe84148d1a349bfddd55c2581a0fa 100644
--- a/firmware/application/ui_navigation.cpp
+++ b/firmware/application/ui_navigation.cpp
@@ -159,7 +159,7 @@ void SystemStatusView::refresh() {
button_bias_tee.set_foreground(ui::Color::light_grey());
}
- if (portapack::get_ext_clock()) {
+ if (portapack::clock_manager.get_reference().source == ClockManager::ReferenceSource::External) {
image_clock_status.set_bitmap(&bitmap_icon_clk_ext);
button_bias_tee.set_foreground(ui::Color::green());
} else {
diff --git a/firmware/baseband/CMakeLists.txt b/firmware/baseband/CMakeLists.txt
index 179e0b18ce297b68be2e087b631156c49f04bb27..b56cae869c9da08555107b87e92275e73b2d3ced 100644
--- a/firmware/baseband/CMakeLists.txt
+++ b/firmware/baseband/CMakeLists.txt
@@ -73,7 +73,7 @@ set(USE_FPU hard)
#
# Imported source files and paths
-include(${CHIBIOS_PORTAPACK}/boards/GSG_HACKRF_ONE/board.cmake)
+include(${CHIBIOS_PORTAPACK}/boards/PORTAPACK_BASEBAND/board.cmake)
include(${CHIBIOS_PORTAPACK}/os/hal/platforms/LPC43xx_M4/platform.cmake)
include(${CHIBIOS}/os/hal/hal.cmake)
include(${CHIBIOS_PORTAPACK}/os/ports/GCC/ARMCMx/LPC43xx_M4/port.cmake)
@@ -470,9 +470,9 @@ DeclareTargets(PWFM wfm_audio)
add_custom_command(
OUTPUT hackrf.bin hackrf.img
- COMMAND ${STRIP_DFU} ${HACKRF_FIRMWARE_IMAGE} hackrf.bin
+ COMMAND ${STRIP_DFU} ${HACKRF_FIRMWARE_DFU_IMAGE} hackrf.bin
COMMAND ${MAKE_IMAGE_CHUNK} hackrf.bin HRF1 hackrf.img
- DEPENDS ${HACKRF_FIRMWARE_IMAGE} ${STRIP_DFU} ${MAKE_IMAGE_CHUNK}
+ DEPENDS hackrf ${STRIP_DFU} ${MAKE_IMAGE_CHUNK}
VERBATIM
)
diff --git a/firmware/baseband/mcuconf.h b/firmware/baseband/mcuconf.h
index 0accb63ab5a8248e3417d9c54e2f068ab64b4786..bc4d61da372c9979b69134091938f7140e2486f4 100755
--- a/firmware/baseband/mcuconf.h
+++ b/firmware/baseband/mcuconf.h
@@ -46,7 +46,3 @@
#if !defined(LPC43XX_M4_CLK) || defined(__DOXYGEN__)
#define LPC43XX_M4_CLK 200000000
#endif
-
-#if !defined(LPC43XX_M4_CLK_SRC) || defined(__DOXYGEN__)
-#define LPC43XX_M4_CLK_SRC 0x09
-#endif
diff --git a/firmware/bootstrap/bootstrap.bin b/firmware/bootstrap/bootstrap.bin
new file mode 100755
index 0000000000000000000000000000000000000000..c7875d1adddfe95c53051d1862b3219aa1aec096
Binary files /dev/null and b/firmware/bootstrap/bootstrap.bin differ
diff --git a/firmware/bootstrap/bootstrap_pad.bin b/firmware/bootstrap/bootstrap_pad.bin
new file mode 100755
index 0000000000000000000000000000000000000000..2223c02e47db570e1f77236d76b99b7bd9b76a14
Binary files /dev/null and b/firmware/bootstrap/bootstrap_pad.bin differ
diff --git a/firmware/chibios-portapack/boards/GSG_HACKRF_ONE/board.c b/firmware/chibios-portapack/boards/GSG_HACKRF_ONE/board.c
deleted file mode 100755
index ea34a6d21ad61edb15b8b5b32de86178f3c140b0..0000000000000000000000000000000000000000
--- a/firmware/chibios-portapack/boards/GSG_HACKRF_ONE/board.c
+++ /dev/null
@@ -1,330 +0,0 @@
-/*
- ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
- Copyright (C) 2014 Jared Boone, ShareBrained Technology
-
- Licensed under the Apache License, Version 2.0 (the "License");
- you may not use this file except in compliance with the License.
- You may obtain a copy of the License at
-
- http://www.apache.org/licenses/LICENSE-2.0
-
- Unless required by applicable law or agreed to in writing, software
- distributed under the License is distributed on an "AS IS" BASIS,
- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- See the License for the specific language governing permissions and
- limitations under the License.
-*/
-
-#include "ch.h"
-#include "hal.h"
-
-#if HAL_USE_PAL || defined(__DOXYGEN__)
-/**
- * @brief PAL setup.
- * @details Digital I/O ports static configuration as defined in @p board.h.
- * This variable is used by the HAL when initializing the PAL driver.
- */
-/**
- * CoolRunner (HackRF) CPLD:
- * CoolRunner-II devices have internal pull-ups on TDI, TMS, and TCK.
- * It is not necessary to externally terminate JTAG pins with internal termination; they can be
- * left floating. External pull-ups on pins with internal termination is allowed, but not
- * necessary. External pull-down termination is not recommended as it would conflict with
- * the internal pull-ups
- *
- * LPC43xx pull-ups come on line when 3V3 supply voltage reaches about 2V.
- *
- * 3V3 supply:
- * Ramps up in about 1ms.
- *
- * 1V8 supply:
- * Ramps up in about 1ms.
- * EN1V8 has a 10K pull-down on the HackRF and is pulled up (very gently) by the LPC43xx
- * bootloader at boot time. So until the EN1V8 pin is reconfigured as an output, the enable
- * pin on the 1V8 supply sits at about 0.55V, which feels untidy...
- * 1V8 supply is activated when GPIO is driven high by user code.
- */
-const PALConfig pal_default_config = {
- .P = {
- { // GPIO0
- .data
- = (1 << 15) // CS_XCVR
- | (1 << 14) // AMP_BYPASS
- | (0 << 9) // 10K PD, BOOT1
- | (1 << 8) // 10K PU, BOOT0
- ,
- .dir
- = (1 << 15) // CS_XCVR
- | (1 << 14) // AMP_BYPASS
- | (0 << 9) // 10K PD, BOOT1
- | (0 << 8) // 10K PU, BOOT0
- },
- { // GPIO1
- .data
- = (1 << 13) // PortaPack P2_13/DIR
- | (1 << 12) // !RX_AMP_PWR
- | (0 << 11) // RX_AMP
- | (1 << 10) // 10K PD, BOOT3, PortaPack P2_9/LCD_WRX
- | (1 << 8) // PortaPack CPLD.TDO(O)
- | (1 << 1) // PortaPack CPLD.TMS(I)
- | (0 << 0) // !MIX_BYPASS
- ,
- .dir
- = (1 << 13) // PortaPack P2_13/DIR
- | (1 << 12) // !RX_AMP_PWR
- | (1 << 11) // RX_AMP
- | (1 << 10) // 10K PD, BOOT3, PortaPack P2_9/LCD_WRX
- | (0 << 8) // PortaPack CPLD.TDO(O) (input with pull up)
- | (0 << 1) // PortaPack CPLD.TMS(I) (output only when needed, pull up internal to CPLD)
- | (1 << 0) // !MIX_BYPASS
- },
- { // GPIO2
- .data
- = (0 << 15) // TX_AMP
- | (0 << 11) // TX_MIX_BP
- | (1 << 14) // MIXER_RESETX, 10K PU
- | (1 << 13) // MIXER_ENX, 10K PU
- | (1 << 12) // RX_MIX_BP
- | (0 << 10) // LP
- | (1 << 9) // !VAA_ENABLE
- | (0 << 8) // LED3 (TX)
- | (1 << 7) // CS_AD
- | (0 << 6) // XCVR_EN, 10K PD
- | (0 << 5) // RXENABLE
- | (0 << 4) // TXENABLE
- | (0 << 2) // LED2 (RX)
- | (0 << 1) // LED1 (USB)
- | (1 << 0) // HP
- ,
- .dir
- = (1 << 15) // TX_AMP
- | (1 << 14) // MIXER_RESETX, 10K PU
- | (1 << 13) // MIXER_ENX, 10K PU
- | (1 << 12) // RX_MIX_BP
- | (1 << 11) // TX_MIX_BP
- | (1 << 10) // LP
- | (1 << 9) // !VAA_ENABLE
- | (1 << 8) // LED3 (TX)
- | (1 << 7) // CS_AD
- | (1 << 6) // XCVR_EN, 10K PD
- | (1 << 5) // RXENABLE
- | (1 << 4) // TXENABLE
- | (1 << 2) // LED2 (RX)
- | (1 << 1) // LED1 (USB)
- | (1 << 0) // HP
- },
- { // GPIO3
- .data
- = (0 << 15) // PortaPack GPIO3_15(IO)
- | (0 << 14) // PortaPack GPIO3_14(IO)
- | (0 << 13) // PortaPack GPIO3_13(IO)
- | (0 << 12) // PortaPack GPIO3_12(IO)
- | (0 << 11) // PortaPack GPIO3_11(IO)
- | (0 << 10) // PortaPack GPIO3_10(IO)
- | (0 << 9) // PortaPack GPIO3_9(IO)
- | (0 << 8) // PortaPack GPIO3_8(IO)
- | (0 << 7) // VREGMODE
- | (1 << 6) // EN1V8, 10K PD
- | (1 << 5) // !TX_AMP_PWR, 10K PU
- | (1 << 4) // HackRF CPLD.TMS(I) (output only when needed, pull-up internal to CPLD when 1V8 present)
- | (1 << 1) // HackRF CPLD.TDI(I), PortaPack I2S0_RX_SDA(O), PortaPack CPLD.TDI(I) (output only when needed, pull-up internal to CPLD when 1V8 present)
- | (1 << 0) // HackRF CPLD.TCK(I), PortaPack CPLD.TCK(I) (output only when needed, pull-up internal to CPLD when 1V8 present)
- ,
- .dir
- = (0 << 15) // PortaPack GPIO3_15(IO)
- | (0 << 14) // PortaPack GPIO3_14(IO)
- | (0 << 13) // PortaPack GPIO3_13(IO)
- | (0 << 12) // PortaPack GPIO3_12(IO)
- | (0 << 11) // PortaPack GPIO3_11(IO)
- | (0 << 10) // PortaPack GPIO3_10(IO)
- | (0 << 9) // PortaPack GPIO3_9(IO)
- | (0 << 8) // PortaPack GPIO3_8(IO)
- | (1 << 7) // VREGMODE
- | (1 << 6) // EN1V8, 10K PD
- | (1 << 5) // !TX_AMP_PWR, 10K PU
- | (0 << 4) // HackRF CPLD.TMS(I) (output only when needed, pull-up internal to CPLD when 1V8 present)
- | (0 << 1) // HackRF CPLD.TDI(I), PortaPack I2S0_RX_SDA(O), PortaPack CPLD.TDI(I) (output only when needed, pull-up internal to CPLD when 1V8 present)
- | (0 << 0) // HackRF CPLD.TCK(I), PortaPack CPLD.TCK(I) (output only when needed, pull-up internal to CPLD when 1V8 present)
- },
- { // GPIO4
- .data = 0,
- .dir = 0
- },
- { // GPIO5
- .data
- = (1 << 18) // HackRF CPLD.TDO(O) (input with pull up)
- | (0 << 15) // TX
- | (1 << 16) // MIX_BYPASS
- | (1 << 5) // RX
- | (1 << 4) // PortaPack P2_4/LCD_RDX
- | (0 << 3) // PortaPack P2_3/LCD_TE
- | (0 << 1) // PortaPack P2_1/ADDR
- | (1 << 0) // PortaPack P2_0/IO_STBX
- ,
- .dir
- = (0 << 18) // HackRF CPLD.TDO(O) (input with pull up)
- | (1 << 16) // MIX_BYPASS
- | (1 << 15) // TX
- | (1 << 5) // RX
- | (1 << 4) // PortaPack P2_4/LCD_RDX
- | (0 << 3) // PortaPack P2_3/LCD_TE
- | (1 << 1) // PortaPack P2_1/ADDR
- | (1 << 0) // PortaPack P2_0/IO_STBX
- },
- { // GPIO6
- .data = 0,
- .dir = 0
- },
- { // GPIO7
- .data = 0,
- .dir = 0
- },
- },
- .SCU = {
- /* Configure GP_CLKIN as soon as possible. It's an output at boot time, and the Si5351C doesn't
- * reset when the reset button is pressed, so it could still be output enabled.
- */
- { 4, 7, .config={ .MODE=1, .EPD=0, .EPUN=1, .EHS=0, .EZI=1, .ZIF=1 } }, /* GP_CLKIN/P72/MCU_CLK: SI5351C.CLK7(O) */
-
- /* HackRF: LEDs. Configured early so we can use them to indicate boot status. */
- { 4, 1, .config={ .MODE=0, .EPD=0, .EPUN=1, .EHS=0, .EZI=0, .ZIF=0 } }, /* LED1: LED1.A(I) */
- { 4, 2, .config={ .MODE=0, .EPD=0, .EPUN=1, .EHS=0, .EZI=0, .ZIF=0 } }, /* LED2: LED2.A(I) */
- { 6, 12, .config={ .MODE=0, .EPD=0, .EPUN=1, .EHS=0, .EZI=0, .ZIF=0 } }, /* LED3: LED3.A(I) */
-
- /* Power control */
- { 5, 0, .config={ .MODE=0, .EPD=0, .EPUN=1, .EHS=0, .EZI=0, .ZIF=0 } }, /* !VAA_ENABLE: 10K PU, Q3.G(I), power to VAA */
- { 6, 10, .config={ .MODE=0, .EPD=0, .EPUN=1, .EHS=0, .EZI=0, .ZIF=0 } }, /* EN1V8/P70: 10K PD, TPS62410.EN2(I), 1V8LED.A(I) */
- { 6, 11, .config={ .MODE=0, .EPD=0, .EPUN=1, .EHS=0, .EZI=0, .ZIF=0 } }, /* VREGMODE/P69: TPS62410.MODE/DATA(I) */
-
- /* HackRF: I2C0 */
- /* Glitch filter operates at 3ns instead of 50ns due to the WM8731
- * returning an ACK very fast (170ns) and confusing the I2C state
- * machine into thinking there was a bus error. It looks like the
- * MCU sees SDA fall before SCL falls, indicating a START at the
- * point an ACK is expected. With the glitch filter off or set to
- * 3ns, it's probably still a bit tight timing-wise, but improves
- * reliability on some problem units.
- */
- { 25, 1,
- .config = {
- .word = // SFSI2C0
- (1U << 0) // SCL: 3ns glitch
- | (0U << 2) // SCL: Standard/Fast mode
- | (1U << 3) // SCL: Input enabled
- | (0U << 7) // SCL: Enable input glitch filter
- | (1U << 8) // SDA: 3ns glitch
- | (0U << 10) // SDA: Standard/Fast mode
- | (1U << 11) // SDA: Input enabled
- | (0U << 15) // SDA: Enable input glitch filter
- }
- },
-
- /* Radio section control */
- { 1, 3, .config={ .MODE=5, .EPD=0, .EPUN=1, .EHS=0, .EZI=1, .ZIF=0 } }, /* SSP1_MISO/P41: MAX2837.DOUT(O) */
- { 1, 4, .config={ .MODE=5, .EPD=1, .EPUN=1, .EHS=0, .EZI=0, .ZIF=0 } }, /* SSP1_MOSI/P40: MAX2837.DIN(I), MAX5864.DIN(I) */
- { 1, 7, .config={ .MODE=0, .EPD=0, .EPUN=1, .EHS=0, .EZI=0, .ZIF=0 } }, /* !MIX_BYPASS/P35: U1.VCTL1(I), U11.VCTL2(I), U9.V2(I) */
- { 1, 19, .config={ .MODE=1, .EPD=0, .EPUN=1, .EHS=0, .EZI=0, .ZIF=0 } }, /* SSP1_SCK/P39: MAX2837.SCLK(I), MAX5864.SCLK(I) */
- { 1, 20, .config={ .MODE=0, .EPD=0, .EPUN=1, .EHS=0, .EZI=0, .ZIF=0 } }, /* CS_XCVR/P53: MAX2837.CS(I) */
- { 2, 5, .config={ .MODE=4, .EPD=0, .EPUN=0, .EHS=0, .EZI=0, .ZIF=0 } }, /* RX/P43: U7.VCTL1(I), U10.VCTL1(I), U2.VCTL1(I) */
- { 2, 6, .config={ .MODE=4, .EPD=0, .EPUN=1, .EHS=0, .EZI=0, .ZIF=0 } }, /* MIXER_SCLK/P31: 33pF, RFFC5072.SCLK(I) */
- { 2, 10, .config={ .MODE=0, .EPD=0, .EPUN=1, .EHS=0, .EZI=0, .ZIF=0 } }, /* AMP_BYPASS/P50: U14.V2(I), U12.V2(I) */
- { 2, 11, .config={ .MODE=0, .EPD=0, .EPUN=1, .EHS=0, .EZI=0, .ZIF=0 } }, /* RX_AMP/P49: U12.V1(I), U14.V3(I) */
- { 2, 12, .config={ .MODE=0, .EPD=0, .EPUN=1, .EHS=0, .EZI=0, .ZIF=0 } }, /* !RX_AMP_PWR/P52: 10K PU, Q1.G(I), power to U13 (RX amp) */
- { 4, 0, .config={ .MODE=0, .EPD=0, .EPUN=1, .EHS=0, .EZI=0, .ZIF=0 } }, /* HP/P44: U6.VCTL1(I), U5.VCTL2(I) */
- { 4, 4, .config={ .MODE=0, .EPD=0, .EPUN=1, .EHS=0, .EZI=0, .ZIF=0 } }, /* TXENABLE/P55: MAX2837.TXENABLE(I) */
- { 4, 5, .config={ .MODE=0, .EPD=0, .EPUN=1, .EHS=0, .EZI=0, .ZIF=0 } }, /* RXENABLE/P56: MAX2837.RXENABLE(I) */
- { 4, 6, .config={ .MODE=0, .EPD=0, .EPUN=1, .EHS=0, .EZI=0, .ZIF=0 } }, /* XCVR_EN: 10K PD, MAX2837.ENABLE(I) */
- { 5, 1, .config={ .MODE=0, .EPD=0, .EPUN=1, .EHS=0, .EZI=0, .ZIF=0 } }, /* LP/P45: U6.VCTL2(I), U5.VCTL1(I) */
- { 5, 2, .config={ .MODE=0, .EPD=0, .EPUN=1, .EHS=0, .EZI=0, .ZIF=0 } }, /* TX_MIX_BP/P46: U9.V1(I) */
- { 5, 3, .config={ .MODE=0, .EPD=0, .EPUN=1, .EHS=0, .EZI=0, .ZIF=0 } }, /* RX_MIX_BP/P47: U9.V3(I) */
- { 5, 4, .config={ .MODE=0, .EPD=0, .EPUN=1, .EHS=0, .EZI=0, .ZIF=0 } }, /* MIXER_ENX/P32: 10K PU, 33pF, RFFC5072.ENX(I) */
- { 5, 5, .config={ .MODE=0, .EPD=0, .EPUN=1, .EHS=0, .EZI=0, .ZIF=0 } }, /* MIXER_RESETX/P33: 10K PU, 33pF, RFFC5072.RESETX(I) */
- { 5, 6, .config={ .MODE=0, .EPD=0, .EPUN=1, .EHS=0, .EZI=0, .ZIF=0 } }, /* TX_AMP/P48: U12.V3(I), U14.V1(I) */
- { 5, 7, .config={ .MODE=0, .EPD=0, .EPUN=1, .EHS=0, .EZI=0, .ZIF=0 } }, /* CS_AD/P54: MAX5864.CS(I) */
- { 6, 4, .config={ .MODE=0, .EPD=0, .EPUN=1, .EHS=0, .EZI=1, .ZIF=0 } }, /* MIXER_SDATA/P27: 33pF, RFFC5072.SDATA(IO) */
- { 6, 7, .config={ .MODE=4, .EPD=0, .EPUN=1, .EHS=0, .EZI=0, .ZIF=0 } }, /* TX/P42: U7.VCTL2(I), U10.VCTL2(I), U2.VCTL2(I) */
- { 6, 8, .config={ .MODE=4, .EPD=0, .EPUN=1, .EHS=0, .EZI=0, .ZIF=0 } }, /* MIX_BYPASS/P34: U1.VCTL2(I), U11.VCTL1(I) */
- { 6, 9, .config={ .MODE=0, .EPD=0, .EPUN=1, .EHS=0, .EZI=0, .ZIF=0 } }, /* !TX_AMP_PWR/P51: 10K PU, Q2.G(I), power to U25 (TX amp) */
-
- /* SGPIO for sample transfer interface to HackRF CPLD. */
- { 0, 0, .config={ .MODE=3, .EPD=0, .EPUN=1, .EHS=1, .EZI=1, .ZIF=1 } }, /* SGPIO0/P75/BANK2F3M3: CPLD.89/HOST_DATA0(IO) */
- { 0, 1, .config={ .MODE=3, .EPD=0, .EPUN=1, .EHS=1, .EZI=1, .ZIF=1 } }, /* SGPIO1/BANK2F3M5: CPLD.79/HOST_DATA1(IO) */
- { 1, 15, .config={ .MODE=2, .EPD=0, .EPUN=1, .EHS=1, .EZI=1, .ZIF=1 } }, /* SGPIO2/BANK2F3M9: CPLD.74/HOST_DATA2(IO) */
- { 1, 16, .config={ .MODE=2, .EPD=0, .EPUN=1, .EHS=1, .EZI=1, .ZIF=1 } }, /* SGPIO3/BANK2F3M10: CPLD.72/HOST_DATA3(IO) */
- { 6, 3, .config={ .MODE=2, .EPD=0, .EPUN=1, .EHS=1, .EZI=1, .ZIF=1 } }, /* SGPIO4/BANK2F3M14: CPLD.67/HOST_DATA4(IO) */
- { 6, 6, .config={ .MODE=2, .EPD=0, .EPUN=1, .EHS=1, .EZI=1, .ZIF=1 } }, /* SGPIO5/BANK2F3M15: CPLD.64/HOST_DATA5(IO) */
- { 2, 2, .config={ .MODE=0, .EPD=0, .EPUN=1, .EHS=1, .EZI=1, .ZIF=1 } }, /* SGPIO6/BANK2F3M16: CPLD.61/HOST_DATA6(IO) */
- { 1, 0, .config={ .MODE=6, .EPD=0, .EPUN=1, .EHS=1, .EZI=1, .ZIF=1 } }, /* SGPIO7/P76/BANK2F3M7: CPLD.77/HOST_DATA7(IO) */
- { 9, 6, .config={ .MODE=6, .EPD=0, .EPUN=1, .EHS=0, .EZI=1, .ZIF=1 } }, /* SGPIO8/SGPIO_CLK/P60: SI5351C.CLK2(O) */
- { 4, 3, .config={ .MODE=7, .EPD=0, .EPUN=1, .EHS=0, .EZI=1, .ZIF=1 } }, /* SGPIO9/P77/BANK2F3M1: CPLD.91/HOST_CAPTURE(O) */
- { 1, 14, .config={ .MODE=6, .EPD=0, .EPUN=0, .EHS=1, .EZI=0, .ZIF=0 } }, /* SGPIO10/P78/BANK2F3M8: CPLD.76/HOST_DISABLE(I) */
- { 1, 17, .config={ .MODE=6, .EPD=0, .EPUN=0, .EHS=1, .EZI=0, .ZIF=0 } }, /* SGPIO11/P79/BANK2F3M11: CPLD.71/HOST_DIRECTION(I) */
- { 1, 18, .config={ .MODE=0, .EPD=1, .EPUN=1, .EHS=0, .EZI=0, .ZIF=0 } }, /* SGPIO12/BANK2F3M12: CPLD.70/HOST_INVERT(I) */
- { 4, 8, .config={ .MODE=4, .EPD=0, .EPUN=0, .EHS=0, .EZI=0, .ZIF=0 } }, /* SGPIO13/BANK2F3M2: CPLD.90/HOST_DECIM_SEL0(I) */
- { 4, 9, .config={ .MODE=4, .EPD=0, .EPUN=0, .EHS=0, .EZI=0, .ZIF=0 } }, /* SGPIO14/BANK2F3M4: CPLD.81/HOST_DECIM_SEL1(I) */
- { 4, 10, .config={ .MODE=4, .EPD=0, .EPUN=0, .EHS=0, .EZI=0, .ZIF=0 } }, /* SGPIO15/BANK2F3M6: CPLD.78/HOST_DECIM_SEL2(I) */
-
- /* HackRF: CPLD */
- { 6, 1, .config={ .MODE=0, .EPD=0, .EPUN=1, .EHS=0, .EZI=0, .ZIF=0 } }, /* CPLD_TCK: CPLD.TCK(I), PortaPack CPLD.TCK(I) */
- { 6, 2, .config={ .MODE=0, .EPD=0, .EPUN=1, .EHS=0, .EZI=1, .ZIF=0 } }, /* CPLD_TDI: CPLD.TDI(I), PortaPack I2S0_RX_SDA(O), PortaPack CPLD.TDI(I) */
- { 6, 5, .config={ .MODE=0, .EPD=0, .EPUN=1, .EHS=0, .EZI=0, .ZIF=0 } }, /* CPLD_TMS: CPLD.TMS(I) */
- { 9, 5, .config={ .MODE=4, .EPD=0, .EPUN=1, .EHS=0, .EZI=1, .ZIF=0 } }, /* CPLD_TDO: CPLD.TDO(O) */
-
- /* PortaPack */
- { 1, 5, .config={ .MODE=0, .EPD=0, .EPUN=0, .EHS=0, .EZI=1, .ZIF=0 } }, /* SD_POW: PortaPack CPLD.TDO(O) */
- { 1, 8, .config={ .MODE=0, .EPD=0, .EPUN=0, .EHS=0, .EZI=0, .ZIF=0 } }, /* SD_VOLT0: PortaPack CPLD.TMS(I) */
- { 2, 0, .config={ .MODE=4, .EPD=0, .EPUN=1, .EHS=0, .EZI=1, .ZIF=0 } }, /* U0_TXD: PortaPack P2_0/IO_STBX */
- { 2, 1, .config={ .MODE=4, .EPD=0, .EPUN=1, .EHS=0, .EZI=1, .ZIF=0 } }, /* U0_RXD: PortaPack P2_1/ADDR */
- { 2, 3, .config={ .MODE=4, .EPD=0, .EPUN=1, .EHS=0, .EZI=1, .ZIF=0 } }, /* I2C1_SDA: PortaPack P2_3/LCD_TE */
- { 2, 4, .config={ .MODE=4, .EPD=0, .EPUN=1, .EHS=0, .EZI=1, .ZIF=0 } }, /* I2C1_SCL: PortaPack P2_4/LCD_RDX */
- { 2, 8, .config={ .MODE=4, .EPD=0, .EPUN=1, .EHS=0, .EZI=0, .ZIF=0 } }, /* P2_8: 10K PD, BOOT2, DFU switch, PortaPack P2_8/<unused> */
- { 2, 9, .config={ .MODE=0, .EPD=0, .EPUN=1, .EHS=0, .EZI=1, .ZIF=0 } }, /* P2_9: 10K PD, BOOT3, PortaPack P2_9/LCD_WRX */
- { 2, 13, .config={ .MODE=0, .EPD=0, .EPUN=1, .EHS=0, .EZI=1, .ZIF=0 } }, /* P2_13: PortaPack P2_13/DIR */
- { 7, 0, .config={ .MODE=0, .EPD=1, .EPUN=1, .EHS=0, .EZI=1, .ZIF=0 } }, /* GPIO3_8: PortaPack GPIO3_8(IO) */
- { 7, 1, .config={ .MODE=0, .EPD=1, .EPUN=1, .EHS=0, .EZI=1, .ZIF=0 } }, /* GPIO3_9: PortaPack GPIO3_9(IO) */
- { 7, 2, .config={ .MODE=0, .EPD=1, .EPUN=1, .EHS=0, .EZI=1, .ZIF=0 } }, /* GPIO3_10: PortaPack GPIO3_10(IO) */
- { 7, 3, .config={ .MODE=0, .EPD=1, .EPUN=1, .EHS=0, .EZI=1, .ZIF=0 } }, /* GPIO3_11: PortaPack GPIO3_11(IO) */
- { 7, 4, .config={ .MODE=0, .EPD=1, .EPUN=1, .EHS=0, .EZI=1, .ZIF=0 } }, /* GPIO3_12: PortaPack GPIO3_12(IO) */
- { 7, 5, .config={ .MODE=0, .EPD=1, .EPUN=1, .EHS=0, .EZI=1, .ZIF=0 } }, /* GPIO3_13: PortaPack GPIO3_13(IO) */
- { 7, 6, .config={ .MODE=0, .EPD=1, .EPUN=1, .EHS=0, .EZI=1, .ZIF=0 } }, /* GPIO3_14: PortaPack GPIO3_14(IO) */
- { 7, 7, .config={ .MODE=0, .EPD=1, .EPUN=1, .EHS=0, .EZI=1, .ZIF=0 } }, /* GPIO3_15: PortaPack GPIO3_15(IO) */
-
- /* PortaPack: Audio */
- { 3, 0, .config={ .MODE=2, .EPD=0, .EPUN=0, .EHS=0, .EZI=1, .ZIF=0 } }, /* I2S0_TX_SCK: PortaPack I2S0_TX_SCK(I) */
- { 3, 1, .config={ .MODE=0, .EPD=0, .EPUN=0, .EHS=0, .EZI=1, .ZIF=0 } }, /* I2S0_RX_WS: PortaPack I2S0_TX_WS(I). Input enabled to fold back into RX. */
- { 3, 2, .config={ .MODE=0, .EPD=0, .EPUN=0, .EHS=0, .EZI=0, .ZIF=0 } }, /* I2S0_RX_SDA: PortaPack I2S0_TX_SDA(I) */
- { 24, 2, .config={ .MODE=6, .EPD=1, .EPUN=1, .EHS=0, .EZI=0, .ZIF=0 } }, /* I2S0_TX_CLK: PortaPack I2S0_TX_MCLK */
-
- /* PortaPack: SD card socket */
- { 24, 0, .config={ .MODE=4, .EPD=1, .EPUN=1, .EHS=0, .EZI=1, .ZIF=1 } }, /* SD_CLK: PortaPack SD.CLK, enable input buffer for timing feedback? */
- { 1, 6, .config={ .MODE=7, .EPD=0, .EPUN=0, .EHS=0, .EZI=1, .ZIF=1 } }, /* SD_CMD: PortaPack SD.CMD(IO) */
- { 1, 9, .config={ .MODE=7, .EPD=0, .EPUN=0, .EHS=0, .EZI=1, .ZIF=1 } }, /* SD_DAT0: PortaPack SD.DAT0(IO) */
- { 1, 10, .config={ .MODE=7, .EPD=0, .EPUN=0, .EHS=0, .EZI=1, .ZIF=1 } }, /* SD_DAT1: PortaPack SD.DAT1(IO) */
- { 1, 11, .config={ .MODE=7, .EPD=0, .EPUN=0, .EHS=0, .EZI=1, .ZIF=1 } }, /* SD_DAT2: PortaPack SD.DAT2(IO) */
- { 1, 12, .config={ .MODE=7, .EPD=0, .EPUN=0, .EHS=0, .EZI=1, .ZIF=1 } }, /* SD_DAT3: PortaPack SD.DAT3(IO) */
- { 1, 13, .config={ .MODE=7, .EPD=0, .EPUN=0, .EHS=0, .EZI=1, .ZIF=0 } }, /* SD_CD: PortaPack SD.CD(O) */
-
- /* Miscellaneous */
- { 1, 1, .config={ .MODE=0, .EPD=0, .EPUN=1, .EHS=0, .EZI=0, .ZIF=0 } }, /* P1_1/P74: 10K PU, BOOT0 */
- { 1, 2, .config={ .MODE=0, .EPD=0, .EPUN=1, .EHS=0, .EZI=0, .ZIF=0 } }, /* P1_2/P73: 10K PD, BOOT1 */
- { 2, 7, .config={ .MODE=0, .EPD=0, .EPUN=1, .EHS=0, .EZI=0, .ZIF=0 } }, /* ISP: 10K PU, Unused */
- { 6, 0, .config={ .MODE=0, .EPD=0, .EPUN=0, .EHS=0, .EZI=0, .ZIF=0 } }, /* I2S0_RX_MCLK: Unused */
- { 15, 4, .config={ .MODE=7, .EPD=0, .EPUN=0, .EHS=0, .EZI=0, .ZIF=0 } }, /* I2S0_RX_SCK: Unused */
- }
-};
-#endif
-
-/**
- * @brief Early initialization code.
- * @details This initialization must be performed just after stack setup
- * and before any other initialization.
- */
-// void __early_init(void) {
-// }
-
-/**
- * @brief Board-specific initialization code.
- * @todo Add your board-specific code, if any.
- */
-void boardInit(void) {
-}
diff --git a/firmware/chibios-portapack/boards/GSG_HACKRF_ONE/board.cmake b/firmware/chibios-portapack/boards/GSG_HACKRF_ONE/board.cmake
deleted file mode 100644
index 5befc3f1f8185dcfc24f4fca8edeba5f2e905dd8..0000000000000000000000000000000000000000
--- a/firmware/chibios-portapack/boards/GSG_HACKRF_ONE/board.cmake
+++ /dev/null
@@ -1,9 +0,0 @@
-# List of all the board related files.
-set(BOARDSRC
- ${CHIBIOS_PORTAPACK}/boards/GSG_HACKRF_ONE/board.c
-)
-
-# Required include directories
-set(BOARDINC
- ${CHIBIOS_PORTAPACK}/boards/GSG_HACKRF_ONE
-)
diff --git a/firmware/chibios-portapack/boards/GSG_HACKRF_ONE/board.mk b/firmware/chibios-portapack/boards/GSG_HACKRF_ONE/board.mk
deleted file mode 100755
index 6875428f4ee4236f9327dcc9c0e83eec1680c014..0000000000000000000000000000000000000000
--- a/firmware/chibios-portapack/boards/GSG_HACKRF_ONE/board.mk
+++ /dev/null
@@ -1,5 +0,0 @@
-# List of all the board related files.
-BOARDSRC = ${CHIBIOS_PORTAPACK}/boards/GSG_HACKRF_ONE/board.c
-
-# Required include directories
-BOARDINC = ${CHIBIOS_PORTAPACK}/boards/GSG_HACKRF_ONE
\ No newline at end of file
diff --git a/firmware/chibios-portapack/boards/PORTAPACK_APPLICATION/board.cmake b/firmware/chibios-portapack/boards/PORTAPACK_APPLICATION/board.cmake
new file mode 100644
index 0000000000000000000000000000000000000000..62e8ec328d4d434e33bba97edaa74696a7c1289a
--- /dev/null
+++ b/firmware/chibios-portapack/boards/PORTAPACK_APPLICATION/board.cmake
@@ -0,0 +1,9 @@
+# List of all the board related files.
+set(BOARDSRC
+ ${CHIBIOS_PORTAPACK}/boards/PORTAPACK_APPLICATION/board.cpp
+)
+
+# Required include directories
+set(BOARDINC
+ ${CHIBIOS_PORTAPACK}/boards/PORTAPACK_APPLICATION
+)
diff --git a/firmware/chibios-portapack/boards/PORTAPACK_APPLICATION/board.cpp b/firmware/chibios-portapack/boards/PORTAPACK_APPLICATION/board.cpp
new file mode 100755
index 0000000000000000000000000000000000000000..c64bd8d29c0a1f8a588a7122c8433d1f34aa4650
--- /dev/null
+++ b/firmware/chibios-portapack/boards/PORTAPACK_APPLICATION/board.cpp
@@ -0,0 +1,607 @@
+/*
+ ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
+ Copyright (C) 2014 Jared Boone, ShareBrained Technology
+
+ Licensed under the Apache License, Version 2.0 (the "License");
+ you may not use this file except in compliance with the License.
+ You may obtain a copy of the License at
+
+ http://www.apache.org/licenses/LICENSE-2.0
+
+ Unless required by applicable law or agreed to in writing, software
+ distributed under the License is distributed on an "AS IS" BASIS,
+ WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ See the License for the specific language governing permissions and
+ limitations under the License.
+*/
+
+#include "ch.h"
+#include "hal.h"
+
+#include <array>
+
+#if HAL_USE_PAL || defined(__DOXYGEN__)
+/**
+ * @brief PAL setup.
+ * @details Digital I/O ports static configuration as defined in @p board.h.
+ * This variable is used by the HAL when initializing the PAL driver.
+ */
+/**
+ * CoolRunner (HackRF) CPLD:
+ * CoolRunner-II devices have internal pull-ups on TDI, TMS, and TCK.
+ * It is not necessary to externally terminate JTAG pins with internal termination; they can be
+ * left floating. External pull-ups on pins with internal termination is allowed, but not
+ * necessary. External pull-down termination is not recommended as it would conflict with
+ * the internal pull-ups
+ *
+ * LPC43xx pull-ups come on line when 3V3 supply voltage reaches about 2V.
+ *
+ * 3V3 supply:
+ * Ramps up in about 1ms.
+ *
+ * 1V8 supply:
+ * Ramps up in about 1ms.
+ * EN1V8 has a 10K pull-down on the HackRF and is pulled up (very gently) by the LPC43xx
+ * bootloader at boot time. So until the EN1V8 pin is reconfigured as an output, the enable
+ * pin on the 1V8 supply sits at about 0.55V, which feels untidy...
+ * 1V8 supply is activated when GPIO is driven high by user code.
+ */
+const PALConfig pal_default_config = {
+ .P = {
+ { // GPIO0
+ .data
+ = (1 << 15) // CS_XCVR
+ | (1 << 14) // AMP_BYPASS
+ | (0 << 9) // 10K PD, BOOT1
+ | (1 << 8) // 10K PU, BOOT0
+ ,
+ .dir
+ = (1 << 15) // CS_XCVR
+ | (1 << 14) // AMP_BYPASS
+ | (0 << 9) // 10K PD, BOOT1
+ | (0 << 8) // 10K PU, BOOT0
+ },
+ { // GPIO1
+ .data
+ = (1 << 13) // PortaPack P2_13/DIR
+ | (1 << 12) // !RX_AMP_PWR
+ | (0 << 11) // RX_AMP
+ | (1 << 10) // 10K PD, BOOT3, PortaPack P2_9/LCD_WRX
+ | (1 << 8) // PortaPack CPLD.TDO(O)
+ | (1 << 1) // PortaPack CPLD.TMS(I)
+ | (0 << 0) // !MIX_BYPASS
+ ,
+ .dir
+ = (1 << 13) // PortaPack P2_13/DIR
+ | (1 << 12) // !RX_AMP_PWR
+ | (1 << 11) // RX_AMP
+ | (1 << 10) // 10K PD, BOOT3, PortaPack P2_9/LCD_WRX
+ | (0 << 8) // PortaPack CPLD.TDO(O) (input with pull up)
+ | (0 << 1) // PortaPack CPLD.TMS(I) (output only when needed, pull up internal to CPLD)
+ | (1 << 0) // !MIX_BYPASS
+ },
+ { // GPIO2
+ .data
+ = (0 << 15) // TX_AMP
+ | (0 << 11) // TX_MIX_BP
+ | (1 << 14) // MIXER_RESETX, 10K PU
+ | (1 << 13) // MIXER_ENX, 10K PU
+ | (1 << 12) // RX_MIX_BP
+ | (0 << 10) // LP
+ | (1 << 9) // !VAA_ENABLE
+ | (0 << 8) // LED3 (TX)
+ | (1 << 7) // CS_AD
+ | (0 << 6) // XCVR_EN, 10K PD
+ | (0 << 5) // RXENABLE
+ | (0 << 4) // TXENABLE
+ | (0 << 2) // LED2 (RX)
+ | (0 << 1) // LED1 (USB)
+ | (1 << 0) // HP
+ ,
+ .dir
+ = (1 << 15) // TX_AMP
+ | (1 << 14) // MIXER_RESETX, 10K PU
+ | (1 << 13) // MIXER_ENX, 10K PU
+ | (1 << 12) // RX_MIX_BP
+ | (1 << 11) // TX_MIX_BP
+ | (1 << 10) // LP
+ | (1 << 9) // !VAA_ENABLE
+ | (1 << 8) // LED3 (TX)
+ | (1 << 7) // CS_AD
+ | (1 << 6) // XCVR_EN, 10K PD
+ | (1 << 5) // RXENABLE
+ | (1 << 4) // TXENABLE
+ | (1 << 2) // LED2 (RX)
+ | (1 << 1) // LED1 (USB)
+ | (1 << 0) // HP
+ },
+ { // GPIO3
+ .data
+ = (0 << 15) // PortaPack GPIO3_15(IO)
+ | (0 << 14) // PortaPack GPIO3_14(IO)
+ | (0 << 13) // PortaPack GPIO3_13(IO)
+ | (0 << 12) // PortaPack GPIO3_12(IO)
+ | (0 << 11) // PortaPack GPIO3_11(IO)
+ | (0 << 10) // PortaPack GPIO3_10(IO)
+ | (0 << 9) // PortaPack GPIO3_9(IO)
+ | (0 << 8) // PortaPack GPIO3_8(IO)
+ | (0 << 7) // VREGMODE
+ | (1 << 6) // EN1V8, 10K PD
+ | (1 << 5) // !TX_AMP_PWR, 10K PU
+ | (1 << 4) // HackRF CPLD.TMS(I) (output only when needed, pull-up internal to CPLD when 1V8 present)
+ | (1 << 1) // HackRF CPLD.TDI(I), PortaPack I2S0_RX_SDA(O), PortaPack CPLD.TDI(I) (output only when needed, pull-up internal to CPLD when 1V8 present)
+ | (1 << 0) // HackRF CPLD.TCK(I), PortaPack CPLD.TCK(I) (output only when needed, pull-up internal to CPLD when 1V8 present)
+ ,
+ .dir
+ = (0 << 15) // PortaPack GPIO3_15(IO)
+ | (0 << 14) // PortaPack GPIO3_14(IO)
+ | (0 << 13) // PortaPack GPIO3_13(IO)
+ | (0 << 12) // PortaPack GPIO3_12(IO)
+ | (0 << 11) // PortaPack GPIO3_11(IO)
+ | (0 << 10) // PortaPack GPIO3_10(IO)
+ | (0 << 9) // PortaPack GPIO3_9(IO)
+ | (0 << 8) // PortaPack GPIO3_8(IO)
+ | (1 << 7) // VREGMODE
+ | (1 << 6) // EN1V8, 10K PD
+ | (1 << 5) // !TX_AMP_PWR, 10K PU
+ | (0 << 4) // HackRF CPLD.TMS(I) (output only when needed, pull-up internal to CPLD when 1V8 present)
+ | (0 << 1) // HackRF CPLD.TDI(I), PortaPack I2S0_RX_SDA(O), PortaPack CPLD.TDI(I) (output only when needed, pull-up internal to CPLD when 1V8 present)
+ | (0 << 0) // HackRF CPLD.TCK(I), PortaPack CPLD.TCK(I) (output only when needed, pull-up internal to CPLD when 1V8 present)
+ },
+ { // GPIO4
+ .data = 0,
+ .dir = 0
+ },
+ { // GPIO5
+ .data
+ = (1 << 18) // HackRF CPLD.TDO(O) (input with pull up)
+ | (0 << 15) // TX
+ | (1 << 16) // MIX_BYPASS
+ | (1 << 5) // RX
+ | (1 << 4) // PortaPack P2_4/LCD_RDX
+ | (0 << 3) // PortaPack P2_3/LCD_TE
+ | (0 << 1) // PortaPack P2_1/ADDR
+ | (1 << 0) // PortaPack P2_0/IO_STBX
+ ,
+ .dir
+ = (0 << 18) // HackRF CPLD.TDO(O) (input with pull up)
+ | (1 << 16) // MIX_BYPASS
+ | (1 << 15) // TX
+ | (1 << 5) // RX
+ | (1 << 4) // PortaPack P2_4/LCD_RDX
+ | (0 << 3) // PortaPack P2_3/LCD_TE
+ | (1 << 1) // PortaPack P2_1/ADDR
+ | (1 << 0) // PortaPack P2_0/IO_STBX
+ },
+ { // GPIO6
+ .data = 0,
+ .dir = 0
+ },
+ { // GPIO7
+ .data = 0,
+ .dir = 0
+ },
+ },
+ .SCU = {
+ /* Configure GP_CLKIN as soon as possible. It's an output at boot time, and the Si5351C doesn't
+ * reset when the reset button is pressed, so it could still be output enabled.
+ */
+ { 4, 7, scu_config_normal_drive_t { .mode=1, .epd=0, .epun=1, .ehs=0, .ezi=1, .zif=1 } }, /* GP_CLKIN/P72/MCU_CLK: SI5351C.CLK7(O) */
+
+ /* HackRF: LEDs. Configured early so we can use them to indicate boot status. */
+ { 4, 1, scu_config_normal_drive_t { .mode=0, .epd=0, .epun=1, .ehs=0, .ezi=0, .zif=0 } }, /* LED1: LED1.A(I) */
+ { 4, 2, scu_config_normal_drive_t { .mode=0, .epd=0, .epun=1, .ehs=0, .ezi=0, .zif=0 } }, /* LED2: LED2.A(I) */
+ { 6, 12, scu_config_normal_drive_t { .mode=0, .epd=0, .epun=1, .ehs=0, .ezi=0, .zif=0 } }, /* LED3: LED3.A(I) */
+
+ /* Power control */
+ { 5, 0, scu_config_normal_drive_t { .mode=0, .epd=0, .epun=1, .ehs=0, .ezi=0, .zif=0 } }, /* !VAA_ENABLE: 10K PU, Q3.G(I), power to VAA */
+ { 6, 10, scu_config_normal_drive_t { .mode=0, .epd=0, .epun=1, .ehs=0, .ezi=0, .zif=0 } }, /* EN1V8/P70: 10K PD, TPS62410.EN2(I), 1V8LED.A(I) */
+ { 6, 11, scu_config_normal_drive_t { .mode=0, .epd=0, .epun=1, .ehs=0, .ezi=0, .zif=0 } }, /* VREGMODE/P69: TPS62410.MODE/DATA(I) */
+
+ /* HackRF: I2C0 */
+ /* Glitch filter operates at 3ns instead of 50ns due to the WM8731
+ * returning an ACK very fast (170ns) and confusing the I2C state
+ * machine into thinking there was a bus error. It looks like the
+ * MCU sees SDA fall before SCL falls, indicating a START at the
+ * point an ACK is expected. With the glitch filter off or set to
+ * 3ns, it's probably still a bit tight timing-wise, but improves
+ * reliability on some problem units.
+ */
+ { 25, 1,
+ scu_config_sfsi2c0_t {
+ .scl_efp=1, // SCL: 3ns glitch
+ .scl_ehd=0, // SCL: Standard/Fast mode
+ .scl_ezi=1, // SCL: Input enabled
+ .scl_zif=0, // SCL: Enable input glitch filter
+ .sda_efp=1, // SDA: 3ns glitch
+ .sda_ehd=0, // SDA: Standard/Fast mode
+ .sda_ezi=1, // SDA: Input enabled
+ .sda_zif=0 // SDA: Enable input glitch filter
+ }
+ },
+
+ /* Radio section control */
+ { 1, 3, scu_config_normal_drive_t { .mode=5, .epd=0, .epun=1, .ehs=0, .ezi=1, .zif=0 } }, /* SSP1_MISO/P41: MAX2837.DOUT(O) */
+ { 1, 4, scu_config_normal_drive_t { .mode=5, .epd=1, .epun=1, .ehs=0, .ezi=0, .zif=0 } }, /* SSP1_MOSI/P40: MAX2837.DIN(I), MAX5864.DIN(I) */
+ { 1, 7, scu_config_normal_drive_t { .mode=0, .epd=0, .epun=1, .ehs=0, .ezi=0, .zif=0 } }, /* !MIX_BYPASS/P35: U1.VCTL1(I), U11.VCTL2(I), U9.V2(I) */
+ { 1, 19, scu_config_normal_drive_t { .mode=1, .epd=0, .epun=1, .ehs=0, .ezi=0, .zif=0 } }, /* SSP1_SCK/P39: MAX2837.SCLK(I), MAX5864.SCLK(I) */
+ { 1, 20, scu_config_normal_drive_t { .mode=0, .epd=0, .epun=1, .ehs=0, .ezi=0, .zif=0 } }, /* CS_XCVR/P53: MAX2837.CS(I) */
+ { 2, 5, scu_config_normal_drive_t { .mode=4, .epd=0, .epun=0, .ehs=0, .ezi=0, .zif=0 } }, /* RX/P43: U7.VCTL1(I), U10.VCTL1(I), U2.VCTL1(I) */
+ { 2, 6, scu_config_normal_drive_t { .mode=4, .epd=0, .epun=1, .ehs=0, .ezi=0, .zif=0 } }, /* MIXER_SCLK/P31: 33pF, RFFC5072.SCLK(I) */
+ { 2, 10, scu_config_normal_drive_t { .mode=0, .epd=0, .epun=1, .ehs=0, .ezi=0, .zif=0 } }, /* AMP_BYPASS/P50: U14.V2(I), U12.V2(I) */
+ { 2, 11, scu_config_normal_drive_t { .mode=0, .epd=0, .epun=1, .ehs=0, .ezi=0, .zif=0 } }, /* RX_AMP/P49: U12.V1(I), U14.V3(I) */
+ { 2, 12, scu_config_normal_drive_t { .mode=0, .epd=0, .epun=1, .ehs=0, .ezi=0, .zif=0 } }, /* !RX_AMP_PWR/P52: 10K PU, Q1.G(I), power to U13 (RX amp) */
+ { 4, 0, scu_config_normal_drive_t { .mode=0, .epd=0, .epun=1, .ehs=0, .ezi=0, .zif=0 } }, /* HP/P44: U6.VCTL1(I), U5.VCTL2(I) */
+ { 4, 4, scu_config_normal_drive_t { .mode=0, .epd=0, .epun=1, .ehs=0, .ezi=0, .zif=0 } }, /* TXENABLE/P55: MAX2837.TXENABLE(I) */
+ { 4, 5, scu_config_normal_drive_t { .mode=0, .epd=0, .epun=1, .ehs=0, .ezi=0, .zif=0 } }, /* RXENABLE/P56: MAX2837.RXENABLE(I) */
+ { 4, 6, scu_config_normal_drive_t { .mode=0, .epd=0, .epun=1, .ehs=0, .ezi=0, .zif=0 } }, /* XCVR_EN: 10K PD, MAX2837.ENABLE(I) */
+ { 5, 1, scu_config_normal_drive_t { .mode=0, .epd=0, .epun=1, .ehs=0, .ezi=0, .zif=0 } }, /* LP/P45: U6.VCTL2(I), U5.VCTL1(I) */
+ { 5, 2, scu_config_normal_drive_t { .mode=0, .epd=0, .epun=1, .ehs=0, .ezi=0, .zif=0 } }, /* TX_MIX_BP/P46: U9.V1(I) */
+ { 5, 3, scu_config_normal_drive_t { .mode=0, .epd=0, .epun=1, .ehs=0, .ezi=0, .zif=0 } }, /* RX_MIX_BP/P47: U9.V3(I) */
+ { 5, 4, scu_config_normal_drive_t { .mode=0, .epd=0, .epun=1, .ehs=0, .ezi=0, .zif=0 } }, /* MIXER_ENX/P32: 10K PU, 33pF, RFFC5072.ENX(I) */
+ { 5, 5, scu_config_normal_drive_t { .mode=0, .epd=0, .epun=1, .ehs=0, .ezi=0, .zif=0 } }, /* MIXER_RESETX/P33: 10K PU, 33pF, RFFC5072.RESETX(I) */
+ { 5, 6, scu_config_normal_drive_t { .mode=0, .epd=0, .epun=1, .ehs=0, .ezi=0, .zif=0 } }, /* TX_AMP/P48: U12.V3(I), U14.V1(I) */
+ { 5, 7, scu_config_normal_drive_t { .mode=0, .epd=0, .epun=1, .ehs=0, .ezi=0, .zif=0 } }, /* CS_AD/P54: MAX5864.CS(I) */
+ { 6, 4, scu_config_normal_drive_t { .mode=0, .epd=0, .epun=1, .ehs=0, .ezi=1, .zif=0 } }, /* MIXER_SDATA/P27: 33pF, RFFC5072.SDATA(IO) */
+ { 6, 7, scu_config_normal_drive_t { .mode=4, .epd=0, .epun=1, .ehs=0, .ezi=0, .zif=0 } }, /* TX/P42: U7.VCTL2(I), U10.VCTL2(I), U2.VCTL2(I) */
+ { 6, 8, scu_config_normal_drive_t { .mode=4, .epd=0, .epun=1, .ehs=0, .ezi=0, .zif=0 } }, /* MIX_BYPASS/P34: U1.VCTL2(I), U11.VCTL1(I) */
+ { 6, 9, scu_config_normal_drive_t { .mode=0, .epd=0, .epun=1, .ehs=0, .ezi=0, .zif=0 } }, /* !TX_AMP_PWR/P51: 10K PU, Q2.G(I), power to U25 (TX amp) */
+
+ /* SGPIO for sample transfer interface to HackRF CPLD. */
+ { 0, 0, scu_config_normal_drive_t { .mode=3, .epd=0, .epun=1, .ehs=1, .ezi=1, .zif=1 } }, /* SGPIO0/P75/BANK2F3M3: CPLD.89/HOST_DATA0(IO) */
+ { 0, 1, scu_config_normal_drive_t { .mode=3, .epd=0, .epun=1, .ehs=1, .ezi=1, .zif=1 } }, /* SGPIO1/BANK2F3M5: CPLD.79/HOST_DATA1(IO) */
+ { 1, 15, scu_config_normal_drive_t { .mode=2, .epd=0, .epun=1, .ehs=1, .ezi=1, .zif=1 } }, /* SGPIO2/BANK2F3M9: CPLD.74/HOST_DATA2(IO) */
+ { 1, 16, scu_config_normal_drive_t { .mode=2, .epd=0, .epun=1, .ehs=1, .ezi=1, .zif=1 } }, /* SGPIO3/BANK2F3M10: CPLD.72/HOST_DATA3(IO) */
+ { 6, 3, scu_config_normal_drive_t { .mode=2, .epd=0, .epun=1, .ehs=1, .ezi=1, .zif=1 } }, /* SGPIO4/BANK2F3M14: CPLD.67/HOST_DATA4(IO) */
+ { 6, 6, scu_config_normal_drive_t { .mode=2, .epd=0, .epun=1, .ehs=1, .ezi=1, .zif=1 } }, /* SGPIO5/BANK2F3M15: CPLD.64/HOST_DATA5(IO) */
+ { 2, 2, scu_config_normal_drive_t { .mode=0, .epd=0, .epun=1, .ehs=1, .ezi=1, .zif=1 } }, /* SGPIO6/BANK2F3M16: CPLD.61/HOST_DATA6(IO) */
+ { 1, 0, scu_config_normal_drive_t { .mode=6, .epd=0, .epun=1, .ehs=1, .ezi=1, .zif=1 } }, /* SGPIO7/P76/BANK2F3M7: CPLD.77/HOST_DATA7(IO) */
+ { 9, 6, scu_config_normal_drive_t { .mode=6, .epd=0, .epun=1, .ehs=0, .ezi=1, .zif=1 } }, /* SGPIO8/SGPIO_CLK/P60: SI5351C.CLK2(O) */
+ { 4, 3, scu_config_normal_drive_t { .mode=7, .epd=0, .epun=1, .ehs=0, .ezi=1, .zif=1 } }, /* SGPIO9/P77/BANK2F3M1: CPLD.91/HOST_CAPTURE(O) */
+ { 1, 14, scu_config_normal_drive_t { .mode=6, .epd=0, .epun=0, .ehs=1, .ezi=0, .zif=0 } }, /* SGPIO10/P78/BANK2F3M8: CPLD.76/HOST_DISABLE(I) */
+ { 1, 17, scu_config_normal_drive_t { .mode=6, .epd=0, .epun=0, .ehs=1, .ezi=0, .zif=0 } }, /* SGPIO11/P79/BANK2F3M11: CPLD.71/HOST_DIRECTION(I) */
+ { 1, 18, scu_config_normal_drive_t { .mode=0, .epd=1, .epun=1, .ehs=0, .ezi=0, .zif=0 } }, /* SGPIO12/BANK2F3M12: CPLD.70/HOST_INVERT(I) */
+ { 4, 8, scu_config_normal_drive_t { .mode=4, .epd=1, .epun=1, .ehs=0, .ezi=0, .zif=0 } }, /* SGPIO13/BANK2F3M2: CPLD.90/HOST_SYNC_EN(I) */
+ { 4, 9, scu_config_normal_drive_t { .mode=4, .epd=0, .epun=0, .ehs=0, .ezi=0, .zif=0 } }, /* SGPIO14/BANK2F3M4: CPLD.81/CPLD_P81 */
+ { 4, 10, scu_config_normal_drive_t { .mode=4, .epd=0, .epun=0, .ehs=0, .ezi=0, .zif=0 } }, /* SGPIO15/BANK2F3M6: CPLD.78/CPLD_P78 */
+
+ /* HackRF: CPLD */
+ { 6, 1, scu_config_normal_drive_t { .mode=0, .epd=0, .epun=1, .ehs=0, .ezi=0, .zif=0 } }, /* CPLD_TCK: CPLD.TCK(I), PortaPack CPLD.TCK(I) */
+ { 6, 2, scu_config_normal_drive_t { .mode=0, .epd=0, .epun=1, .ehs=0, .ezi=1, .zif=0 } }, /* CPLD_TDI: CPLD.TDI(I), PortaPack I2S0_RX_SDA(O), PortaPack CPLD.TDI(I) */
+ { 6, 5, scu_config_normal_drive_t { .mode=0, .epd=0, .epun=1, .ehs=0, .ezi=0, .zif=0 } }, /* CPLD_TMS: CPLD.TMS(I) */
+ { 9, 5, scu_config_normal_drive_t { .mode=4, .epd=0, .epun=1, .ehs=0, .ezi=1, .zif=0 } }, /* CPLD_TDO: CPLD.TDO(O) */
+
+ /* PortaPack */
+ { 1, 5, scu_config_normal_drive_t { .mode=0, .epd=0, .epun=0, .ehs=0, .ezi=1, .zif=0 } }, /* SD_POW: PortaPack CPLD.TDO(O) */
+ { 1, 8, scu_config_normal_drive_t { .mode=0, .epd=0, .epun=0, .ehs=0, .ezi=0, .zif=0 } }, /* SD_VOLT0: PortaPack CPLD.TMS(I) */
+ { 2, 0, scu_config_normal_drive_t { .mode=4, .epd=0, .epun=1, .ehs=0, .ezi=1, .zif=0 } }, /* U0_TXD: PortaPack P2_0/IO_STBX */
+ { 2, 1, scu_config_normal_drive_t { .mode=4, .epd=0, .epun=1, .ehs=0, .ezi=1, .zif=0 } }, /* U0_RXD: PortaPack P2_1/ADDR */
+ { 2, 3, scu_config_normal_drive_t { .mode=4, .epd=0, .epun=1, .ehs=0, .ezi=1, .zif=0 } }, /* I2C1_SDA: PortaPack P2_3/LCD_TE */
+ { 2, 4, scu_config_normal_drive_t { .mode=4, .epd=0, .epun=1, .ehs=0, .ezi=1, .zif=0 } }, /* I2C1_SCL: PortaPack P2_4/LCD_RDX */
+ { 2, 8, scu_config_normal_drive_t { .mode=4, .epd=0, .epun=1, .ehs=0, .ezi=0, .zif=0 } }, /* P2_8: 10K PD, BOOT2, DFU switch, PortaPack P2_8/<unused> */
+ { 2, 9, scu_config_normal_drive_t { .mode=0, .epd=0, .epun=1, .ehs=0, .ezi=1, .zif=0 } }, /* P2_9: 10K PD, BOOT3, PortaPack P2_9/LCD_WRX */
+ { 2, 13, scu_config_normal_drive_t { .mode=0, .epd=0, .epun=1, .ehs=0, .ezi=1, .zif=0 } }, /* P2_13: PortaPack P2_13/DIR */
+ { 7, 0, scu_config_normal_drive_t { .mode=0, .epd=1, .epun=1, .ehs=0, .ezi=1, .zif=0 } }, /* GPIO3_8: PortaPack GPIO3_8(IO) */
+ { 7, 1, scu_config_normal_drive_t { .mode=0, .epd=1, .epun=1, .ehs=0, .ezi=1, .zif=0 } }, /* GPIO3_9: PortaPack GPIO3_9(IO) */
+ { 7, 2, scu_config_normal_drive_t { .mode=0, .epd=1, .epun=1, .ehs=0, .ezi=1, .zif=0 } }, /* GPIO3_10: PortaPack GPIO3_10(IO) */
+ { 7, 3, scu_config_normal_drive_t { .mode=0, .epd=1, .epun=1, .ehs=0, .ezi=1, .zif=0 } }, /* GPIO3_11: PortaPack GPIO3_11(IO) */
+ { 7, 4, scu_config_normal_drive_t { .mode=0, .epd=1, .epun=1, .ehs=0, .ezi=1, .zif=0 } }, /* GPIO3_12: PortaPack GPIO3_12(IO) */
+ { 7, 5, scu_config_normal_drive_t { .mode=0, .epd=1, .epun=1, .ehs=0, .ezi=1, .zif=0 } }, /* GPIO3_13: PortaPack GPIO3_13(IO) */
+ { 7, 6, scu_config_normal_drive_t { .mode=0, .epd=1, .epun=1, .ehs=0, .ezi=1, .zif=0 } }, /* GPIO3_14: PortaPack GPIO3_14(IO) */
+ { 7, 7, scu_config_normal_drive_t { .mode=0, .epd=1, .epun=1, .ehs=0, .ezi=1, .zif=0 } }, /* GPIO3_15: PortaPack GPIO3_15(IO) */
+
+ /* PortaPack: Audio */
+ { 3, 0, scu_config_normal_drive_t { .mode=2, .epd=0, .epun=0, .ehs=0, .ezi=1, .zif=0 } }, /* I2S0_TX_SCK: PortaPack I2S0_TX_SCK(I) */
+ { 3, 1, scu_config_normal_drive_t { .mode=0, .epd=0, .epun=0, .ehs=0, .ezi=1, .zif=0 } }, /* I2S0_RX_WS: PortaPack I2S0_TX_WS(I). Input enabled to fold back into RX. */
+ { 3, 2, scu_config_normal_drive_t { .mode=0, .epd=0, .epun=0, .ehs=0, .ezi=0, .zif=0 } }, /* I2S0_RX_SDA: PortaPack I2S0_TX_SDA(I) */
+ { 24, 2, scu_config_normal_drive_t { .mode=6, .epd=1, .epun=1, .ehs=0, .ezi=0, .zif=0 } }, /* I2S0_TX_CLK: PortaPack I2S0_TX_MCLK */
+
+ /* PortaPack: SD card socket */
+ { 24, 0, scu_config_normal_drive_t { .mode=4, .epd=1, .epun=1, .ehs=0, .ezi=1, .zif=1 } }, /* SD_CLK: PortaPack SD.CLK, enable input buffer for timing feedback? */
+ { 1, 6, scu_config_normal_drive_t { .mode=7, .epd=0, .epun=0, .ehs=0, .ezi=1, .zif=1 } }, /* SD_CMD: PortaPack SD.CMD(IO) */
+ { 1, 9, scu_config_normal_drive_t { .mode=7, .epd=0, .epun=0, .ehs=0, .ezi=1, .zif=1 } }, /* SD_DAT0: PortaPack SD.DAT0(IO) */
+ { 1, 10, scu_config_normal_drive_t { .mode=7, .epd=0, .epun=0, .ehs=0, .ezi=1, .zif=1 } }, /* SD_DAT1: PortaPack SD.DAT1(IO) */
+ { 1, 11, scu_config_normal_drive_t { .mode=7, .epd=0, .epun=0, .ehs=0, .ezi=1, .zif=1 } }, /* SD_DAT2: PortaPack SD.DAT2(IO) */
+ { 1, 12, scu_config_normal_drive_t { .mode=7, .epd=0, .epun=0, .ehs=0, .ezi=1, .zif=1 } }, /* SD_DAT3: PortaPack SD.DAT3(IO) */
+ { 1, 13, scu_config_normal_drive_t { .mode=7, .epd=0, .epun=0, .ehs=0, .ezi=1, .zif=0 } }, /* SD_CD: PortaPack SD.CD(O) */
+
+ /* Miscellaneous */
+ { 1, 1, scu_config_normal_drive_t { .mode=0, .epd=0, .epun=1, .ehs=0, .ezi=0, .zif=0 } }, /* P1_1/P74: 10K PU, BOOT0 */
+ { 1, 2, scu_config_normal_drive_t { .mode=0, .epd=0, .epun=1, .ehs=0, .ezi=0, .zif=0 } }, /* P1_2/P73: 10K PD, BOOT1 */
+ { 2, 7, scu_config_normal_drive_t { .mode=0, .epd=0, .epun=1, .ehs=0, .ezi=0, .zif=0 } }, /* ISP: 10K PU, Unused */
+ { 6, 0, scu_config_normal_drive_t { .mode=0, .epd=0, .epun=0, .ehs=0, .ezi=0, .zif=0 } }, /* I2S0_RX_MCLK: Unused */
+ { 15, 4, scu_config_normal_drive_t { .mode=7, .epd=0, .epun=0, .ehs=0, .ezi=0, .zif=0 } }, /* I2S0_RX_SCK: Unused */
+ }
+};
+#endif
+
+static const std::array<scu_setup_t, 6> pins_setup_spifi { {
+ { 3, 3, scu_config_normal_drive_t { .mode=3, .epd=0, .epun=1, .ehs=1, .ezi=1, .zif=1 } }, /* SPIFI_SCK: W25Q80BV.CLK(I), enable input buffer for timing feedback */
+ { 3, 4, scu_config_normal_drive_t { .mode=3, .epd=0, .epun=1, .ehs=1, .ezi=1, .zif=1 } }, /* SPIFI_SIO3/P82: W25Q80BV.HOLD(IO) */
+ { 3, 5, scu_config_normal_drive_t { .mode=3, .epd=0, .epun=1, .ehs=1, .ezi=1, .zif=1 } }, /* SPIFI_SIO2/P81: W25Q80BV.WP(IO) */
+ { 3, 6, scu_config_normal_drive_t { .mode=3, .epd=0, .epun=1, .ehs=1, .ezi=1, .zif=1 } }, /* SPIFI_MISO: W25Q80BV.DO(IO) */
+ { 3, 7, scu_config_normal_drive_t { .mode=3, .epd=0, .epun=1, .ehs=1, .ezi=1, .zif=1 } }, /* SPIFI_MOSI: W25Q80BV.DI(IO) */
+ { 3, 8, scu_config_normal_drive_t { .mode=3, .epd=0, .epun=1, .ehs=1, .ezi=1, .zif=1 } }, /* SPIFI_CS/P68: W25Q80BV.CS(I) */
+} };
+
+static void setup_pin(const scu_setup_t& pin_setup) {
+ LPC_SCU->SFSP[pin_setup.port][pin_setup.pin] = pin_setup.config;
+}
+
+template<size_t N>
+void setup_pins(const std::array<scu_setup_t, N>& pins_setup) {
+ for(const auto& pin_setup : pins_setup) {
+ setup_pin(pin_setup);
+ }
+}
+
+static void configure_spifi(void) {
+ setup_pins(pins_setup_spifi);
+
+ /* Tweak SPIFI mode */
+ LPC_SPIFI->CTRL =
+ (0xffff << 0) /* Timeout */
+ | (0x1 << 16) /* CS high time in "clocks - 1" */
+ | (0 << 21) /* 0: Attempt speculative prefetch on data accesses */
+ | (0 << 22) /* 0: No interrupt on command ended */
+ | (0 << 23) /* 0: SCK driven low after rising edge at which last bit of command is captured. Stays low while CS# is high. */
+ | (0 << 27) /* 0: Cache prefetching enabled */
+ | (0 << 28) /* 0: Quad protocol, IO3:0 */
+ | (1 << 29) /* 1: Read data sampled on falling edge of clock */
+ | (1 << 30) /* 1: Read data is sampled using feedback clock from SCK pin */
+ | (0 << 31) /* 0: DMA request disabled */
+ ;
+
+ /* Throttle up the SPIFI interface to 96MHz (IDIVA=PLL1 / 3) */
+ LPC_CGU->IDIVB_CTRL.word =
+ ( 0 << 0) /* PD */
+ | ( 2 << 2) /* IDIV (/3) */
+ | ( 1 << 11) /* AUTOBLOCK */
+ | ( 9 << 24) /* PLL1 */
+ ;
+}
+
+static const motocon_pwm_resources_t motocon_pwm_resources = {
+ .base = { .clk = &LPC_CGU->BASE_APB1_CLK, .stat = &LPC_CCU1->BASE_STAT, .stat_mask = (1 << 1) },
+ .branch = { .cfg = &LPC_CCU1->CLK_APB1_MOTOCON_PWM_CFG, .stat = &LPC_CCU1->CLK_APB1_MOTOCON_PWM_STAT },
+ .reset = { .output_index = 38 },
+};
+
+static const scu_setup_t pin_setup_vaa_enablex_pwm = { 5, 0, scu_config_normal_drive_t { .mode=1, .epd=0, .epun=1, .ehs=0, .ezi=0, .zif=0 } };
+static const scu_setup_t pin_setup_vaa_enablex_gpio = { 5, 0, scu_config_normal_drive_t { .mode=0, .epd=0, .epun=1, .ehs=0, .ezi=0, .zif=0 } };
+
+/* VAA powers:
+ * MAX5864 analog section.
+ * MAX2837 registers and other functions.
+ * RFFC5072 analog section.
+ *
+ * Beware that power applied to pins of the MAX2837 may
+ * show up on VAA and start powering other components on the
+ * VAA net. So turn on VAA before driving pins from MCU to
+ * MAX2837.
+ */
+void vaa_power_on(void) {
+ /* Very twitchy process for powering up VAA without glitching the 3.3V rail, which can send the
+ * microcontroller into reset.
+ *
+ * Controlling timing while running from SPIFI flash is tricky, hence use of a PWM peripheral...
+ */
+
+ /* Configure and enable MOTOCONPWM peripheral clocks.
+ * Assume IDIVC is running the post-bootloader configuration, outputting 96MHz derived from PLL1.
+ */
+ base_clock_enable(&motocon_pwm_resources.base);
+ branch_clock_enable(&motocon_pwm_resources.branch);
+ peripheral_reset(&motocon_pwm_resources.reset);
+
+ /* Combination of pulse duration and duty cycle was arrived at empirically, to keep supply glitching
+ * to +/- 0.15V.
+ */
+ const uint32_t cycle_period = 128;
+ const uint32_t enable_period = 10;
+ LPC_MCPWM->TC2 = 0;
+ LPC_MCPWM->MAT2 = cycle_period - enable_period;
+ LPC_MCPWM->LIM2 = cycle_period;
+
+ /* Switch !VAA_ENABLE pin from GPIO to MOTOCONPWM peripheral output, now that the peripheral is configured. */
+ setup_pin(pin_setup_vaa_enablex_pwm); // P5_0 /GPIO2[ 9]/MCOB2: !VAA_ENABLE, 10K PU
+
+ /* Start the PWM operation. */
+ LPC_MCPWM->CON_SET = (1 << 16);
+
+ /* Wait until VAA rises to approximately 90% of final voltage. */
+ /* Timing assumes we're running immediately after the bootloader: 96 MHz from IRC+PLL1
+ */
+ { volatile uint32_t delay = 12000; while(delay--); }
+
+ /* Hold !VAA_ENABLE active using a GPIO, so we can reclaim and shut down the MOTOCONPWM peripheral. */
+ LPC_GPIO->CLR[2] = (1 << 9); // !VAA_ENABLE
+ LPC_GPIO->DIR[2] |= (1 << 9);
+ setup_pin(pin_setup_vaa_enablex_gpio); // P5_0 /GPIO2[ 9]/MCOB2: !VAA_ENABLE, 10K PU
+
+ peripheral_reset(&motocon_pwm_resources.reset);
+ branch_clock_disable(&motocon_pwm_resources.branch);
+ base_clock_disable(&motocon_pwm_resources.base);
+}
+
+void vaa_power_off(void) {
+ // TODO: There's a lot of other stuff that must be done to prevent
+ // leakage from +3V3 into VAA.
+ LPC_GPIO->W2[9] = 1;
+}
+
+/**
+ * @brief Early initialization code.
+ * @details This initialization must be performed just after stack setup
+ * and before any other initialization.
+ */
+extern "C" void __early_init(void) {
+ /*
+ * Upon exit from bootloader into SPIFI boot mode:
+ *
+ * Enabled:
+ * PLL1: IRC, M=/24, N=/1, P=/1, autoblock, direct = 288 MHz
+ * IDIVA: IRC /1 = 12 MHz
+ * IDIVB: PLL1 /9, autoblock = 32 MHz
+ * IDIVC: PLL1 /3, autoblock = 96 MHz
+ * IDIVD: IRC /1 = 12 MHz
+ * IDIVE: IRC /1 = 12 MHz
+ * BASE_M4_CLK: IDIVC, autoblock
+ * BASE_SPIFI_CLK: IDIVB, autoblock
+ *
+ * Disabled:
+ * XTAL_OSC
+ * PLL0USB
+ * PLL0AUDIO
+ */
+ /* LPC43xx M4 takes about 500 usec to get to __early_init
+ * Before __early_init, LPC bootloader runs and starts our code. In user code, the process stack
+ * is initialized, hardware floating point is initialized, and stacks are zeroed,
+ */
+ const uint32_t CORTEX_M4_CPUID = 0x410fc240;
+ const uint32_t CORTEX_M4_CPUID_MASK = 0xff0ffff0;
+
+ if( (SCB->CPUID & CORTEX_M4_CPUID_MASK) == CORTEX_M4_CPUID ) {
+ /* Enable unaligned exception handler */
+ SCB_CCR |= (1 << 3);
+
+ /* Enable MemManage, BusFault, UsageFault exception handlers */
+ SCB_SHCSR |= (1 << 18) | (1 << 17) | (1 << 16);
+
+ /* "The reset delay is counted in IRC clock cycles. If the core frequency
+ * CCLK is much higher than the IRC frequency, add a software delay of
+ * fCCLK/fIRC clock cycles between resetting and accessing any of the
+ * peripheral blocks."
+ */
+
+ /* Don't reset these peripherals, as they're operating during initialization:
+ * WWDT, CREG, SCU, SPIFI
+ */
+ LPC_RGU->RESET_CTRL[0] =
+ (1U << 16) // LCD_RST
+ | (1U << 17) // USB0_RST
+ | (1U << 18) // USB1_RST
+ | (1U << 19) // DMA_RST
+ | (1U << 20) // SDIO_RST
+ | (1U << 21) // EMC_RST
+ | (1U << 22) // ETHERNET_RST
+ | (1U << 28) // GPIO_RST
+ ;
+ LPC_RGU->RESET_CTRL[1] =
+ (1U << 0) // TIMER0_RST
+ | (1U << 1) // TIMER1_RST
+ | (1U << 2) // TIMER2_RST
+ | (1U << 3) // TIMER3_RST
+ | (1U << 4) // RITIMER_RST
+ | (1U << 5) // SCT_RST
+ | (1U << 6) // MOTOCONPWM_RST
+ | (1U << 7) // QEI_RST
+ | (1U << 8) // ADC0_RST
+ | (1U << 9) // ADC1_RST
+ | (1U << 10) // DAC_RST
+ | (1U << 12) // UART0_RST
+ | (1U << 13) // UART1_RST
+ | (1U << 14) // UART2_RST
+ | (1U << 15) // UART3_RST
+ | (1U << 16) // I2C0_RST
+ | (1U << 17) // I2C1_RST
+ | (1U << 18) // SSP0_RST
+ | (1U << 19) // SSP1_RST
+ | (1U << 20) // I2S_RST
+ | (1U << 22) // CAN1_RST
+ | (1U << 23) // CAN0_RST
+ | (1U << 24) // M0APP_RST
+ | (1U << 25) // SGPIO_RST
+ | (1U << 26) // SPI_RST
+ | (1U << 28) // ADCHS_RST
+ ;
+
+ configure_spifi();
+
+ LPC_CCU1->CLK_M4_M0APP_CFG.RUN = true;
+ LPC_CREG->M0APPMEMMAP = LPC_SPIFI_DATA_CACHED_BASE + 0x0;
+ LPC_RGU->RESET_CTRL[1] = 0;
+
+ /* Prevent the M4 from doing any more initializing by sleep-waiting forever...
+ * ...until the M0 resets the M4 with some code to run.
+ */
+ while(1) {
+ __WFE();
+ }
+ }
+}
+
+extern "C" void __late_init(void) {
+ /*
+ * System initializations.
+ * - HAL initialization, this also initializes the configured device drivers
+ * and performs the board-specific initializations.
+ * - Kernel initialization, the main() function becomes a thread and the
+ * RTOS is active.
+ */
+ halInit();
+
+ /* After this call, scheduler, systick, heap, etc. are available. */
+ /* By doing chSysInit() here, it runs before C++ constructors, which may
+ * require the heap.
+ */
+ chSysInit();
+}
+
+/**
+ * @brief Board-specific initialization code.
+ * @todo Add your board-specific code, if any.
+ */
+extern "C" void boardInit(void) {
+ vaa_power_on();
+}
+
+extern "C" void _default_exit(void) {
+ vaa_power_off();
+
+ chSysDisable();
+
+ systick_stop();
+
+ /* Don't reset these peripherals, as they're operating during shutdown:
+ * WWDT, CREG, SCU, SPIFI, GPIO, M0APP
+ */
+ LPC_RGU->RESET_CTRL[0] =
+ (1U << 16) // LCD_RST
+ | (1U << 17) // USB0_RST
+ | (1U << 18) // USB1_RST
+ | (1U << 19) // DMA_RST
+ | (1U << 20) // SDIO_RST
+ | (1U << 21) // EMC_RST
+ | (1U << 22) // ETHERNET_RST
+ //| (1U << 28) // GPIO_RST
+ ;
+ LPC_RGU->RESET_CTRL[1] =
+ (1U << 0) // TIMER0_RST
+ | (1U << 1) // TIMER1_RST
+ | (1U << 2) // TIMER2_RST
+ | (1U << 3) // TIMER3_RST
+ | (1U << 4) // RITIMER_RST
+ | (1U << 5) // SCT_RST
+ | (1U << 6) // MOTOCONPWM_RST
+ | (1U << 7) // QEI_RST
+ | (1U << 8) // ADC0_RST
+ | (1U << 9) // ADC1_RST
+ | (1U << 10) // DAC_RST
+ | (1U << 12) // UART0_RST
+ | (1U << 13) // UART1_RST
+ | (1U << 14) // UART2_RST
+ | (1U << 15) // UART3_RST
+ | (1U << 16) // I2C0_RST
+ | (1U << 17) // I2C1_RST
+ | (1U << 18) // SSP0_RST
+ | (1U << 19) // SSP1_RST
+ | (1U << 20) // I2S_RST
+ | (1U << 22) // CAN1_RST
+ | (1U << 23) // CAN0_RST
+ //| (1U << 24) // M0APP_RST
+ | (1U << 25) // SGPIO_RST
+ | (1U << 26) // SPI_RST
+ | (1U << 28) // ADCHS_RST
+ ;
+}
diff --git a/firmware/chibios-portapack/boards/PORTAPACK_APPLICATION/board.h b/firmware/chibios-portapack/boards/PORTAPACK_APPLICATION/board.h
new file mode 100755
index 0000000000000000000000000000000000000000..c65fa732e5c7102a9d969fe89555cb5976114f1d
--- /dev/null
+++ b/firmware/chibios-portapack/boards/PORTAPACK_APPLICATION/board.h
@@ -0,0 +1,45 @@
+/*
+ ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
+ Copyright (C) 2014 Jared Boone, ShareBrained Technology
+
+ Licensed under the Apache License, Version 2.0 (the "License");
+ you may not use this file except in compliance with the License.
+ You may obtain a copy of the License at
+
+ http://www.apache.org/licenses/LICENSE-2.0
+
+ Unless required by applicable law or agreed to in writing, software
+ distributed under the License is distributed on an "AS IS" BASIS,
+ WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ See the License for the specific language governing permissions and
+ limitations under the License.
+*/
+
+#ifndef _BOARD_H_
+#define _BOARD_H_
+
+/*
+ * Setup for PortaPack application running on M4, which then bootstaps the M0,
+ * which then runs the application firmware and user interface.
+ */
+
+/*
+ * Board identifiers.
+ */
+#define BOARD_PORTAPACK_APPLICATION
+#define BOARD_NAME "PortaPack Application"
+
+#if !defined(_FROM_ASM_)
+#ifdef __cplusplus
+extern "C" {
+#endif
+ void boardInit(void);
+
+ void vaa_power_on(void);
+ void vaa_power_off(void);
+#ifdef __cplusplus
+}
+#endif
+#endif /* _FROM_ASM_ */
+
+#endif /* _BOARD_H_ */
diff --git a/firmware/chibios-portapack/boards/PORTAPACK_APPLICATION/board.mk b/firmware/chibios-portapack/boards/PORTAPACK_APPLICATION/board.mk
new file mode 100755
index 0000000000000000000000000000000000000000..ffc99ef354d9d09a24db0b62972fad2cd10457e3
--- /dev/null
+++ b/firmware/chibios-portapack/boards/PORTAPACK_APPLICATION/board.mk
@@ -0,0 +1,5 @@
+# List of all the board related files.
+BOARDSRC = ${CHIBIOS_PORTAPACK}/boards/PORTAPACK_APPLICATION/board.cpp
+
+# Required include directories
+BOARDINC = ${CHIBIOS_PORTAPACK}/boards/PORTAPACK_APPLICATION
\ No newline at end of file
diff --git a/firmware/chibios-portapack/boards/PORTAPACK_BASEBAND/board.c b/firmware/chibios-portapack/boards/PORTAPACK_BASEBAND/board.c
new file mode 100644
index 0000000000000000000000000000000000000000..f323da3661f96b9d9dafb5ea2462ada0c0252e07
--- /dev/null
+++ b/firmware/chibios-portapack/boards/PORTAPACK_BASEBAND/board.c
@@ -0,0 +1,26 @@
+/*
+ ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
+ Copyright (C) 2014 Jared Boone, ShareBrained Technology
+
+ Licensed under the Apache License, Version 2.0 (the "License");
+ you may not use this file except in compliance with the License.
+ You may obtain a copy of the License at
+
+ http://www.apache.org/licenses/LICENSE-2.0
+
+ Unless required by applicable law or agreed to in writing, software
+ distributed under the License is distributed on an "AS IS" BASIS,
+ WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ See the License for the specific language governing permissions and
+ limitations under the License.
+*/
+
+#include "ch.h"
+#include "hal.h"
+
+/**
+ * @brief Board-specific initialization code.
+ * @todo Add your board-specific code, if any.
+ */
+void boardInit(void) {
+}
diff --git a/firmware/chibios-portapack/boards/PORTAPACK_BASEBAND/board.cmake b/firmware/chibios-portapack/boards/PORTAPACK_BASEBAND/board.cmake
new file mode 100644
index 0000000000000000000000000000000000000000..eca1bccb2db0415958884f26f963d76faf3dbd7c
--- /dev/null
+++ b/firmware/chibios-portapack/boards/PORTAPACK_BASEBAND/board.cmake
@@ -0,0 +1,9 @@
+# List of all the board related files.
+set(BOARDSRC
+ ${CHIBIOS_PORTAPACK}/boards/PORTAPACK_BASEBAND/board.c
+)
+
+# Required include directories
+set(BOARDINC
+ ${CHIBIOS_PORTAPACK}/boards/PORTAPACK_BASEBAND
+)
diff --git a/firmware/chibios-portapack/boards/GSG_HACKRF_ONE/board.h b/firmware/chibios-portapack/boards/PORTAPACK_BASEBAND/board.h
old mode 100755
new mode 100644
similarity index 75%
rename from firmware/chibios-portapack/boards/GSG_HACKRF_ONE/board.h
rename to firmware/chibios-portapack/boards/PORTAPACK_BASEBAND/board.h
index dca1d06982e44edd4441857e9dce395e187d2812..3fb37988580f4583e7a9c581620bfc512079b39c
--- a/firmware/chibios-portapack/boards/GSG_HACKRF_ONE/board.h
+++ b/firmware/chibios-portapack/boards/PORTAPACK_BASEBAND/board.h
@@ -1,41 +1,42 @@
-/*
- ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
- Copyright (C) 2014 Jared Boone, ShareBrained Technology
-
- Licensed under the Apache License, Version 2.0 (the "License");
- you may not use this file except in compliance with the License.
- You may obtain a copy of the License at
-
- http://www.apache.org/licenses/LICENSE-2.0
-
- Unless required by applicable law or agreed to in writing, software
- distributed under the License is distributed on an "AS IS" BASIS,
- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- See the License for the specific language governing permissions and
- limitations under the License.
-*/
-
-#ifndef _BOARD_H_
-#define _BOARD_H_
-
-/*
- * Setup for Great Scott Gadgets HackRF One
- */
-
-/*
- * Board identifiers.
- */
-#define BOARD_GSG_HACKRF_ONE
-#define BOARD_NAME "Great Scott Gadgets HackRF One"
-
-#if !defined(_FROM_ASM_)
-#ifdef __cplusplus
-extern "C" {
-#endif
- void boardInit(void);
-#ifdef __cplusplus
-}
-#endif
-#endif /* _FROM_ASM_ */
-
-#endif /* _BOARD_H_ */
+/*
+ ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
+ Copyright (C) 2018 Jared Boone, ShareBrained Technology
+
+ Licensed under the Apache License, Version 2.0 (the "License");
+ you may not use this file except in compliance with the License.
+ You may obtain a copy of the License at
+
+ http://www.apache.org/licenses/LICENSE-2.0
+
+ Unless required by applicable law or agreed to in writing, software
+ distributed under the License is distributed on an "AS IS" BASIS,
+ WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ See the License for the specific language governing permissions and
+ limitations under the License.
+*/
+
+#ifndef _BOARD_H_
+#define _BOARD_H_
+
+/*
+ * Setup for PortaPack application running on M4, which then bootstaps the M0,
+ * which then runs the application firmware and user interface.
+ */
+
+/*
+ * Board identifiers.
+ */
+#define BOARD_PORTAPACK_BASEBAND
+#define BOARD_NAME "PortaPack Baseband"
+
+#if !defined(_FROM_ASM_)
+#ifdef __cplusplus
+extern "C" {
+#endif
+ void boardInit(void);
+#ifdef __cplusplus
+}
+#endif
+#endif /* _FROM_ASM_ */
+
+#endif /* _BOARD_H_ */
diff --git a/firmware/chibios-portapack/boards/PORTAPACK_BASEBAND/board.mk b/firmware/chibios-portapack/boards/PORTAPACK_BASEBAND/board.mk
new file mode 100644
index 0000000000000000000000000000000000000000..17ba6d120f23b705f16ed871cbb76a007284a0e6
--- /dev/null
+++ b/firmware/chibios-portapack/boards/PORTAPACK_BASEBAND/board.mk
@@ -0,0 +1,5 @@
+# List of all the board related files.
+BOARDSRC = ${CHIBIOS_PORTAPACK}/boards/PORTAPACK_BASEBAND/board.c
+
+# Required include directories
+BOARDINC = ${CHIBIOS_PORTAPACK}/boards/PORTAPACK_BASEBAND
\ No newline at end of file
diff --git a/firmware/chibios-portapack/os/hal/platforms/LPC43xx/adc_lld.h b/firmware/chibios-portapack/os/hal/platforms/LPC43xx/adc_lld.h
index d54de6ee70103fab968975cc366de06a5537434a..4c890c3614b23d24f97d26b7246efbfa1a541418 100644
--- a/firmware/chibios-portapack/os/hal/platforms/LPC43xx/adc_lld.h
+++ b/firmware/chibios-portapack/os/hal/platforms/LPC43xx/adc_lld.h
@@ -98,13 +98,6 @@
/**
* @brief Structure used for ADC configuration.
*/
-typedef struct {
- base_clock_regs_t base;
- branch_clock_regs_t branch;
- peripheral_reset_t reset;
- interrupt_config_t interrupt;
-} adc_resources_t;
-
typedef LPC_ADCx_Type* ADC_TypeDef;
/**
diff --git a/firmware/chibios-portapack/os/hal/platforms/LPC43xx/gpt_lld.h b/firmware/chibios-portapack/os/hal/platforms/LPC43xx/gpt_lld.h
index d75d3c2b37ee96a708c57c09da813c1498577028..a459e21503498f9fa74cff04744673ed7d68730d 100644
--- a/firmware/chibios-portapack/os/hal/platforms/LPC43xx/gpt_lld.h
+++ b/firmware/chibios-portapack/os/hal/platforms/LPC43xx/gpt_lld.h
@@ -135,15 +135,6 @@
/* Driver data structures and types. */
/*===========================================================================*/
-/**
- * @brief Structure used for Timer configuration.
- */
-typedef struct {
- branch_clock_regs_t branch;
- peripheral_reset_t reset;
- interrupt_config_t interrupt;
-} timer_resources_t;
-
/**
* @brief GPT frequency type.
*/
diff --git a/firmware/chibios-portapack/os/hal/platforms/LPC43xx/i2c_lld.h b/firmware/chibios-portapack/os/hal/platforms/LPC43xx/i2c_lld.h
index 1f21766fe2c6d8b24776c9d7012cde45a67a3478..6eb00efd8498408f149518893fba19f2298e7bbb 100644
--- a/firmware/chibios-portapack/os/hal/platforms/LPC43xx/i2c_lld.h
+++ b/firmware/chibios-portapack/os/hal/platforms/LPC43xx/i2c_lld.h
@@ -99,12 +99,6 @@
/**
* @brief Structure used for I2C configuration.
*/
-typedef struct {
- base_clock_regs_t base;
- branch_clock_regs_t branch;
- peripheral_reset_t reset;
-} i2c_resources_t;
-
typedef LPC_I2Cx_Type* I2C_TypeDef;
/**
diff --git a/firmware/chibios-portapack/os/hal/platforms/LPC43xx/lpc43xx.h b/firmware/chibios-portapack/os/hal/platforms/LPC43xx/lpc43xx.h
index 18bc398c6fe236dd37da4ae4af52102f5b3b60d2..81e0ce4b0ff2671d5c4ee2f451fb43ac3b0100cc 100644
--- a/firmware/chibios-portapack/os/hal/platforms/LPC43xx/lpc43xx.h
+++ b/firmware/chibios-portapack/os/hal/platforms/LPC43xx/lpc43xx.h
@@ -37,6 +37,224 @@ typedef struct {
uint32_t priority_mask;
} interrupt_config_t;
+typedef struct {
+ uint32_t data;
+ uint32_t dir;
+} gpio_setup_t;
+
+struct scu_config_normal_drive_t {
+ uint16_t mode;
+ uint16_t epd;
+ uint16_t epun;
+ uint16_t ehs;
+ uint16_t ezi;
+ uint16_t zif;
+};
+
+struct scu_config_sfsi2c0_t {
+ uint16_t scl_efp;
+ uint16_t scl_ehd;
+ uint16_t scl_ezi;
+ uint16_t scl_zif;
+ uint16_t sda_efp;
+ uint16_t sda_ehd;
+ uint16_t sda_ezi;
+ uint16_t sda_zif;
+};
+
+struct scu_config_t {
+#ifdef __cplusplus
+ scu_config_t() = delete;
+ scu_config_t(const scu_config_t&) = delete;
+ scu_config_t(scu_config_t&) = delete;
+
+ constexpr scu_config_t(
+ uint16_t value
+ ) :
+ word(value)
+ {
+ }
+
+ constexpr scu_config_t(
+ const scu_config_normal_drive_t config
+ ) :
+ word(
+ ((config.mode & 7) << 0)
+ | ((config.epd & 1) << 3)
+ | ((config.epun & 1) << 4)
+ | ((config.ehs & 1) << 5)
+ | ((config.ezi & 1) << 6)
+ | ((config.zif & 1) << 7)
+ )
+ {
+ }
+
+ constexpr scu_config_t(
+ const scu_config_sfsi2c0_t config
+ ) :
+ word(
+ ((config.scl_efp & 1) << 0)
+ | ((config.scl_ehd & 1) << 2)
+ | ((config.scl_ezi & 1) << 3)
+ | ((config.scl_zif & 1) << 7)
+ | ((config.sda_efp & 1) << 8)
+ | ((config.sda_ehd & 1) << 10)
+ | ((config.sda_ezi & 1) << 11)
+ | ((config.sda_zif & 1) << 15)
+ )
+ {
+ }
+
+ constexpr operator uint32_t() const {
+ return word;
+ }
+
+private:
+#endif
+ uint16_t word;
+};
+
+#ifndef __cplusplus
+typedef struct scu_config_t scu_config_t;
+#endif
+
+typedef struct {
+ uint8_t port;
+ uint8_t pin;
+ scu_config_t config;
+} scu_setup_t;
+
+typedef struct {
+ base_clock_regs_t base;
+ branch_clock_regs_t branch;
+ peripheral_reset_t reset;
+ interrupt_config_t interrupt;
+} adc_resources_t;
+
+typedef struct {
+ base_clock_regs_t base;
+ branch_clock_regs_t branch;
+} audio_clock_resources_t;
+
+typedef struct {
+ base_clock_regs_t base;
+ branch_clock_regs_t branch;
+ peripheral_reset_t reset;
+} gpdma_resources_t;
+
+typedef struct {
+ base_clock_regs_t base;
+ branch_clock_regs_t branch;
+ peripheral_reset_t reset;
+} i2c_resources_t;
+
+typedef struct {
+ base_clock_regs_t base;
+ branch_clock_regs_t branch;
+ peripheral_reset_t reset[2];
+} i2s_resources_t;
+
+typedef struct {
+ base_clock_regs_t base;
+ branch_clock_regs_t branch;
+ peripheral_reset_t reset;
+} motocon_pwm_resources_t;
+
+typedef struct {
+ base_clock_regs_t base;
+ branch_clock_regs_t branch_register_if;
+ branch_clock_regs_t branch_peripheral;
+ peripheral_reset_t reset;
+ interrupt_config_t interrupt;
+} sdio_resources_t;
+
+typedef struct {
+ base_clock_regs_t base;
+ branch_clock_regs_t branch;
+ peripheral_reset_t reset;
+} sgpio_resources_t;
+
+typedef struct {
+ base_clock_regs_t base;
+ branch_clock_regs_t branch_register_if;
+ branch_clock_regs_t branch_peripheral;
+ peripheral_reset_t reset;
+} ssp_resources_t;
+
+typedef struct {
+ branch_clock_regs_t branch;
+ peripheral_reset_t reset;
+ interrupt_config_t interrupt;
+} timer_resources_t;
+
+typedef struct {
+ base_clock_regs_t base;
+ branch_clock_regs_t branch_register_if;
+ branch_clock_regs_t branch_peripheral;
+ peripheral_reset_t reset;
+ interrupt_config_t interrupt;
+} uart_resources_t;
+
+static const base_clock_regs_t base_clock_apb3 = {
+ .clk = &LPC_CGU->BASE_APB3_CLK, .stat = &LPC_CCU1->BASE_STAT, .stat_mask = (1 << 0),
+};
+
+static const base_clock_regs_t base_clock_apb1 = {
+ .clk = &LPC_CGU->BASE_APB1_CLK, .stat = &LPC_CCU1->BASE_STAT, .stat_mask = (1 << 1),
+};
+
+static const base_clock_regs_t base_clock_spifi = {
+ .clk = &LPC_CGU->BASE_SPIFI_CLK, .stat = &LPC_CCU1->BASE_STAT, .stat_mask = (1 << 2),
+};
+
+static const base_clock_regs_t base_clock_m4 = {
+ .clk = &LPC_CGU->BASE_M4_CLK, .stat = &LPC_CCU1->BASE_STAT, .stat_mask = (1 << 3),
+};
+
+static const base_clock_regs_t base_clock_periph = {
+ .clk = &LPC_CGU->BASE_PERIPH_CLK, .stat = &LPC_CCU1->BASE_STAT, .stat_mask = (1 << 6),
+};
+
+static const base_clock_regs_t base_clock_usb0 = {
+ .clk = &LPC_CGU->BASE_USB0_CLK, .stat = &LPC_CCU1->BASE_STAT, .stat_mask = (1 << 7),
+};
+
+static const base_clock_regs_t base_clock_usb1 = {
+ .clk = &LPC_CGU->BASE_USB1_CLK, .stat = &LPC_CCU1->BASE_STAT, .stat_mask = (1 << 8),
+};
+
+static const base_clock_regs_t base_clock_spi = {
+ .clk = &LPC_CGU->BASE_SPI_CLK, .stat = &LPC_CCU1->BASE_STAT, .stat_mask = (1 << 9),
+};
+
+static const base_clock_regs_t base_clock_uart3 = {
+ .clk = &LPC_CGU->BASE_UART3_CLK, .stat = &LPC_CCU2->BASE_STAT, .stat_mask = (1 << 1),
+};
+
+static const base_clock_regs_t base_clock_uart2 = {
+ .clk = &LPC_CGU->BASE_UART2_CLK, .stat = &LPC_CCU2->BASE_STAT, .stat_mask = (1 << 2),
+};
+
+static const base_clock_regs_t base_clock_uart1 = {
+ .clk = &LPC_CGU->BASE_UART1_CLK, .stat = &LPC_CCU2->BASE_STAT, .stat_mask = (1 << 3),
+};
+
+static const base_clock_regs_t base_clock_uart0 = {
+ .clk = &LPC_CGU->BASE_UART0_CLK, .stat = &LPC_CCU2->BASE_STAT, .stat_mask = (1 << 4),
+};
+
+static const base_clock_regs_t base_clock_ssp1 = {
+ .clk = &LPC_CGU->BASE_SSP1_CLK, .stat = &LPC_CCU2->BASE_STAT, .stat_mask = (1 << 5),
+};
+
+static const base_clock_regs_t base_clock_ssp0 = {
+ .clk = &LPC_CGU->BASE_SSP0_CLK, .stat = &LPC_CCU2->BASE_STAT, .stat_mask = (1 << 6),
+};
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
void peripheral_reset(const peripheral_reset_t* const reset);
void base_clock_enable(const base_clock_regs_t* const base);
@@ -48,4 +266,8 @@ void branch_clock_disable(const branch_clock_regs_t* const branch);
void interrupt_enable(const interrupt_config_t* const interrupt);
void interrupt_disable(const interrupt_config_t* const interrupt);
+#ifdef __cplusplus
+}
+#endif
+
#endif /* _LPC43XX_H_ */
diff --git a/firmware/chibios-portapack/os/hal/platforms/LPC43xx/pal_lld.c b/firmware/chibios-portapack/os/hal/platforms/LPC43xx/pal_lld.c
index 16202b15cbe1cb3ce4a8b67fc6caf95fcd83d02c..71c65a24bfb4cb85a14d66630bda76b15bf56971 100644
--- a/firmware/chibios-portapack/os/hal/platforms/LPC43xx/pal_lld.c
+++ b/firmware/chibios-portapack/os/hal/platforms/LPC43xx/pal_lld.c
@@ -40,74 +40,10 @@
/* Driver local variables and types. */
/*===========================================================================*/
-static const scu_config_t pin_config_vaa_enablex_pwm = { .MODE=1, .EPD=0, .EPUN=1, .EHS=0, .EZI=0, .ZIF=0 };
-static const scu_config_t pin_config_vaa_enablex_gpio = { .MODE=0, .EPD=0, .EPUN=1, .EHS=0, .EZI=0, .ZIF=0 };
-
/*===========================================================================*/
/* Driver local functions. */
/*===========================================================================*/
-
-/* VAA powers:
- * MAX5864 analog section.
- * MAX2837 registers and other functions.
- * RFFC5072 analog section.
- *
- * Beware that power applied to pins of the MAX2837 may
- * show up on VAA and start powering other components on the
- * VAA net. So turn on VAA before driving pins from MCU to
- * MAX2837.
- */
-static void vaa_power_on(void) {
- /* Very twitchy process for powering up VAA without glitching the 3.3V rail, which can send the
- * microcontroller into reset.
- *
- * Controlling timing while running from SPIFI flash is tricky, hence use of a PWM peripheral...
- */
-
- /* Configure and enable MOTOCONPWM peripheral clocks.
- * Assume IDIVC is running the post-bootloader configuration, outputting 96MHz derived from PLL1.
- */
- LPC_CCU1->CLK_APB1_MOTOCON_PWM_CFG.RUN = true;
-
- /* Combination of pulse duration and duty cycle was arrived at empirically, to keep supply glitching
- * to +/- 0.15V.
- */
- const uint32_t cycle_period = 128;
- const uint32_t enable_period = 10;
- LPC_MCPWM->TC2 = 0;
- LPC_MCPWM->MAT2 = cycle_period - enable_period;
- LPC_MCPWM->LIM2 = cycle_period;
-
- /* Switch !VAA_ENABLE pin from GPIO to MOTOCONPWM peripheral output, now that the peripheral is configured. */
- LPC_SCU->SFSP[5][ 0] = pin_config_vaa_enablex_pwm.word; // P5_0 /GPIO2[ 9]/MCOB2: !VAA_ENABLE, 10K PU
-
- /* Start the PWM operation. */
- LPC_MCPWM->CON_SET = (1 << 16);
-
- /* Wait until VAA rises to approximately 90% of final voltage. */
- /* Timing assumes we're running immediately after the bootloader: 96 MHz from IRC+PLL1
- */
- { volatile uint32_t delay = 12000; while(delay--); }
-
- /* Hold !VAA_ENABLE active using a GPIO, so we can reclaim and shut down the MOTOCONPWM peripheral. */
- LPC_GPIO->CLR[2] = (1 << 9); // !VAA_ENABLE
- LPC_GPIO->DIR[2] |= (1 << 9);
- LPC_SCU->SFSP[5][ 0] = pin_config_vaa_enablex_gpio.word; // P5_0 /GPIO2[ 9]/MCOB2: !VAA_ENABLE, 10K PU
-
- /* Reset the MOTOCONPWM peripheral. */
- LPC_RGU->RESET_CTRL[1] = (1U << 6);
-
- /* Shut down the MOTOCONPWM clocks. */
- LPC_CCU1->CLK_APB1_MOTOCON_PWM_CFG.RUN = false;
-}
-
-static void vaa_power_off(void) {
- // TODO: There's a lot of other stuff that must be done to prevent
- // leakage from +3V3 into VAA.
- LPC_GPIO->W2[9] = 1;
-}
-
/*===========================================================================*/
/* Driver interrupt handlers. */
/*===========================================================================*/
@@ -135,8 +71,6 @@ void _pal_lld_init(const PALConfig *config) {
for(size_t i=0; i<ARRAY_SIZE(config->SCU); i++) {
LPC_SCU->SFSP[config->SCU[i].port][config->SCU[i].pin] = config->SCU[i].config.word;
}
-
- vaa_power_on();
}
/**
diff --git a/firmware/chibios-portapack/os/hal/platforms/LPC43xx/pal_lld.h b/firmware/chibios-portapack/os/hal/platforms/LPC43xx/pal_lld.h
index f1537b5632153f291637ffc98547a14efcfd505f..925c60f9a612258ad5356aabb4621f0c03e26f49 100644
--- a/firmware/chibios-portapack/os/hal/platforms/LPC43xx/pal_lld.h
+++ b/firmware/chibios-portapack/os/hal/platforms/LPC43xx/pal_lld.h
@@ -41,37 +41,6 @@
/* I/O Ports Types and constants. */
/*===========================================================================*/
-/**
- * @brief GPIO port setup info.
- */
-typedef struct {
- /** Initial value for FIO_PIN register.*/
- uint32_t data;
- /** Initial value for FIO_DIR register.*/
- uint32_t dir;
-} gpio_setup_t;
-
-typedef struct {
- union {
- struct {
- uint16_t MODE : 3;
- uint16_t EPD : 1;
- uint16_t EPUN : 1;
- uint16_t EHS : 1;
- uint16_t EZI : 1;
- uint16_t ZIF : 1;
- uint16_t RESERVED0 : 8;
- };
- uint16_t word;
- };
-} scu_config_t;
-
-typedef struct {
- uint8_t port;
- uint8_t pin;
- scu_config_t config;
-} scu_setup_t;
-
/**
* @brief Generic I/O ports static initializer.
* @details An instance of this structure must be passed to @p palInit() at
diff --git a/firmware/chibios-portapack/os/hal/platforms/LPC43xx/sdc_lld.h b/firmware/chibios-portapack/os/hal/platforms/LPC43xx/sdc_lld.h
index 813b3b78e36ca7d21e97b5754134bce9b9d6e676..596dfcb37a43ea2519b9a3e874a5a750e321bd1f 100644
--- a/firmware/chibios-portapack/os/hal/platforms/LPC43xx/sdc_lld.h
+++ b/firmware/chibios-portapack/os/hal/platforms/LPC43xx/sdc_lld.h
@@ -76,17 +76,6 @@
/* Driver data structures and types. */
/*===========================================================================*/
-/**
- * @brief Structure used for SDIO configuration.
- */
-typedef struct {
- base_clock_regs_t base;
- branch_clock_regs_t branch_register_if;
- branch_clock_regs_t branch_peripheral;
- peripheral_reset_t reset;
- interrupt_config_t interrupt;
-} sdio_resources_t;
-
/**
* @brief Type of SDIO bus mode.
*/
diff --git a/firmware/chibios-portapack/os/hal/platforms/LPC43xx/serial_lld.c b/firmware/chibios-portapack/os/hal/platforms/LPC43xx/serial_lld.c
index b8c8383bdafa0777522b7d2680307a51d753bdad..bb7c8590a1d76dcd9e614f5dc22afab6ec2232bf 100755
--- a/firmware/chibios-portapack/os/hal/platforms/LPC43xx/serial_lld.c
+++ b/firmware/chibios-portapack/os/hal/platforms/LPC43xx/serial_lld.c
@@ -69,7 +69,7 @@ static const uart_resources_t usart0_resources = {
.branch_register_if = { .cfg = &LPC_CCU1->CLK_M4_USART0_CFG, .stat = &LPC_CCU1->CLK_M4_USART0_STAT },
.branch_peripheral = { .cfg = &LPC_CCU2->CLK_APB0_USART0_CFG, .stat = &LPC_CCU2->CLK_APB0_USART0_STAT },
.reset = { .output_index = 44 },
- .interrupt = { .irq = USART0_IRQn, priority_mask = CORTEX_PRIORITY_MASK(LPC_SERIAL_USART0_IRQ_PRIORITY) },
+ .interrupt = { .irq = USART0_IRQn, .priority_mask = CORTEX_PRIORITY_MASK(LPC_SERIAL_USART0_IRQ_PRIORITY) },
};
#endif
#if LPC_SERIAL_USE_UART1
@@ -78,7 +78,7 @@ static const uart_resources_t uart1_resources = {
.branch_register_if = { .cfg = &LPC_CCU1->CLK_M4_UART1_CFG, .stat = &LPC_CCU1->CLK_M4_UART1_STAT },
.branch_peripheral = { .cfg = &LPC_CCU2->CLK_APB0_UART1_CFG, .stat = &LPC_CCU2->CLK_APB0_UART1_STAT },
.reset = { .output_index = 45 },
- .interrupt = { .irq = UART1_IRQn, priority_mask = CORTEX_PRIORITY_MASK(LPC_SERIAL_UART1_IRQ_PRIORITY) },
+ .interrupt = { .irq = UART1_IRQn, .priority_mask = CORTEX_PRIORITY_MASK(LPC_SERIAL_UART1_IRQ_PRIORITY) },
};
#endif
#if LPC_SERIAL_USE_USART2
@@ -88,10 +88,10 @@ static const uart_resources_t usart2_resources = {
.branch_peripheral = { .cfg = &LPC_CCU2->CLK_APB2_USART2_CFG, .stat = &LPC_CCU2->CLK_APB2_USART2_STAT },
.reset = { .output_index = 46 },
#if defined(LPC43XX_M4)
- .interrupt = { .irq = USART2_IRQn, priority_mask = CORTEX_PRIORITY_MASK(LPC_SERIAL_USART2_IRQ_PRIORITY) },
+ .interrupt = { .irq = USART2_IRQn, .priority_mask = CORTEX_PRIORITY_MASK(LPC_SERIAL_USART2_IRQ_PRIORITY) },
#endif
#if defined(LPC43XX_M0)
- .interrupt = { .irq = USART2_OR_C_CAN1_IRQn, priority_mask = CORTEX_PRIORITY_MASK(LPC_SERIAL_USART2_IRQ_PRIORITY) },
+ .interrupt = { .irq = USART2_OR_C_CAN1_IRQn, .priority_mask = CORTEX_PRIORITY_MASK(LPC_SERIAL_USART2_IRQ_PRIORITY) },
#endif
};
#endif
@@ -101,7 +101,7 @@ static const uart_resources_t usart3_resources = {
.branch_register_if = { .cfg = &LPC_CCU1->CLK_M4_USART3_CFG, .stat = &LPC_CCU1->CLK_M4_USART3_STAT },
.branch_peripheral = { .cfg = &LPC_CCU2->CLK_APB2_USART3_CFG, .stat = &LPC_CCU2->CLK_APB2_USART3_STAT },
.reset = { .output_index = 47 },
- .interrupt = { .irq = USART3_IRQn, priority_mask = CORTEX_PRIORITY_MASK(LPC_SERIAL_USART3_IRQ_PRIORITY) },
+ .interrupt = { .irq = USART3_IRQn, .priority_mask = CORTEX_PRIORITY_MASK(LPC_SERIAL_USART3_IRQ_PRIORITY) },
};
#endif
@@ -438,7 +438,7 @@ void sd_lld_start(SerialDriver *sdp, const SerialConfig *config) {
void sd_lld_stop(SerialDriver *sdp) {
if (sdp->state == SD_READY) {
- uart_deinit(&sdp->uart);
+ uart_deinit(sdp->uart);
interrupt_disable(&sdp->resources->interrupt);
peripheral_reset(&sdp->resources->reset);
branch_clock_disable(&sdp->resources->branch_peripheral);
diff --git a/firmware/chibios-portapack/os/hal/platforms/LPC43xx/serial_lld.h b/firmware/chibios-portapack/os/hal/platforms/LPC43xx/serial_lld.h
index 92a59cfb907e08cc5b4031f741a564a38a6f81cb..9ab9a03ac7bf51084d16efa9a6da89efe27e1d6a 100755
--- a/firmware/chibios-portapack/os/hal/platforms/LPC43xx/serial_lld.h
+++ b/firmware/chibios-portapack/os/hal/platforms/LPC43xx/serial_lld.h
@@ -260,14 +260,6 @@
/**
* @brief Structure used for UART configuration.
*/
-typedef struct {
- base_clock_regs_t base;
- branch_clock_regs_t branch_register_if;
- branch_clock_regs_t branch_peripheral;
- peripheral_reset_t reset;
- interrupt_config_t interrupt;
-} uart_resources_t;
-
/**
* @brief LPC Serial Driver configuration structure.
* @details An instance of this structure must be passed to @p sdStart()
@@ -307,7 +299,7 @@ typedef struct {
/* Pointer to the UART registers block.*/ \
LPC_USART_Type *uart; \
/* Pointer to the non-peripheral SSP resources.*/ \
- const ssp_resources_t * resources;
+ const uart_resources_t * resources;
/*===========================================================================*/
/* Driver macros. */
diff --git a/firmware/chibios-portapack/os/hal/platforms/LPC43xx/spi_lld.h b/firmware/chibios-portapack/os/hal/platforms/LPC43xx/spi_lld.h
index 6af29de7de18fca392826a090d17586b55442ca4..9fb0193ec30ad74af22c900c7c24c5bc0188d366 100644
--- a/firmware/chibios-portapack/os/hal/platforms/LPC43xx/spi_lld.h
+++ b/firmware/chibios-portapack/os/hal/platforms/LPC43xx/spi_lld.h
@@ -220,16 +220,6 @@
/* Driver data structures and types. */
/*===========================================================================*/
-/**
- * @brief Structure used for SSP configuration.
- */
-typedef struct {
- base_clock_regs_t base;
- branch_clock_regs_t branch_register_if;
- branch_clock_regs_t branch_peripheral;
- peripheral_reset_t reset;
-} ssp_resources_t;
-
/**
* @brief Type of a structure representing an SPI driver.
*/
diff --git a/firmware/chibios-portapack/os/hal/platforms/LPC43xx_M4/hal_lld.c b/firmware/chibios-portapack/os/hal/platforms/LPC43xx_M4/hal_lld.c
index 97c6f8baad2535978d359ccf312b8bd75a04b937..a8d7d12df3397f4b2b6da9ed891e4e0f50d1cfdb 100755
--- a/firmware/chibios-portapack/os/hal/platforms/LPC43xx_M4/hal_lld.c
+++ b/firmware/chibios-portapack/os/hal/platforms/LPC43xx_M4/hal_lld.c
@@ -77,8 +77,10 @@ void systick_adjust_period(const uint32_t counts_per_tick) {
* @notapi
*/
void hal_lld_init(void) {
+#if defined(LPC43XX_M4_CLK_SRC)
LPC_CGU->BASE_M4_CLK.AUTOBLOCK = 1;
LPC_CGU->BASE_M4_CLK.CLK_SEL = LPC43XX_M4_CLK_SRC;
+#endif
/* SysTick initialization using the system clock.*/
systick_adjust_period(halLPCGetSystemClock() / CH_FREQUENCY - 1);
diff --git a/firmware/chibios-portapack/os/ports/GCC/ARMCMx/LPC43xx_M0/ld/LPC43xx_M0.ld b/firmware/chibios-portapack/os/ports/GCC/ARMCMx/LPC43xx_M0/ld/LPC43xx_M0.ld
index 48a4a6976d0b321a24ce51d7e8f3d9dca8131dba..6e43abe26b87a4d86e2cf934394794f4da25e860 100755
--- a/firmware/chibios-portapack/os/ports/GCC/ARMCMx/LPC43xx_M0/ld/LPC43xx_M0.ld
+++ b/firmware/chibios-portapack/os/ports/GCC/ARMCMx/LPC43xx_M0/ld/LPC43xx_M0.ld
@@ -23,8 +23,8 @@ __process_stack_size__ = 0x1000; /* main() stack */
MEMORY
{
- flash : org = 0x00000000, len = 512k /* SPIFI flash @ 0x140????? */
- ram : org = 0x20000000, len = 64k /* AHB SRAM @ 0x20000000 */
+ flash (rx) : org = 0x00000000, len = 1024k /* SPIFI flash @ 0x140????? */
+ ram (rwx) : org = 0x20000000, len = 64k /* AHB SRAM @ 0x20000000 */
}
__ram_start__ = ORIGIN(ram);
@@ -127,6 +127,8 @@ SECTIONS
PROVIDE(_edata = .);
} > ram
+ _textend = LOADADDR(.data) + SIZEOF(.data);
+
.bss ALIGN(4) : ALIGN(4)
{
. = ALIGN(4);
diff --git a/firmware/chibios-portapack/os/ports/GCC/ARMCMx/LPC43xx_M4/ld/LPC43xx_M4.ld b/firmware/chibios-portapack/os/ports/GCC/ARMCMx/LPC43xx_M4/ld/LPC43xx_M4.ld
index 6a9bdea907a232b37e3080f29b0c626f27839125..6eb4117531569f140f2a52b90a2cc7cc690bd3ad 100755
--- a/firmware/chibios-portapack/os/ports/GCC/ARMCMx/LPC43xx_M4/ld/LPC43xx_M4.ld
+++ b/firmware/chibios-portapack/os/ports/GCC/ARMCMx/LPC43xx_M4/ld/LPC43xx_M4.ld
@@ -23,8 +23,8 @@ __process_stack_size__ = 0x1000; /* main() stack */
MEMORY
{
- flash : org = 0x00000000, len = 32752 /* Local SRAM @ 0x10080000 */
- ram : org = 0x10000000, len = 96k /* Local SRAM @ 0x10000000 */
+ flash (rx) : org = 0x00000000, len = 32752 /* Local SRAM @ 0x10080000 */
+ ram (rwx) : org = 0x10000000, len = 96k /* Local SRAM @ 0x10000000 */
}
__ram_start__ = ORIGIN(ram);
@@ -127,6 +127,8 @@ SECTIONS
PROVIDE(_edata = .);
} > ram
+ _textend = LOADADDR(.data) + SIZEOF(.data);
+
.bss ALIGN(4) : ALIGN(4)
{
. = ALIGN(4);
diff --git a/firmware/common/baseband_sgpio.cpp b/firmware/common/baseband_sgpio.cpp
index 2dc34cbe4b7668e94172c72597e3144a0e5c2880..1177a4c07a6e52fab892d57609e6fda252f7f04d 100644
--- a/firmware/common/baseband_sgpio.cpp
+++ b/firmware/common/baseband_sgpio.cpp
@@ -135,9 +135,9 @@ enum {
PIN_DISABLE = 10,
PIN_DIRECTION = 11,
PIN_INVERT = 12,
- PIN_DECIM0 = 13,
- PIN_DECIM1 = 14,
- PIN_DECIM2 = 15,
+ PIN_SYNC_EN = 13,
+ PIN_P81 = 14,
+ PIN_P78 = 15,
};
enum class Slice : uint8_t {
@@ -189,9 +189,9 @@ constexpr uint32_t gpio_outreg(const Direction direction) {
constexpr uint32_t gpio_oenreg(const Direction direction) {
return
- (0U << PIN_DECIM2)
- | (0U << PIN_DECIM1)
- | (0U << PIN_DECIM0)
+ (0U << PIN_P78)
+ | (0U << PIN_P81)
+ | (0U << PIN_SYNC_EN)
| (0U << PIN_INVERT)
| (1U << PIN_DIRECTION)
| (1U << PIN_DISABLE)
@@ -295,6 +295,18 @@ constexpr P_OUT_CFG data_p_out_cfg(
;
}
+static const sgpio_resources_t sgpio_resources = {
+ .base = { .clk = &LPC_CGU->BASE_PERIPH_CLK, .stat = &LPC_CCU1->BASE_STAT, .stat_mask = (1 << 6) },
+ .branch = { .cfg = &LPC_CCU1->CLK_PERIPH_SGPIO_CFG, .stat = &LPC_CCU1->CLK_PERIPH_SGPIO_STAT },
+ .reset = { .output_index = 57 },
+};
+
+void SGPIO::init() {
+ base_clock_enable(&sgpio_resources.base);
+ branch_clock_enable(&sgpio_resources.branch);
+ peripheral_reset(&sgpio_resources.reset);
+}
+
void SGPIO::configure(const Direction direction) {
disable_all_slice_counters();
diff --git a/firmware/common/baseband_sgpio.hpp b/firmware/common/baseband_sgpio.hpp
index 23d07443f002eb42d35214b7f01e5cb51317aa7f..442507df473b7c2d16d5c5b8e123035900363edf 100644
--- a/firmware/common/baseband_sgpio.hpp
+++ b/firmware/common/baseband_sgpio.hpp
@@ -32,8 +32,7 @@ namespace baseband {
class SGPIO {
public:
- void init() {
- }
+ void init();
void configure(const Direction direction);
diff --git a/firmware/common/cpld_max5.cpp b/firmware/common/cpld_max5.cpp
index 565ab7bd4c341b8c6427b78d4a8c1e08589d44a7..c73dc0d8a232348f2a2aa1329530f85c90d1ce61 100644
--- a/firmware/common/cpld_max5.cpp
+++ b/firmware/common/cpld_max5.cpp
@@ -42,6 +42,17 @@ void CPLD::sample() {
}
}
+void CPLD::sample(std::bitset<240>& value) {
+ shift_ir(instruction_t::SAMPLE);
+ jtag.runtest_tck(93);
+ shift_dr(value);
+}
+
+void CPLD::extest(std::bitset<240>& value) {
+ shift_ir(instruction_t::EXTEST);
+ shift_dr(value);
+}
+
void CPLD::clamp() {
shift_ir(instruction_t::CLAMP);
jtag.runtest_tck(93);
diff --git a/firmware/common/cpld_max5.hpp b/firmware/common/cpld_max5.hpp
index 487f9a610ef180833459e455d2f30c13e6c80453..163d24a8cf03e630d26c310b86b2c33a66aa168d 100644
--- a/firmware/common/cpld_max5.hpp
+++ b/firmware/common/cpld_max5.hpp
@@ -48,6 +48,8 @@ public:
void bypass();
void sample();
+ void sample(std::bitset<240>& value);
+ void extest(std::bitset<240>& value);
void clamp();
void reset() {
diff --git a/firmware/common/gpdma.hpp b/firmware/common/gpdma.hpp
index c403569bd080d0530787bdd893a3913ea65ddbbc..cfdbd30d4b085d3ee41c2a974b11c7573f9e9b5c 100644
--- a/firmware/common/gpdma.hpp
+++ b/firmware/common/gpdma.hpp
@@ -341,9 +341,18 @@ constexpr std::array<channel::Channel, 8> channels { {
{ 4 }, { 5 }, { 6 }, { 7 },
} };
+static const gpdma_resources_t gpdma_resources = {
+ .base = { .clk = &LPC_CGU->BASE_M4_CLK, .stat = &LPC_CCU1->BASE_STAT, .stat_mask = (1 << 3) },
+ .branch = { .cfg = &LPC_CCU1->CLK_M4_DMA_CFG, .stat = &LPC_CCU1->CLK_M4_DMA_STAT },
+ .reset = { .output_index = 19 },
+};
+
class Controller {
public:
void enable() const {
+ base_clock_enable(&gpdma_resources.base);
+ branch_clock_enable(&gpdma_resources.branch);
+ peripheral_reset(&gpdma_resources.reset);
LPC_GPDMA->CONFIG |= (1U << 0);
}
@@ -352,6 +361,9 @@ public:
channel.disable();
}
LPC_GPDMA->CONFIG &= ~(1U << 0);
+ peripheral_reset(&gpdma_resources.reset);
+ branch_clock_disable(&gpdma_resources.branch);
+ base_clock_disable(&gpdma_resources.base);
}
};
diff --git a/firmware/common/gpio.hpp b/firmware/common/gpio.hpp
index b809393ed7cf312736a0de14a500dcc0992b0b53..5d8164c783d9c89dcd1508d012eb726b2da3e88f 100644
--- a/firmware/common/gpio.hpp
+++ b/firmware/common/gpio.hpp
@@ -186,7 +186,7 @@ struct PinConfig {
}
static constexpr PinConfig spifi_cs(const uint32_t mode) {
- return { .mode = mode, .pd = 0, .pu = 0, .fast = 1, .input = 0, .ifilt = 0 };
+ return { .mode = mode, .pd = 0, .pu = 0, .fast = 1, .input = 1, .ifilt = 0 };
}
};
diff --git a/firmware/common/hackrf_hal.cpp b/firmware/common/hackrf_hal.cpp
index 8f8f4c56d8268a17551de02819d02f5edfb85d8b..e49185722f55f21d01272b7770ffd4d85b28cc24 100644
--- a/firmware/common/hackrf_hal.cpp
+++ b/firmware/common/hackrf_hal.cpp
@@ -28,54 +28,5 @@ using namespace lpc43xx;
namespace hackrf {
namespace one {
-void reset() {
- /* "The reset delay is counted in IRC clock cycles. If the core frequency
- * CCLK is much higher than the IRC frequency, add a software delay of
- * fCCLK/fIRC clock cycles between resetting and accessing any of the
- * peripheral blocks."
- */
- rgu::reset_mask(
- /* Don't reset SCU, may trip up SPIFI pins if running from SPIFI
- * memory.
- */
- /*rgu::Reset::SCU */
- rgu::Reset::LCD
- | rgu::Reset::USB0
- | rgu::Reset::USB1
- | rgu::Reset::DMA
- | rgu::Reset::SDIO
- | rgu::Reset::EMC
- | rgu::Reset::ETHERNET
- | rgu::Reset::GPIO
- | rgu::Reset::TIMER0
- | rgu::Reset::TIMER1
- | rgu::Reset::TIMER2
- | rgu::Reset::TIMER3
- | rgu::Reset::RITIMER
- | rgu::Reset::SCT
- | rgu::Reset::MOTOCONPWM
- | rgu::Reset::QEI
- | rgu::Reset::ADC0
- | rgu::Reset::ADC1
- | rgu::Reset::DAC
- | rgu::Reset::UART0
- | rgu::Reset::UART1
- | rgu::Reset::UART2
- | rgu::Reset::UART3
- | rgu::Reset::I2C0
- | rgu::Reset::I2C1
- | rgu::Reset::SSP0
- | rgu::Reset::SSP1
- | rgu::Reset::I2S
- /* Don't reset SPIFI if running from SPIFI memory */
- /*| rgu::Reset::SPIFI*/
- | rgu::Reset::CAN1
- | rgu::Reset::CAN0
- | rgu::Reset::M0APP
- | rgu::Reset::SGPIO
- | rgu::Reset::SPI
- );
-}
-
} /* namespace one */
} /* namespace hackrf */
diff --git a/firmware/common/hackrf_hal.hpp b/firmware/common/hackrf_hal.hpp
index b7d5e1c0afdeb72c7ff4a2b0b34681ca4664f1d3..b22df69486d335ad18a7ecc0fbd109cd011e59ce 100644
--- a/firmware/common/hackrf_hal.hpp
+++ b/firmware/common/hackrf_hal.hpp
@@ -73,8 +73,6 @@ using adc0 = adc::ADC<LPC_ADC0_BASE>;
using adc1 = adc::ADC<LPC_ADC1_BASE>;
-void reset();
-
} /* namespace one */
} /* namespace hackrf */
diff --git a/firmware/common/i2s.hpp b/firmware/common/i2s.hpp
index d715146d9c2b36c73fb36beaad1779c0ba9efefd..a7f45e98f5c3c10b06f159754a8364fa6db2d93b 100644
--- a/firmware/common/i2s.hpp
+++ b/firmware/common/i2s.hpp
@@ -154,6 +154,17 @@ struct ConfigDMA {
uint32_t dma2;
};
+static const audio_clock_resources_t audio_clock_resources = {
+ .base = { .clk = &LPC_CGU->BASE_AUDIO_CLK, .stat = &LPC_CCU2->BASE_STAT, .stat_mask = 0 },
+ .branch = { .cfg = &LPC_CCU2->CLK_AUDIO_CFG, .stat = &LPC_CCU2->CLK_AUDIO_STAT },
+};
+
+static const i2s_resources_t i2s_resources = {
+ .base = { .clk = &LPC_CGU->BASE_APB1_CLK, .stat = &LPC_CCU1->BASE_STAT, .stat_mask = (1 << 1) },
+ .branch = { .cfg = &LPC_CCU1->CLK_APB1_I2S_CFG, .stat = &LPC_CCU1->CLK_APB1_I2S_STAT },
+ .reset = { { .output_index = 52 }, { .output_index = 53 } },
+};
+
template<uint32_t BaseAddress>
class I2S {
public:
@@ -161,6 +172,19 @@ public:
const ConfigTX& config_tx,
const ConfigRX& config_rx
) {
+ base_clock_enable(&i2s_resources.base);
+ branch_clock_enable(&i2s_resources.branch);
+
+ base_clock_enable(&audio_clock_resources.base);
+ branch_clock_enable(&audio_clock_resources.branch);
+
+ if( &p() == LPC_I2S0 ) {
+ peripheral_reset(&i2s_resources.reset[0]);
+ }
+ if( &p() == LPC_I2S1 ) {
+ peripheral_reset(&i2s_resources.reset[1]);
+ }
+
reset();
if( &p() == LPC_I2S0 ) {
@@ -194,6 +218,21 @@ public:
p().DMA2 = config_dma.dma2;
}
+ static void shutdown() {
+ if( &p() == LPC_I2S0 ) {
+ peripheral_reset(&i2s_resources.reset[0]);
+ }
+ if( &p() == LPC_I2S1 ) {
+ peripheral_reset(&i2s_resources.reset[1]);
+ }
+
+ branch_clock_disable(&audio_clock_resources.branch);
+ base_clock_disable(&audio_clock_resources.base);
+
+ branch_clock_disable(&i2s_resources.branch);
+ base_clock_disable(&i2s_resources.base);
+ }
+
static void rx_start() {
p().DAI &= ~(1U << 3);
}
diff --git a/firmware/common/lpc43xx_cpp.hpp b/firmware/common/lpc43xx_cpp.hpp
index bf00294f12b634ddfb15648d73cc48f0fa18ecfc..13ca9aa774faaba466a1269088161d8184e775e0 100644
--- a/firmware/common/lpc43xx_cpp.hpp
+++ b/firmware/common/lpc43xx_cpp.hpp
@@ -134,7 +134,7 @@ struct IDIV_CTRL {
constexpr operator uint32_t() const {
return
((pd & 1) << 0)
- | ((idiv & 3) << 2)
+ | ((idiv & 255) << 2)
| ((autoblock & 1) << 11)
| ((toUType(clk_sel) & 0x1f) << 24)
;
diff --git a/firmware/common/pins.hpp b/firmware/common/pins.hpp
index dacf46b8be0533724b22c5445c87eec040832be3..cd29e9a4bf0742bf343f9357e517e78e8af5d962 100644
--- a/firmware/common/pins.hpp
+++ b/firmware/common/pins.hpp
@@ -89,9 +89,9 @@ constexpr Pin pins[] = {
[P4_5] = { 4, 5, { .mode=0, .pd=0, .pu=0, .fast=0, .input=0, .ifilt=1 } }, /* RXENABLE/P56: MAX2837.RXENABLE(I) */
[P4_6] = { 4, 6, { .mode=0, .pd=0, .pu=0, .fast=0, .input=0, .ifilt=1 } }, /* XCVR_EN: 10K PD, MAX2837.ENABLE(I) */
[P4_7] = { 4, 7, { .mode=1, .pd=0, .pu=0, .fast=0, .input=1, .ifilt=0 } }, /* GP_CLKIN/P72/MCU_CLK: SI5351C.CLK7(O) */
- [P4_8] = { 4, 8, PinConfig::gpio_out_with_pullup(4) }, /* SGPIO13/BANK2F3M2: CPLD.90/HOST_DECIM_SEL0(I) */
- [P4_9] = { 4, 9, PinConfig::gpio_out_with_pullup(4) }, /* SGPIO14/BANK2F3M4: CPLD.81/HOST_DECIM_SEL1(I) */
- [P4_10] = { 4, 10, PinConfig::gpio_out_with_pullup(4) }, /* SGPIO15/BANK2F3M6: CPLD.78/HOST_DECIM_SEL2(I) */
+ [P4_8] = { 4, 8, PinConfig::floating_input_with_pull(0, 4) }, /* SGPIO13/BANK2F3M2: CPLD.90/HOST_SYNC_EN(I) */
+ [P4_9] = { 4, 9, PinConfig::floating_input(4) }, /* SGPIO14/BANK2F3M4: CPLD.81(I) */
+ [P4_10] = { 4, 10, PinConfig::floating_input(4) }, /* SGPIO15/BANK2F3M6: CPLD.78(I) */
[P5_0] = { 5, 0, { .mode=0, .pd=0, .pu=0, .fast=0, .input=0, .ifilt=1 } }, /* !VAA_ENABLE: 10K PU, Q3.G(I), power to VAA */
[P5_1] = { 5, 1, { .mode=0, .pd=0, .pu=0, .fast=0, .input=0, .ifilt=1 } }, /* LP/P45: U6.VCTL2(I), U5.VCTL1(I) */
[P5_2] = { 5, 2, { .mode=0, .pd=0, .pu=0, .fast=0, .input=0, .ifilt=1 } }, /* TX_MIX_BP/P46: U9.V1(I) */
diff --git a/firmware/common/spi_image.hpp b/firmware/common/spi_image.hpp
index 7e3fb6050bfbf748d75301d8091336e8b2b4f64e..fd2c7b7d0e04b6c1fdd06b3c372a6d91e18cc378 100644
--- a/firmware/common/spi_image.hpp
+++ b/firmware/common/spi_image.hpp
@@ -28,6 +28,8 @@
#include "memory_map.hpp"
+extern uint32_t _textend;
+
namespace portapack {
namespace spi_flash {
@@ -114,14 +116,14 @@ struct region_t {
}
};
-constexpr region_t images {
- .offset = 0x80000,
- .size = 0x80000,
+const region_t images {
+ .offset = reinterpret_cast<uint32_t>(&_textend),
+ .size = portapack::memory::map::spifi_cached.size() - reinterpret_cast<uint32_t>(&_textend),
};
-constexpr region_t application {
+const region_t application {
.offset = 0x00000,
- .size = 0x80000,
+ .size = reinterpret_cast<uint32_t>(&_textend),
};
} /* namespace spi_flash */
diff --git a/firmware/hackrf_cpld_portapack.svf b/firmware/hackrf_cpld_portapack.svf
deleted file mode 100644
index 424fb6597c7106ca419becde69882b6bf0fbb6f1..0000000000000000000000000000000000000000
--- a/firmware/hackrf_cpld_portapack.svf
+++ /dev/null
@@ -1,1122 +0,0 @@
-// Created using Xilinx Cse Software [ISE - 14.7]
-// Date: Tue Aug 23 23:01:43 2016
-
-TRST OFF;
-ENDIR IDLE;
-ENDDR IDLE;
-STATE RESET;
-STATE IDLE;
-FREQUENCY 1E6 HZ;
-TIR 0 ;
-HIR 0 ;
-TDR 0 ;
-HDR 0 ;
-TIR 0 ;
-HIR 0 ;
-HDR 0 ;
-TDR 0 ;
-//Loading device with 'idcode' instruction.
-SIR 8 TDI (01) SMASK (ff) ;
-SDR 32 TDI (00000000) SMASK (ffffffff) TDO (f6e5f093) MASK (0fff8fff) ;
-//Check for Read/Write Protect.
-SIR 8 TDI (ff) TDO (01) MASK (03) ;
-//Boundary Scan Chain Contents
-//Position 1: xc2c64a
-TIR 0 ;
-HIR 0 ;
-TDR 0 ;
-HDR 0 ;
-TIR 0 ;
-HIR 0 ;
-TDR 0 ;
-HDR 0 ;
-TIR 0 ;
-HIR 0 ;
-HDR 0 ;
-TDR 0 ;
-//Loading device with 'idcode' instruction.
-SIR 8 TDI (01) ;
-SDR 32 TDI (00000000) TDO (f6e5f093) ;
-//Check for Read/Write Protect.
-SIR 8 TDI (ff) TDO (01) MASK (03) ;
-//Loading device with 'bypass' instruction.
-SIR 8 TDI (ff) ;
-//Loading device with 'enable' instruction.
-SIR 8 TDI (e8) ;
-//Loading device with 'enable' instruction.
-SIR 8 TDI (e8) ;
-// Loading device with a 'erase' instruction.
-ENDIR IRPAUSE;
-SIR 8 TDI (ed) SMASK (ff) ;
-ENDIR IDLE;
-STATE IREXIT2 IRUPDATE DRSELECT DRCAPTURE DREXIT1 DRPAUSE;
-RUNTEST DRPAUSE 20 TCK;
-STATE IDLE;
-RUNTEST IDLE 100000 TCK;
-STATE DRPAUSE;
-RUNTEST DRPAUSE 5000 TCK;
-ENDIR IRPAUSE;
-SIR 8 TDI (f0) SMASK (ff) ;
-STATE IDLE;
-RUNTEST IDLE 20 TCK;
-ENDIR IRPAUSE;
-SIR 8 TDI (f0) SMASK (ff) ;
-STATE IREXIT2 IRUPDATE DRSELECT DRCAPTURE DREXIT1 DRUPDATE IDLE;
-RUNTEST 800 TCK;
-ENDIR IDLE;
-//Loading device with 'conld' instruction.
-SIR 8 TDI (c0) ;
-RUNTEST IDLE 100 TCK;
-//Loading device with 'enable' instruction.
-SIR 8 TDI (e8) ;
-// Programming.
-// Loading device with a 'program' instruction.
-ENDIR IRPAUSE;
-SIR 8 TDI (ea) ;
-SDR 281 TDI (0003c1fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe0f) SMASK (01ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ;
-ENDIR IDLE;
-RUNTEST 10000 TCK;
-SDR 281 TDI (0103f9ffffffffffffffffffffffffffffffff777fffffffffffffffffffffffffdffe7f) ;
-RUNTEST 10000 TCK;
-SDR 281 TDI (0180f97fffffffffffffffffffffffbfffe9de7fffffffffffffffffeffffffffffbfe7c) ;
-RUNTEST 10000 TCK;
-SDR 281 TDI (0083c1fffffffffffffffffffffffffffbf99e7ffffffffffbffffffffffffffffffde0f) ;
-RUNTEST 10000 TCK;
-SDR 281 TDI (00c3f9fffffffffffffffffffffffffffbf99e7fffffffffffffbfffffffffffffff7e7f) ;
-RUNTEST 10000 TCK;
-SDR 281 TDI (01c0f93ffffffffffffffffffffffffffff99e7fffffefbefbffffffefbeffffeaab2a7c) ;
-RUNTEST 10000 TCK;
-SDR 281 TDI (0143c1bffffffffffffffffffffdfffffffffeeefffffffffffffffffffffffffffffe0f) ;
-RUNTEST 10000 TCK;
-SDR 281 TDI (0043f9fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe7f) ;
-RUNTEST 10000 TCK;
-SDR 281 TDI (0060f9fffffffffffffffffffffbfffffff99e7fffffffffffffffffffffffffeaabfc7c) ;
-RUNTEST 10000 TCK;
-SDR 281 TDI (0163c1fffffffffffffffffffffffffffbf99e7ffffffffeffffffffffffffffefffde4f) ;
-RUNTEST 10000 TCK;
-SDR 281 TDI (01e3f9fffffffffffffffffffffffffffbf87e7fffffffbffffffffffffffffffeffde7c) ;
-RUNTEST 10000 TCK;
-SDR 281 TDI (00e0f9ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff02) ;
-RUNTEST 10000 TCK;
-SDR 281 TDI (00a3c1fffffffffffffffffffffffffefffbbefffffffffffffffffffffffffffffffe4f) ;
-RUNTEST 10000 TCK;
-SDR 281 TDI (01a3f9fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe7c) ;
-RUNTEST 10000 TCK;
-SDR 281 TDI (0120f9fffffffffffffffffffffffffffffd7f7ffffffffffffffffffffefffffffffe83) ;
-RUNTEST 10000 TCK;
-SDR 281 TDI (0023c1fffffffffffffffffffffffffffff5ff7fffffffffffffffffffffffffeaabf64f) ;
-RUNTEST 10000 TCK;
-SDR 281 TDI (0033f9fffffffffffffffffffffffffffbf87e7fffffeffffffffffffffffffffbffde7c) ;
-RUNTEST 10000 TCK;
-SDR 281 TDI (0130f9fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe83) ;
-RUNTEST 10000 TCK;
-SDR 281 TDI (01b3c1fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe0f) ;
-RUNTEST 10000 TCK;
-SDR 281 TDI (00b3f9fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe7f) ;
-RUNTEST 10000 TCK;
-SDR 281 TDI (00f0f9fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe7c) ;
-RUNTEST 10000 TCK;
-SDR 281 TDI (01f3c1ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffabfe0f) ;
-RUNTEST 10000 TCK;
-SDR 281 TDI (0173f9ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff9dfe1d) ;
-RUNTEST 10000 TCK;
-SDR 281 TDI (0070f9ffffffffffffffffffffffffffffffe607fffffffffffffffffffffffffffffe7c) ;
-RUNTEST 10000 TCK;
-SDR 281 TDI (0053c1ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff544f) ;
-RUNTEST 10000 TCK;
-SDR 281 TDI (0153f9fffffffffffffffffffffffffffffffffffffffffffffffffffffffffff07ffe7c) ;
-RUNTEST 10000 TCK;
-SDR 281 TDI (01d0f8bffffffffffffffffffffffffffffffffffffffffffffffffffffffffffdffff03) ;
-RUNTEST 10000 TCK;
-SDR 281 TDI (00d3c1fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe0f) ;
-RUNTEST 10000 TCK;
-SDR 281 TDI (0093f9fffffffffffffffffffffffffffffddf7fffffffffffffffffffbfffffffeffe7d) ;
-RUNTEST 10000 TCK;
-SDR 281 TDI (0190f9fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe7c) ;
-RUNTEST 10000 TCK;
-SDR 281 TDI (0113c1fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe4f) ;
-RUNTEST 10000 TCK;
-SDR 281 TDI (0013f9fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe7c) ;
-RUNTEST 10000 TCK;
-SDR 281 TDI (0018f9fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe83) ;
-RUNTEST 10000 TCK;
-SDR 281 TDI (011bc1fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe4f) ;
-RUNTEST 10000 TCK;
-SDR 281 TDI (019b99fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe7c) ;
-RUNTEST 10000 TCK;
-SDR 281 TDI (009afdfffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe83) ;
-RUNTEST 10000 TCK;
-SDR 281 TDI (00dbc1fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe4f) ;
-RUNTEST 10000 TCK;
-SDR 281 TDI (01db99fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe7c) ;
-RUNTEST 10000 TCK;
-SDR 281 TDI (015af9fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe83) ;
-RUNTEST 10000 TCK;
-SDR 281 TDI (005bc9fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe4f) ;
-RUNTEST 10000 TCK;
-SDR 281 TDI (007bd9fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe7c) ;
-RUNTEST 10000 TCK;
-SDR 281 TDI (017afdfffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe83) ;
-RUNTEST 10000 TCK;
-SDR 281 TDI (01fbc9fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe0f) ;
-RUNTEST 10000 TCK;
-SDR 281 TDI (00fbd9fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe7d) ;
-RUNTEST 10000 TCK;
-SDR 281 TDI (00bafdfffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe03) ;
-RUNTEST 10000 TCK;
-SDR 281 TDI (01bbc1fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe0f) ;
-RUNTEST 10000 TCK;
-SDR 281 TDI (013b99fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe7d) ;
-RUNTEST 10000 TCK;
-SDR 281 TDI (003afdfffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe03) ;
-RUNTEST 10000 TCK;
-SDR 281 TDI (002bc8eabfffffffffffffeffffffffffffffefefbfffffffffffffffffffffffffffe0f) ;
-RUNTEST 10000 TCK;
-SDR 281 TDI (0128feeabf7fffffeffffffffffffffffffffefefbfffffffffffffffffffffffffffe1d) ;
-RUNTEST 10000 TCK;
-SDR 281 TDI (01aa00eab7ffff7ffffffffffffffffffffffefefbfffffffffffffffffffffffffffe7c) ;
-RUNTEST 10000 TCK;
-SDR 281 TDI (00abc1bff77ffffffffffffffffffffffffffeeefffffffffffffffffffffffffffffe4f) ;
-RUNTEST 10000 TCK;
-SDR 281 TDI (00ebf8ebffffffffffffffffffffffbffffffefeeffffffffffffffffffffffffffffe69) ;
-RUNTEST 10000 TCK;
-SDR 281 TDI (01e8f9fffbfffffffffffffffffffffffffbbefffffffffffffffffffffffffffffffe7d) ;
-RUNTEST 10000 TCK;
-SDR 281 TDI (016bc9ffffbffffffffffffffffffffffffafefffffffffffffffffffffffffffffffe4f) ;
-RUNTEST 10000 TCK;
-SDR 281 TDI (0068e1fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe69) ;
-RUNTEST 10000 TCK;
-SDR 281 TDI (004ac5fffffffffffffefffffffffffffffffeeefffffffffffffffffffffffffffffe7d) ;
-RUNTEST 10000 TCK;
-SDR 281 TDI (014bc0fffffffffffffffffffffffffffbfffefeeffffffffffffffffffffffffffffe4f) ;
-RUNTEST 10000 TCK;
-SDR 281 TDI (01cbf9fffff7fffffffffffffffffffffffffeeefffffffffffffffffffffffffffffe69) ;
-RUNTEST 10000 TCK;
-SDR 281 TDI (00c8f9fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe7d) ;
-RUNTEST 10000 TCK;
-SDR 281 TDI (008bc8eaffffffffffffffffbffffffffffffefeeffffffffffffffffffffffffffffe4f) ;
-RUNTEST 10000 TCK;
-SDR 281 TDI (0188e0effffffffffffffffffffffffefffffefeeffffffffffffffffffffffffffffe69) ;
-RUNTEST 10000 TCK;
-SDR 281 TDI (010ac3fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe7d) ;
-RUNTEST 10000 TCK;
-SDR 281 TDI (000bc1fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe4f) ;
-RUNTEST 10000 TCK;
-SDR 281 TDI (000ff9fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe69) ;
-RUNTEST 10000 TCK;
-SDR 281 TDI (010cf9fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe7d) ;
-RUNTEST 10000 TCK;
-SDR 281 TDI (018fc9fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe4f) ;
-RUNTEST 10000 TCK;
-SDR 281 TDI (008ce1fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe69) ;
-RUNTEST 10000 TCK;
-SDR 281 TDI (00cec5ffffbffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe7d) ;
-RUNTEST 10000 TCK;
-SDR 281 TDI (01cfc1fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe4f) ;
-RUNTEST 10000 TCK;
-SDR 281 TDI (014ee1ffeffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe69) ;
-RUNTEST 10000 TCK;
-SDR 281 TDI (004cf8bffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe7d) ;
-RUNTEST 10000 TCK;
-SDR 281 TDI (006fc9dfcefffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe0f) ;
-RUNTEST 10000 TCK;
-SDR 281 TDI (016ce1fffffffffffffffffffffffffffffff9fffffffffffffffffffffffffffffffe7f) ;
-RUNTEST 10000 TCK;
-SDR 281 TDI (01eec3df7ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe7c) ;
-RUNTEST 10000 TCK;
-SDR 281 TDI (00efc993fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe0f) ;
-RUNTEST 10000 TCK;
-SDR 281 TDI (00ace1fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe7f) ;
-RUNTEST 10000 TCK;
-SDR 281 TDI (01aec5fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe7c) ;
-RUNTEST 10000 TCK;
-SDR 281 TDI (012fc1fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe0f) ;
-RUNTEST 10000 TCK;
-SDR 281 TDI (002ee1fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe7f) ;
-RUNTEST 10000 TCK;
-SDR 281 TDI (003cf9fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe7c) ;
-RUNTEST 10000 TCK;
-SDR 281 TDI (013fc1fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe0f) ;
-RUNTEST 10000 TCK;
-SDR 281 TDI (01bee1fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe7f) ;
-RUNTEST 10000 TCK;
-SDR 281 TDI (00bcf9fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe7c) ;
-RUNTEST 10000 TCK;
-SDR 281 TDI (00ffc1fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe0f) ;
-RUNTEST 10000 TCK;
-SDR 281 TDI (01fff9fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe7f) ;
-RUNTEST 10000 TCK;
-SDR 281 TDI (017cf9fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe7c) ;
-RUNTEST 10000 TCK;
-SDR 281 TDI (007fc9fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe0f) ;
-RUNTEST 10000 TCK;
-SDR 281 TDI (005ce1fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe7f) ;
-RUNTEST 10000 TCK;
-SDR 281 TDI (015ec5fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe7c) ;
-RUNTEST 10000 TCK;
-SDR 281 TDI (01dfc9fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe0f) ;
-RUNTEST 10000 TCK;
-SDR 281 TDI (00dce1fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe7f) ;
-RUNTEST 10000 TCK;
-SDR 281 TDI (009ec5fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe7c) ;
-RUNTEST 10000 TCK;
-SDR 281 TDI (019fc9fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe0f) ;
-RUNTEST 10000 TCK;
-SDR 281 TDI (011ce1fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe7f) ;
-RUNTEST 10000 TCK;
-SDR 281 TDI (001ec5fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe7c) ;
-RUNTEST 10000 TCK;
-SDR 281 TDI (0017ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ;
-RUNTEST 10000 TCK;
-SDR 281 TDI (0117ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ;
-RUNTEST 10000 TCK;
-SIR 8 TDI (f0) SMASK (ff) ;
-STATE IDLE;
-RUNTEST IDLE 20 TCK;
-ENDIR IRPAUSE;
-SIR 8 TDI (f0) SMASK (ff) ;
-STATE IREXIT2 IRUPDATE DRSELECT DRCAPTURE DREXIT1 DRUPDATE IDLE;
-RUNTEST 800 TCK;
-ENDIR IDLE;
-//Loading device with 'enable' instruction.
-SIR 8 TDI (e8) ;
-//Loading device with 'enable' instruction.
-SIR 8 TDI (e8) ;
-// Verification.
-// Loading device with a 'verify' instruction.
-ENDIR IRPAUSE;
-SIR 8 TDI (ee) ;
-ENDDR DRPAUSE;
-SDR 7 TDI (00) SMASK (7f) ;
-ENDIR IDLE;
-RUNTEST DRPAUSE 20 TCK;
-ENDDR IDLE;
-RUNTEST IDLE 100 TCK;
-SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (03c1fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe0f) MASK (
-03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ;
-RUNTEST 100 TCK;
-ENDDR DRPAUSE;
-SDR 7 TDI (40) SMASK (7f) ;
-RUNTEST DRPAUSE 20 TCK;
-ENDDR IDLE;
-RUNTEST IDLE 100 TCK;
-SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (03f9ffffffffffffffffffffffffffffffff777fffffffffffffffffffffffffdffe7f) MASK (
-03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ;
-RUNTEST 100 TCK;
-ENDDR DRPAUSE;
-SDR 7 TDI (60) SMASK (7f) ;
-RUNTEST DRPAUSE 20 TCK;
-ENDDR IDLE;
-RUNTEST IDLE 100 TCK;
-SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (00f97fffffffffffffffffffffffbfffe9de7fffffffffffffffffeffffffffffbfe7c) MASK (
-03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ;
-RUNTEST 100 TCK;
-ENDDR DRPAUSE;
-SDR 7 TDI (20) SMASK (7f) ;
-RUNTEST DRPAUSE 20 TCK;
-ENDDR IDLE;
-RUNTEST IDLE 100 TCK;
-SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (03c1fffffffffffffffffffffffffffbf99e7ffffffffffbffffffffffffffffffde0f) MASK (
-03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ;
-RUNTEST 100 TCK;
-ENDDR DRPAUSE;
-SDR 7 TDI (30) SMASK (7f) ;
-RUNTEST DRPAUSE 20 TCK;
-ENDDR IDLE;
-RUNTEST IDLE 100 TCK;
-SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (03f9fffffffffffffffffffffffffffbf99e7fffffffffffffbfffffffffffffff7e7f) MASK (
-03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ;
-RUNTEST 100 TCK;
-ENDDR DRPAUSE;
-SDR 7 TDI (70) SMASK (7f) ;
-RUNTEST DRPAUSE 20 TCK;
-ENDDR IDLE;
-RUNTEST IDLE 100 TCK;
-SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (00f93ffffffffffffffffffffffffffff99e7fffffefbefbffffffefbeffffeaab2a7c) MASK (
-03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ;
-RUNTEST 100 TCK;
-ENDDR DRPAUSE;
-SDR 7 TDI (50) SMASK (7f) ;
-RUNTEST DRPAUSE 20 TCK;
-ENDDR IDLE;
-RUNTEST IDLE 100 TCK;
-SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (03c1bffffffffffffffffffffdfffffffffeeefffffffffffffffffffffffffffffe0f) MASK (
-03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ;
-RUNTEST 100 TCK;
-ENDDR DRPAUSE;
-SDR 7 TDI (10) SMASK (7f) ;
-RUNTEST DRPAUSE 20 TCK;
-ENDDR IDLE;
-RUNTEST IDLE 100 TCK;
-SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (03f9fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe7f) MASK (
-03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ;
-RUNTEST 100 TCK;
-ENDDR DRPAUSE;
-SDR 7 TDI (18) SMASK (7f) ;
-RUNTEST DRPAUSE 20 TCK;
-ENDDR IDLE;
-RUNTEST IDLE 100 TCK;
-SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (00f9fffffffffffffffffffffbfffffff99e7fffffffffffffffffffffffffeaabfc7c) MASK (
-03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ;
-RUNTEST 100 TCK;
-ENDDR DRPAUSE;
-SDR 7 TDI (58) SMASK (7f) ;
-RUNTEST DRPAUSE 20 TCK;
-ENDDR IDLE;
-RUNTEST IDLE 100 TCK;
-SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (03c1fffffffffffffffffffffffffffbf99e7ffffffffeffffffffffffffffefffde4f) MASK (
-03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ;
-RUNTEST 100 TCK;
-ENDDR DRPAUSE;
-SDR 7 TDI (78) SMASK (7f) ;
-RUNTEST DRPAUSE 20 TCK;
-ENDDR IDLE;
-RUNTEST IDLE 100 TCK;
-SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (03f9fffffffffffffffffffffffffffbf87e7fffffffbffffffffffffffffffeffde7c) MASK (
-03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ;
-RUNTEST 100 TCK;
-ENDDR DRPAUSE;
-SDR 7 TDI (38) SMASK (7f) ;
-RUNTEST DRPAUSE 20 TCK;
-ENDDR IDLE;
-RUNTEST IDLE 100 TCK;
-SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (00f9ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff02) MASK (
-03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ;
-RUNTEST 100 TCK;
-ENDDR DRPAUSE;
-SDR 7 TDI (28) SMASK (7f) ;
-RUNTEST DRPAUSE 20 TCK;
-ENDDR IDLE;
-RUNTEST IDLE 100 TCK;
-SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (03c1fffffffffffffffffffffffffefffbbefffffffffffffffffffffffffffffffe4f) MASK (
-03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ;
-RUNTEST 100 TCK;
-ENDDR DRPAUSE;
-SDR 7 TDI (68) SMASK (7f) ;
-RUNTEST DRPAUSE 20 TCK;
-ENDDR IDLE;
-RUNTEST IDLE 100 TCK;
-SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (03f9fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe7c) MASK (
-03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ;
-RUNTEST 100 TCK;
-ENDDR DRPAUSE;
-SDR 7 TDI (48) SMASK (7f) ;
-RUNTEST DRPAUSE 20 TCK;
-ENDDR IDLE;
-RUNTEST IDLE 100 TCK;
-SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (00f9fffffffffffffffffffffffffffffd7f7ffffffffffffffffffffefffffffffe83) MASK (
-03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ;
-RUNTEST 100 TCK;
-ENDDR DRPAUSE;
-SDR 7 TDI (08) SMASK (7f) ;
-RUNTEST DRPAUSE 20 TCK;
-ENDDR IDLE;
-RUNTEST IDLE 100 TCK;
-SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (03c1fffffffffffffffffffffffffffff5ff7fffffffffffffffffffffffffeaabf64f) MASK (
-03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ;
-RUNTEST 100 TCK;
-ENDDR DRPAUSE;
-SDR 7 TDI (0c) SMASK (7f) ;
-RUNTEST DRPAUSE 20 TCK;
-ENDDR IDLE;
-RUNTEST IDLE 100 TCK;
-SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (03f9fffffffffffffffffffffffffffbf87e7fffffeffffffffffffffffffffbffde7c) MASK (
-03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ;
-RUNTEST 100 TCK;
-ENDDR DRPAUSE;
-SDR 7 TDI (4c) SMASK (7f) ;
-RUNTEST DRPAUSE 20 TCK;
-ENDDR IDLE;
-RUNTEST IDLE 100 TCK;
-SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (00f9fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe83) MASK (
-03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ;
-RUNTEST 100 TCK;
-ENDDR DRPAUSE;
-SDR 7 TDI (6c) SMASK (7f) ;
-RUNTEST DRPAUSE 20 TCK;
-ENDDR IDLE;
-RUNTEST IDLE 100 TCK;
-SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (03c1fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe0f) MASK (
-03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ;
-RUNTEST 100 TCK;
-ENDDR DRPAUSE;
-SDR 7 TDI (2c) SMASK (7f) ;
-RUNTEST DRPAUSE 20 TCK;
-ENDDR IDLE;
-RUNTEST IDLE 100 TCK;
-SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (03f9fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe7f) MASK (
-03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ;
-RUNTEST 100 TCK;
-ENDDR DRPAUSE;
-SDR 7 TDI (3c) SMASK (7f) ;
-RUNTEST DRPAUSE 20 TCK;
-ENDDR IDLE;
-RUNTEST IDLE 100 TCK;
-SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (00f9fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe7c) MASK (
-03fffffffffffffffffffffffffffffe00000001ffffffffffffffffffffffffffffff) ;
-RUNTEST 100 TCK;
-ENDDR DRPAUSE;
-SDR 7 TDI (7c) SMASK (7f) ;
-RUNTEST DRPAUSE 20 TCK;
-ENDDR IDLE;
-RUNTEST IDLE 100 TCK;
-SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (03c1ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffabfe0f) MASK (
-03fffffffffffffffffffffffffffffe00000001ffffffffffffffffffffffffffffff) ;
-RUNTEST 100 TCK;
-ENDDR DRPAUSE;
-SDR 7 TDI (5c) SMASK (7f) ;
-RUNTEST DRPAUSE 20 TCK;
-ENDDR IDLE;
-RUNTEST IDLE 100 TCK;
-SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (03f9ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff9dfe1d) MASK (
-03fffffffffffffffffffffffffffffe00000001ffffffffffffffffffffffffffffff) ;
-RUNTEST 100 TCK;
-ENDDR DRPAUSE;
-SDR 7 TDI (1c) SMASK (7f) ;
-RUNTEST DRPAUSE 20 TCK;
-ENDDR IDLE;
-RUNTEST IDLE 100 TCK;
-SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (00f9ffffffffffffffffffffffffffffffe607fffffffffffffffffffffffffffffe7c) MASK (
-03fffffffffffffffffffffffffffffe001ff801ffffffffffffffffffffffffffffff) ;
-RUNTEST 100 TCK;
-ENDDR DRPAUSE;
-SDR 7 TDI (14) SMASK (7f) ;
-RUNTEST DRPAUSE 20 TCK;
-ENDDR IDLE;
-RUNTEST IDLE 100 TCK;
-SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (03c1ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff544f) MASK (
-03fffffffffffffffffffffffffffffe001f8001ffffffffffffffffffffffffffffff) ;
-RUNTEST 100 TCK;
-ENDDR DRPAUSE;
-SDR 7 TDI (54) SMASK (7f) ;
-RUNTEST DRPAUSE 20 TCK;
-ENDDR IDLE;
-RUNTEST IDLE 100 TCK;
-SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (03f9fffffffffffffffffffffffffffffffffffffffffffffffffffffffffff07ffe7c) MASK (
-03fffffffffffffffffffffffffffffe00000001ffffffffffffffffffffffffffffff) ;
-RUNTEST 100 TCK;
-ENDDR DRPAUSE;
-SDR 7 TDI (74) SMASK (7f) ;
-RUNTEST DRPAUSE 20 TCK;
-ENDDR IDLE;
-RUNTEST IDLE 100 TCK;
-SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (00f8bffffffffffffffffffffffffffffffffffffffffffffffffffffffffffdffff03) MASK (
-03fffffffffffffffffffffffffffffe00000001ffffffffffffffffffffffffffffff) ;
-RUNTEST 100 TCK;
-ENDDR DRPAUSE;
-SDR 7 TDI (34) SMASK (7f) ;
-RUNTEST DRPAUSE 20 TCK;
-ENDDR IDLE;
-RUNTEST IDLE 100 TCK;
-SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (03c1fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe0f) MASK (
-03fffffffffffffffffffffffffffffe00000001ffffffffffffffffffffffffffffff) ;
-RUNTEST 100 TCK;
-ENDDR DRPAUSE;
-SDR 7 TDI (24) SMASK (7f) ;
-RUNTEST DRPAUSE 20 TCK;
-ENDDR IDLE;
-RUNTEST IDLE 100 TCK;
-SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (03f9fffffffffffffffffffffffffffffddf7fffffffffffffffffffbfffffffeffe7d) MASK (
-03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ;
-RUNTEST 100 TCK;
-ENDDR DRPAUSE;
-SDR 7 TDI (64) SMASK (7f) ;
-RUNTEST DRPAUSE 20 TCK;
-ENDDR IDLE;
-RUNTEST IDLE 100 TCK;
-SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (00f9fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe7c) MASK (
-03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ;
-RUNTEST 100 TCK;
-ENDDR DRPAUSE;
-SDR 7 TDI (44) SMASK (7f) ;
-RUNTEST DRPAUSE 20 TCK;
-ENDDR IDLE;
-RUNTEST IDLE 100 TCK;
-SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (03c1fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe4f) MASK (
-03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ;
-RUNTEST 100 TCK;
-ENDDR DRPAUSE;
-SDR 7 TDI (04) SMASK (7f) ;
-RUNTEST DRPAUSE 20 TCK;
-ENDDR IDLE;
-RUNTEST IDLE 100 TCK;
-SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (03f9fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe7c) MASK (
-03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ;
-RUNTEST 100 TCK;
-ENDDR DRPAUSE;
-SDR 7 TDI (06) SMASK (7f) ;
-RUNTEST DRPAUSE 20 TCK;
-ENDDR IDLE;
-RUNTEST IDLE 100 TCK;
-SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (00f9fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe83) MASK (
-03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ;
-RUNTEST 100 TCK;
-ENDDR DRPAUSE;
-SDR 7 TDI (46) SMASK (7f) ;
-RUNTEST DRPAUSE 20 TCK;
-ENDDR IDLE;
-RUNTEST IDLE 100 TCK;
-SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (03c1fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe4f) MASK (
-03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ;
-RUNTEST 100 TCK;
-ENDDR DRPAUSE;
-SDR 7 TDI (66) SMASK (7f) ;
-RUNTEST DRPAUSE 20 TCK;
-ENDDR IDLE;
-RUNTEST IDLE 100 TCK;
-SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (0399fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe7c) MASK (
-03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ;
-RUNTEST 100 TCK;
-ENDDR DRPAUSE;
-SDR 7 TDI (26) SMASK (7f) ;
-RUNTEST DRPAUSE 20 TCK;
-ENDDR IDLE;
-RUNTEST IDLE 100 TCK;
-SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (02fdfffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe83) MASK (
-03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ;
-RUNTEST 100 TCK;
-ENDDR DRPAUSE;
-SDR 7 TDI (36) SMASK (7f) ;
-RUNTEST DRPAUSE 20 TCK;
-ENDDR IDLE;
-RUNTEST IDLE 100 TCK;
-SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (03c1fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe4f) MASK (
-03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ;
-RUNTEST 100 TCK;
-ENDDR DRPAUSE;
-SDR 7 TDI (76) SMASK (7f) ;
-RUNTEST DRPAUSE 20 TCK;
-ENDDR IDLE;
-RUNTEST IDLE 100 TCK;
-SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (0399fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe7c) MASK (
-03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ;
-RUNTEST 100 TCK;
-ENDDR DRPAUSE;
-SDR 7 TDI (56) SMASK (7f) ;
-RUNTEST DRPAUSE 20 TCK;
-ENDDR IDLE;
-RUNTEST IDLE 100 TCK;
-SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (02f9fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe83) MASK (
-03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ;
-RUNTEST 100 TCK;
-ENDDR DRPAUSE;
-SDR 7 TDI (16) SMASK (7f) ;
-RUNTEST DRPAUSE 20 TCK;
-ENDDR IDLE;
-RUNTEST IDLE 100 TCK;
-SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (03c9fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe4f) MASK (
-03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ;
-RUNTEST 100 TCK;
-ENDDR DRPAUSE;
-SDR 7 TDI (1e) SMASK (7f) ;
-RUNTEST DRPAUSE 20 TCK;
-ENDDR IDLE;
-RUNTEST IDLE 100 TCK;
-SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (03d9fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe7c) MASK (
-03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ;
-RUNTEST 100 TCK;
-ENDDR DRPAUSE;
-SDR 7 TDI (5e) SMASK (7f) ;
-RUNTEST DRPAUSE 20 TCK;
-ENDDR IDLE;
-RUNTEST IDLE 100 TCK;
-SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (02fdfffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe83) MASK (
-03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ;
-RUNTEST 100 TCK;
-ENDDR DRPAUSE;
-SDR 7 TDI (7e) SMASK (7f) ;
-RUNTEST DRPAUSE 20 TCK;
-ENDDR IDLE;
-RUNTEST IDLE 100 TCK;
-SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (03c9fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe0f) MASK (
-03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ;
-RUNTEST 100 TCK;
-ENDDR DRPAUSE;
-SDR 7 TDI (3e) SMASK (7f) ;
-RUNTEST DRPAUSE 20 TCK;
-ENDDR IDLE;
-RUNTEST IDLE 100 TCK;
-SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (03d9fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe7d) MASK (
-03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ;
-RUNTEST 100 TCK;
-ENDDR DRPAUSE;
-SDR 7 TDI (2e) SMASK (7f) ;
-RUNTEST DRPAUSE 20 TCK;
-ENDDR IDLE;
-RUNTEST IDLE 100 TCK;
-SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (02fdfffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe03) MASK (
-03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ;
-RUNTEST 100 TCK;
-ENDDR DRPAUSE;
-SDR 7 TDI (6e) SMASK (7f) ;
-RUNTEST DRPAUSE 20 TCK;
-ENDDR IDLE;
-RUNTEST IDLE 100 TCK;
-SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (03c1fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe0f) MASK (
-03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ;
-RUNTEST 100 TCK;
-ENDDR DRPAUSE;
-SDR 7 TDI (4e) SMASK (7f) ;
-RUNTEST DRPAUSE 20 TCK;
-ENDDR IDLE;
-RUNTEST IDLE 100 TCK;
-SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (0399fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe7d) MASK (
-03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ;
-RUNTEST 100 TCK;
-ENDDR DRPAUSE;
-SDR 7 TDI (0e) SMASK (7f) ;
-RUNTEST DRPAUSE 20 TCK;
-ENDDR IDLE;
-RUNTEST IDLE 100 TCK;
-SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (02fdfffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe03) MASK (
-03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ;
-RUNTEST 100 TCK;
-ENDDR DRPAUSE;
-SDR 7 TDI (0a) SMASK (7f) ;
-RUNTEST DRPAUSE 20 TCK;
-ENDDR IDLE;
-RUNTEST IDLE 100 TCK;
-SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (03c8eabfffffffffffffeffffffffffffffefefbfffffffffffffffffffffffffffe0f) MASK (
-03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ;
-RUNTEST 100 TCK;
-ENDDR DRPAUSE;
-SDR 7 TDI (4a) SMASK (7f) ;
-RUNTEST DRPAUSE 20 TCK;
-ENDDR IDLE;
-RUNTEST IDLE 100 TCK;
-SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (00feeabf7fffffeffffffffffffffffffffefefbfffffffffffffffffffffffffffe1d) MASK (
-03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ;
-RUNTEST 100 TCK;
-ENDDR DRPAUSE;
-SDR 7 TDI (6a) SMASK (7f) ;
-RUNTEST DRPAUSE 20 TCK;
-ENDDR IDLE;
-RUNTEST IDLE 100 TCK;
-SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (0200eab7ffff7ffffffffffffffffffffffefefbfffffffffffffffffffffffffffe7c) MASK (
-03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ;
-RUNTEST 100 TCK;
-ENDDR DRPAUSE;
-SDR 7 TDI (2a) SMASK (7f) ;
-RUNTEST DRPAUSE 20 TCK;
-ENDDR IDLE;
-RUNTEST IDLE 100 TCK;
-SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (03c1bff77ffffffffffffffffffffffffffeeefffffffffffffffffffffffffffffe4f) MASK (
-03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ;
-RUNTEST 100 TCK;
-ENDDR DRPAUSE;
-SDR 7 TDI (3a) SMASK (7f) ;
-RUNTEST DRPAUSE 20 TCK;
-ENDDR IDLE;
-RUNTEST IDLE 100 TCK;
-SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (03f8ebffffffffffffffffffffffbffffffefeeffffffffffffffffffffffffffffe69) MASK (
-03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ;
-RUNTEST 100 TCK;
-ENDDR DRPAUSE;
-SDR 7 TDI (7a) SMASK (7f) ;
-RUNTEST DRPAUSE 20 TCK;
-ENDDR IDLE;
-RUNTEST IDLE 100 TCK;
-SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (00f9fffbfffffffffffffffffffffffffbbefffffffffffffffffffffffffffffffe7d) MASK (
-03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ;
-RUNTEST 100 TCK;
-ENDDR DRPAUSE;
-SDR 7 TDI (5a) SMASK (7f) ;
-RUNTEST DRPAUSE 20 TCK;
-ENDDR IDLE;
-RUNTEST IDLE 100 TCK;
-SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (03c9ffffbffffffffffffffffffffffffafefffffffffffffffffffffffffffffffe4f) MASK (
-03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ;
-RUNTEST 100 TCK;
-ENDDR DRPAUSE;
-SDR 7 TDI (1a) SMASK (7f) ;
-RUNTEST DRPAUSE 20 TCK;
-ENDDR IDLE;
-RUNTEST IDLE 100 TCK;
-SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (00e1fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe69) MASK (
-03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ;
-RUNTEST 100 TCK;
-ENDDR DRPAUSE;
-SDR 7 TDI (12) SMASK (7f) ;
-RUNTEST DRPAUSE 20 TCK;
-ENDDR IDLE;
-RUNTEST IDLE 100 TCK;
-SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (02c5fffffffffffffefffffffffffffffffeeefffffffffffffffffffffffffffffe7d) MASK (
-03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ;
-RUNTEST 100 TCK;
-ENDDR DRPAUSE;
-SDR 7 TDI (52) SMASK (7f) ;
-RUNTEST DRPAUSE 20 TCK;
-ENDDR IDLE;
-RUNTEST IDLE 100 TCK;
-SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (03c0fffffffffffffffffffffffffffbfffefeeffffffffffffffffffffffffffffe4f) MASK (
-03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ;
-RUNTEST 100 TCK;
-ENDDR DRPAUSE;
-SDR 7 TDI (72) SMASK (7f) ;
-RUNTEST DRPAUSE 20 TCK;
-ENDDR IDLE;
-RUNTEST IDLE 100 TCK;
-SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (03f9fffff7fffffffffffffffffffffffffeeefffffffffffffffffffffffffffffe69) MASK (
-03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ;
-RUNTEST 100 TCK;
-ENDDR DRPAUSE;
-SDR 7 TDI (32) SMASK (7f) ;
-RUNTEST DRPAUSE 20 TCK;
-ENDDR IDLE;
-RUNTEST IDLE 100 TCK;
-SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (00f9fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe7d) MASK (
-03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ;
-RUNTEST 100 TCK;
-ENDDR DRPAUSE;
-SDR 7 TDI (22) SMASK (7f) ;
-RUNTEST DRPAUSE 20 TCK;
-ENDDR IDLE;
-RUNTEST IDLE 100 TCK;
-SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (03c8eaffffffffffffffffbffffffffffffefeeffffffffffffffffffffffffffffe4f) MASK (
-03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ;
-RUNTEST 100 TCK;
-ENDDR DRPAUSE;
-SDR 7 TDI (62) SMASK (7f) ;
-RUNTEST DRPAUSE 20 TCK;
-ENDDR IDLE;
-RUNTEST IDLE 100 TCK;
-SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (00e0effffffffffffffffffffffffefffffefeeffffffffffffffffffffffffffffe69) MASK (
-03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ;
-RUNTEST 100 TCK;
-ENDDR DRPAUSE;
-SDR 7 TDI (42) SMASK (7f) ;
-RUNTEST DRPAUSE 20 TCK;
-ENDDR IDLE;
-RUNTEST IDLE 100 TCK;
-SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (02c3fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe7d) MASK (
-03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ;
-RUNTEST 100 TCK;
-ENDDR DRPAUSE;
-SDR 7 TDI (02) SMASK (7f) ;
-RUNTEST DRPAUSE 20 TCK;
-ENDDR IDLE;
-RUNTEST IDLE 100 TCK;
-SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (03c1fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe4f) MASK (
-03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ;
-RUNTEST 100 TCK;
-ENDDR DRPAUSE;
-SDR 7 TDI (03) SMASK (7f) ;
-RUNTEST DRPAUSE 20 TCK;
-ENDDR IDLE;
-RUNTEST IDLE 100 TCK;
-SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (03f9fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe69) MASK (
-03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ;
-RUNTEST 100 TCK;
-ENDDR DRPAUSE;
-SDR 7 TDI (43) SMASK (7f) ;
-RUNTEST DRPAUSE 20 TCK;
-ENDDR IDLE;
-RUNTEST IDLE 100 TCK;
-SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (00f9fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe7d) MASK (
-03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ;
-RUNTEST 100 TCK;
-ENDDR DRPAUSE;
-SDR 7 TDI (63) SMASK (7f) ;
-RUNTEST DRPAUSE 20 TCK;
-ENDDR IDLE;
-RUNTEST IDLE 100 TCK;
-SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (03c9fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe4f) MASK (
-03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ;
-RUNTEST 100 TCK;
-ENDDR DRPAUSE;
-SDR 7 TDI (23) SMASK (7f) ;
-RUNTEST DRPAUSE 20 TCK;
-ENDDR IDLE;
-RUNTEST IDLE 100 TCK;
-SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (00e1fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe69) MASK (
-03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ;
-RUNTEST 100 TCK;
-ENDDR DRPAUSE;
-SDR 7 TDI (33) SMASK (7f) ;
-RUNTEST DRPAUSE 20 TCK;
-ENDDR IDLE;
-RUNTEST IDLE 100 TCK;
-SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (02c5ffffbffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe7d) MASK (
-03fffffffffffffffffffffffffffffe00000001ffffffffffffffffffffffffffffff) ;
-RUNTEST 100 TCK;
-ENDDR DRPAUSE;
-SDR 7 TDI (73) SMASK (7f) ;
-RUNTEST DRPAUSE 20 TCK;
-ENDDR IDLE;
-RUNTEST IDLE 100 TCK;
-SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (03c1fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe4f) MASK (
-03fffffffffffffffffffffffffffffe00000001ffffffffffffffffffffffffffffff) ;
-RUNTEST 100 TCK;
-ENDDR DRPAUSE;
-SDR 7 TDI (53) SMASK (7f) ;
-RUNTEST DRPAUSE 20 TCK;
-ENDDR IDLE;
-RUNTEST IDLE 100 TCK;
-SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (02e1ffeffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe69) MASK (
-03fffffffffffffffffffffffffffffe00000001ffffffffffffffffffffffffffffff) ;
-RUNTEST 100 TCK;
-ENDDR DRPAUSE;
-SDR 7 TDI (13) SMASK (7f) ;
-RUNTEST DRPAUSE 20 TCK;
-ENDDR IDLE;
-RUNTEST IDLE 100 TCK;
-SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (00f8bffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe7d) MASK (
-03fffffffffffffffffffffffffffffe00000001ffffffffffffffffffffffffffffff) ;
-RUNTEST 100 TCK;
-ENDDR DRPAUSE;
-SDR 7 TDI (1b) SMASK (7f) ;
-RUNTEST DRPAUSE 20 TCK;
-ENDDR IDLE;
-RUNTEST IDLE 100 TCK;
-SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (03c9dfcefffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe0f) MASK (
-03fffffffffffffffffffffffffffffe00000001ffffffffffffffffffffffffffffff) ;
-RUNTEST 100 TCK;
-ENDDR DRPAUSE;
-SDR 7 TDI (5b) SMASK (7f) ;
-RUNTEST DRPAUSE 20 TCK;
-ENDDR IDLE;
-RUNTEST IDLE 100 TCK;
-SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (00e1fffffffffffffffffffffffffffffff9fffffffffffffffffffffffffffffffe7f) MASK (
-03fffffffffffffffffffffffffffffe00078001ffffffffffffffffffffffffffffff) ;
-RUNTEST 100 TCK;
-ENDDR DRPAUSE;
-SDR 7 TDI (7b) SMASK (7f) ;
-RUNTEST DRPAUSE 20 TCK;
-ENDDR IDLE;
-RUNTEST IDLE 100 TCK;
-SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (02c3df7ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe7c) MASK (
-03fffffffffffffffffffffffffffffe00000001ffffffffffffffffffffffffffffff) ;
-RUNTEST 100 TCK;
-ENDDR DRPAUSE;
-SDR 7 TDI (3b) SMASK (7f) ;
-RUNTEST DRPAUSE 20 TCK;
-ENDDR IDLE;
-RUNTEST IDLE 100 TCK;
-SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (03c993fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe0f) MASK (
-03fffffffffffffffffffffffffffffe00000001ffffffffffffffffffffffffffffff) ;
-RUNTEST 100 TCK;
-ENDDR DRPAUSE;
-SDR 7 TDI (2b) SMASK (7f) ;
-RUNTEST DRPAUSE 20 TCK;
-ENDDR IDLE;
-RUNTEST IDLE 100 TCK;
-SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (00e1fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe7f) MASK (
-03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ;
-RUNTEST 100 TCK;
-ENDDR DRPAUSE;
-SDR 7 TDI (6b) SMASK (7f) ;
-RUNTEST DRPAUSE 20 TCK;
-ENDDR IDLE;
-RUNTEST IDLE 100 TCK;
-SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (02c5fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe7c) MASK (
-03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ;
-RUNTEST 100 TCK;
-ENDDR DRPAUSE;
-SDR 7 TDI (4b) SMASK (7f) ;
-RUNTEST DRPAUSE 20 TCK;
-ENDDR IDLE;
-RUNTEST IDLE 100 TCK;
-SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (03c1fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe0f) MASK (
-03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ;
-RUNTEST 100 TCK;
-ENDDR DRPAUSE;
-SDR 7 TDI (0b) SMASK (7f) ;
-RUNTEST DRPAUSE 20 TCK;
-ENDDR IDLE;
-RUNTEST IDLE 100 TCK;
-SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (02e1fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe7f) MASK (
-03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ;
-RUNTEST 100 TCK;
-ENDDR DRPAUSE;
-SDR 7 TDI (0f) SMASK (7f) ;
-RUNTEST DRPAUSE 20 TCK;
-ENDDR IDLE;
-RUNTEST IDLE 100 TCK;
-SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (00f9fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe7c) MASK (
-03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ;
-RUNTEST 100 TCK;
-ENDDR DRPAUSE;
-SDR 7 TDI (4f) SMASK (7f) ;
-RUNTEST DRPAUSE 20 TCK;
-ENDDR IDLE;
-RUNTEST IDLE 100 TCK;
-SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (03c1fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe0f) MASK (
-03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ;
-RUNTEST 100 TCK;
-ENDDR DRPAUSE;
-SDR 7 TDI (6f) SMASK (7f) ;
-RUNTEST DRPAUSE 20 TCK;
-ENDDR IDLE;
-RUNTEST IDLE 100 TCK;
-SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (02e1fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe7f) MASK (
-03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ;
-RUNTEST 100 TCK;
-ENDDR DRPAUSE;
-SDR 7 TDI (2f) SMASK (7f) ;
-RUNTEST DRPAUSE 20 TCK;
-ENDDR IDLE;
-RUNTEST IDLE 100 TCK;
-SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (00f9fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe7c) MASK (
-03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ;
-RUNTEST 100 TCK;
-ENDDR DRPAUSE;
-SDR 7 TDI (3f) SMASK (7f) ;
-RUNTEST DRPAUSE 20 TCK;
-ENDDR IDLE;
-RUNTEST IDLE 100 TCK;
-SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (03c1fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe0f) MASK (
-03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ;
-RUNTEST 100 TCK;
-ENDDR DRPAUSE;
-SDR 7 TDI (7f) SMASK (7f) ;
-RUNTEST DRPAUSE 20 TCK;
-ENDDR IDLE;
-RUNTEST IDLE 100 TCK;
-SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (03f9fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe7f) MASK (
-03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ;
-RUNTEST 100 TCK;
-ENDDR DRPAUSE;
-SDR 7 TDI (5f) SMASK (7f) ;
-RUNTEST DRPAUSE 20 TCK;
-ENDDR IDLE;
-RUNTEST IDLE 100 TCK;
-SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (00f9fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe7c) MASK (
-03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ;
-RUNTEST 100 TCK;
-ENDDR DRPAUSE;
-SDR 7 TDI (1f) SMASK (7f) ;
-RUNTEST DRPAUSE 20 TCK;
-ENDDR IDLE;
-RUNTEST IDLE 100 TCK;
-SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (03c9fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe0f) MASK (
-03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ;
-RUNTEST 100 TCK;
-ENDDR DRPAUSE;
-SDR 7 TDI (17) SMASK (7f) ;
-RUNTEST DRPAUSE 20 TCK;
-ENDDR IDLE;
-RUNTEST IDLE 100 TCK;
-SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (00e1fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe7f) MASK (
-03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ;
-RUNTEST 100 TCK;
-ENDDR DRPAUSE;
-SDR 7 TDI (57) SMASK (7f) ;
-RUNTEST DRPAUSE 20 TCK;
-ENDDR IDLE;
-RUNTEST IDLE 100 TCK;
-SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (02c5fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe7c) MASK (
-03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ;
-RUNTEST 100 TCK;
-ENDDR DRPAUSE;
-SDR 7 TDI (77) SMASK (7f) ;
-RUNTEST DRPAUSE 20 TCK;
-ENDDR IDLE;
-RUNTEST IDLE 100 TCK;
-SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (03c9fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe0f) MASK (
-03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ;
-RUNTEST 100 TCK;
-ENDDR DRPAUSE;
-SDR 7 TDI (37) SMASK (7f) ;
-RUNTEST DRPAUSE 20 TCK;
-ENDDR IDLE;
-RUNTEST IDLE 100 TCK;
-SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (00e1fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe7f) MASK (
-03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ;
-RUNTEST 100 TCK;
-ENDDR DRPAUSE;
-SDR 7 TDI (27) SMASK (7f) ;
-RUNTEST DRPAUSE 20 TCK;
-ENDDR IDLE;
-RUNTEST IDLE 100 TCK;
-SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (02c5fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe7c) MASK (
-03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ;
-RUNTEST 100 TCK;
-ENDDR DRPAUSE;
-SDR 7 TDI (67) SMASK (7f) ;
-RUNTEST DRPAUSE 20 TCK;
-ENDDR IDLE;
-RUNTEST IDLE 100 TCK;
-SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (03c9fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe0f) MASK (
-03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ;
-RUNTEST 100 TCK;
-ENDDR DRPAUSE;
-SDR 7 TDI (47) SMASK (7f) ;
-RUNTEST DRPAUSE 20 TCK;
-ENDDR IDLE;
-RUNTEST IDLE 100 TCK;
-SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (00e1fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe7f) MASK (
-03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ;
-RUNTEST 100 TCK;
-ENDDR DRPAUSE;
-SDR 7 TDI (07) SMASK (7f) ;
-RUNTEST DRPAUSE 20 TCK;
-ENDDR IDLE;
-RUNTEST IDLE 100 TCK;
-SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (02c5fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe7c) MASK (
-03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ;
-RUNTEST 100 TCK;
-ENDDR DRPAUSE;
-SDR 7 TDI (05) SMASK (7f) ;
-RUNTEST DRPAUSE 20 TCK;
-ENDDR IDLE;
-RUNTEST IDLE 100 TCK;
-SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) MASK (
-0000000000000000000000000000000000000000000000000000000000000000000000) ;
-RUNTEST 100 TCK;
-ENDDR DRPAUSE;
-SDR 7 TDI (45) SMASK (7f) ;
-RUNTEST DRPAUSE 20 TCK;
-ENDDR IDLE;
-RUNTEST IDLE 100 TCK;
-// masking lower UES bits.
-SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) MASK (
-0000000000000000000000000000000000000000000000000000000000000000000000) ;
-RUNTEST 100 TCK;
-SIR 8 TDI (f0) SMASK (ff) ;
-STATE IDLE;
-RUNTEST IDLE 20 TCK;
-ENDIR IRPAUSE;
-SIR 8 TDI (f0) SMASK (ff) ;
-STATE IREXIT2 IRUPDATE DRSELECT DRCAPTURE DREXIT1 DRUPDATE IDLE;
-RUNTEST 800 TCK;
-ENDIR IDLE;
-//Loading device with 'conld' instruction.
-SIR 8 TDI (c0) ;
-RUNTEST IDLE 100 TCK;
-//Loading device with 'enable' instruction.
-SIR 8 TDI (e8) ;
-// Setting Done bit ...
-// Loading device with a 'program' instruction.
-ENDIR IRPAUSE;
-SIR 8 TDI (ea) ;
-SDR 281 TDI (0017fdffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (01ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ;
-ENDIR IDLE;
-RUNTEST 10000 TCK;
-SIR 8 TDI (f0) SMASK (ff) ;
-STATE IDLE;
-RUNTEST IDLE 20 TCK;
-ENDIR IRPAUSE;
-SIR 8 TDI (f0) SMASK (ff) ;
-STATE IREXIT2 IRUPDATE DRSELECT DRCAPTURE DREXIT1 DRUPDATE IDLE;
-RUNTEST 800 TCK;
-ENDIR IDLE;
-//Loading device with 'conld' instruction.
-SIR 8 TDI (c0) ;
-RUNTEST IDLE 100 TCK;
-//Loading device with 'idcode' instruction.
-SIR 8 TDI (01) ;
-SDR 32 TDI (00000000) SMASK (ffffffff) TDO (f6e5f093) MASK (0fff8fff) ;
-//Check for Done bit.
-SIR 8 TDI (ff) TDO (05) MASK (07) ;
-//Loading device with 'bypass' instruction.
-SIR 8 TDI (ff) ;
-TIR 0 ;
-HIR 0 ;
-HDR 0 ;
-TDR 0 ;
-TIR 0 ;
-HIR 0 ;
-TDR 0 ;
-HDR 0 ;
-SIR 8 TDI (ff) ;
-SDR 1 TDI (00) SMASK (01) ;
diff --git a/firmware/hackrf_one_usb.dfu b/firmware/hackrf_one_usb.dfu
deleted file mode 100644
index 35ebb42a40a920eec5e8e9207f2bba8f40be7aff..0000000000000000000000000000000000000000
Binary files a/firmware/hackrf_one_usb.dfu and /dev/null differ
diff --git a/firmware/tools/make_spi_image.py b/firmware/tools/make_spi_image.py
index 4c90a059ef7ab31ede96dadf84c0db1c71429adc..983e7c6e73fa53244e04cb710150c8a1684e3fb5 100755
--- a/firmware/tools/make_spi_image.py
+++ b/firmware/tools/make_spi_image.py
@@ -55,12 +55,12 @@ images = (
{
'name': 'application',
'data': application_image,
- 'size': 0x80000, #len(application_image),
+ 'size': len(application_image),
},
{
'name': 'baseband',
'data': baseband_image,
- 'size': 0x80000,
+ 'size': len(baseband_image),
},
)
diff --git a/hardware/portapack_h1/audio.sch b/hardware/portapack_h1/audio.sch
index 1e809ca2dd6d4c408bbdc90a6b106db7c658df76..e29dc15042f0edf5a56612aee48f254a31af0d94 100644
--- a/hardware/portapack_h1/audio.sch
+++ b/hardware/portapack_h1/audio.sch
@@ -6,8 +6,8 @@ $Descr A4 11693 8268
encoding utf-8
Sheet 2 6
Title "PortaPack H1"
-Date "2018-08-20"
-Rev "20180820"
+Date "2018-10-29"
+Rev "20181029"
Comp "ShareBrained Technology, Inc."
Comment1 "Copyright © 2014-2018 Jared Boone"
Comment2 "License: GNU General Public License, version 2"
diff --git a/hardware/portapack_h1/gps.sch b/hardware/portapack_h1/gps.sch
index 53f0167c82a0a19d1a6ebcc7ce15e8ef81c63b8e..6251843ef14210e857ca1abd96c951189579b0fa 100644
--- a/hardware/portapack_h1/gps.sch
+++ b/hardware/portapack_h1/gps.sch
@@ -6,8 +6,8 @@ $Descr A4 11693 8268
encoding utf-8
Sheet 6 6
Title "PortaPack H1"
-Date "2018-08-20"
-Rev "20180820"
+Date "2018-10-29"
+Rev "20181029"
Comp "ShareBrained Technology, Inc."
Comment1 "Copyright © 2014-2018 Jared Boone"
Comment2 "License: GNU General Public License, version 2"
diff --git a/hardware/portapack_h1/hackrf_if.sch b/hardware/portapack_h1/hackrf_if.sch
index 7004f574ccf47d75084b612a54ad6c2968cc99b9..c7757a7b6766348045f125d4d76b674181c325b4 100644
--- a/hardware/portapack_h1/hackrf_if.sch
+++ b/hardware/portapack_h1/hackrf_if.sch
@@ -6,8 +6,8 @@ $Descr A4 11693 8268
encoding utf-8
Sheet 4 6
Title "PortaPack H1"
-Date "2018-08-20"
-Rev "20180820"
+Date "2018-10-29"
+Rev "20181029"
Comp "ShareBrained Technology, Inc."
Comment1 "Copyright © 2014-2018 Jared Boone"
Comment2 "License: GNU General Public License, version 2"
diff --git a/hardware/portapack_h1/lcd_sw_sd.sch b/hardware/portapack_h1/lcd_sw_sd.sch
index c610c35f2e75bd3d412bba843eba61320051532a..9ac433c755f91600c9882964c4793cde71f69d31 100644
--- a/hardware/portapack_h1/lcd_sw_sd.sch
+++ b/hardware/portapack_h1/lcd_sw_sd.sch
@@ -6,8 +6,8 @@ $Descr A4 11693 8268
encoding utf-8
Sheet 3 6
Title "PortaPack H1"
-Date "2018-08-20"
-Rev "20180820"
+Date "2018-10-29"
+Rev "20181029"
Comp "ShareBrained Technology, Inc."
Comment1 "Copyright © 2014-2018 Jared Boone"
Comment2 "License: GNU General Public License, version 2"
diff --git a/hardware/portapack_h1/portapack_h1.kicad_pcb b/hardware/portapack_h1/portapack_h1.kicad_pcb
index 1a824437814d34c95c8ae92db7ee8d5c4f83ec11..52843f1e1f68aa95f3d8c98afb46d9662e404cdf 100644
--- a/hardware/portapack_h1/portapack_h1.kicad_pcb
+++ b/hardware/portapack_h1/portapack_h1.kicad_pcb
@@ -1,9 +1,9 @@
-(kicad_pcb (version 20171130) (host pcbnew 5.0.0-fee4fd1~66~ubuntu18.04.1)
+(kicad_pcb (version 20171130) (host pcbnew 5.0.1-33cea8e~68~ubuntu18.04.1)
(general
(thickness 1.6)
(drawings 110)
- (tracks 1981)
+ (tracks 1983)
(zones 0)
(modules 111)
(nets 140)
@@ -12,8 +12,8 @@
(page A4)
(title_block
(title "PortaPack H1")
- (date 2018-08-20)
- (rev 20180820)
+ (date 2018-10-29)
+ (rev 20181029)
(company "ShareBrained Technology, Inc.")
(comment 1 "License: GNU General Public License, version 2")
(comment 2 "Copyright (c) 2014-2018 Jared Boone")
@@ -34,8 +34,8 @@
(39 F.Mask user)
(40 Dwgs.User user)
(41 Cmts.User user)
- (42 Eco1.User user hide)
- (43 Eco2.User user hide)
+ (42 Eco1.User user)
+ (43 Eco2.User user)
(44 Edge.Cuts user)
(46 B.CrtYd user)
(47 F.CrtYd user)
@@ -68,26 +68,26 @@
(pcb_text_width 0.3)
(pcb_text_size 1.5 1.5)
(mod_edge_width 0.1524)
- (mod_text_size 0.6096 0.6096)
- (mod_text_width 0.12)
+ (mod_text_size 0.6 0.6)
+ (mod_text_width 0.025)
(pad_size 0.85 1.6)
(pad_drill 0)
- (pad_to_mask_clearance 0.0508)
- (solder_mask_min_width 0.1016)
+ (pad_to_mask_clearance 0)
+ (solder_mask_min_width 0.195)
(aux_axis_origin 60 175)
(visible_elements FFFDBDFF)
(pcbplotparams
- (layerselection 0x3d3fc_ffffffff)
+ (layerselection 0x3dfff_ffffffff)
(usegerberextensions true)
(usegerberattributes false)
(usegerberadvancedattributes false)
- (creategerberjobfile false)
+ (creategerberjobfile true)
(excludeedgelayer true)
(linewidth 0.120000)
(plotframeref false)
(viasonmask false)
(mode 1)
- (useauxorigin false)
+ (useauxorigin true)
(hpglpennumber 1)
(hpglpenspeed 20)
(hpglpendiameter 15.000000)
@@ -102,7 +102,7 @@
(mirror false)
(drillshape 0)
(scaleselection 1)
- (outputdirectory "private/gerber/20180820/"))
+ (outputdirectory "private/gerber/20181029/"))
)
(net 0 "")
@@ -394,7 +394,658 @@
(add_net "Net-(TP9-Pad1)")
)
- (module ipc_osccc:IPC_OSCCC320X250X110L75X100N (layer 4_bot) (tedit 5B7AF51E) (tstamp 5B7B01BE)
+ (module eastrising:ER-CON50HT-1 (layer 4_bot) (tedit 5BD22CE5) (tstamp 58B09183)
+ (at 87.3 137.5 90)
+ (path /53A9129D/58AE3A81)
+ (attr smd)
+ (fp_text reference J3 (at -13.75 2.95 90) (layer B.SilkS)
+ (effects (font (size 0.6096 0.6096) (thickness 0.12)) (justify mirror))
+ )
+ (fp_text value ER-TFT024-3_FPC (at 0 0 90) (layer B.Fab)
+ (effects (font (size 0.6096 0.6096) (thickness 0.12)) (justify mirror))
+ )
+ (fp_line (start 12.75 -2.25) (end 12.75 0.5) (layer B.Fab) (width 0.025))
+ (fp_line (start 12.75 0.5) (end -12.75 0.5) (layer B.Fab) (width 0.025))
+ (fp_line (start -12.75 0.5) (end -12.75 -2.25) (layer B.Fab) (width 0.025))
+ (fp_line (start 15.325 -2.25) (end -15.325 -2.25) (layer B.Fab) (width 0.025))
+ (fp_line (start 14.675 2.25) (end -14.675 2.25) (layer B.Fab) (width 0.025))
+ (fp_line (start 14.675 -0.85) (end 14.675 2.25) (layer B.Fab) (width 0.025))
+ (fp_line (start -14.675 -0.85) (end -14.675 2.25) (layer B.Fab) (width 0.025))
+ (fp_line (start -15.325 -0.85) (end -15.325 -2.25) (layer B.Fab) (width 0.025))
+ (fp_line (start 15.325 -0.85) (end 15.325 -2.25) (layer B.Fab) (width 0.025))
+ (fp_line (start 15.325 -0.85) (end 14.675 -0.85) (layer B.Fab) (width 0.025))
+ (fp_line (start -14.675 -0.85) (end -15.325 -0.85) (layer B.Fab) (width 0.025))
+ (fp_circle (center -12.85 2.75) (end -12.975 2.75) (layer B.SilkS) (width 0.25))
+ (fp_line (start 15.385 -0.79) (end 15.385 -2.31) (layer B.SilkS) (width 0.12))
+ (fp_line (start 15 -0.79) (end 15.385 -0.79) (layer B.SilkS) (width 0.12))
+ (fp_line (start 14.735 2.31) (end 12.675 2.31) (layer B.SilkS) (width 0.12))
+ (fp_line (start -14.735 2.31) (end -12.675 2.31) (layer B.SilkS) (width 0.12))
+ (fp_line (start -15.385 -0.79) (end -15 -0.79) (layer B.SilkS) (width 0.12))
+ (fp_line (start -15.385 -2.31) (end -15.385 -0.79) (layer B.SilkS) (width 0.12))
+ (fp_line (start 15.385 -2.31) (end -15.385 -2.31) (layer B.SilkS) (width 0.12))
+ (fp_line (start 12.65 3.75) (end 12.65 2.5) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 12.65 2.5) (end 15.05 2.5) (layer B.CrtYd) (width 0.05))
+ (fp_line (start -15.6 -0.6) (end -15.05 -0.6) (layer B.CrtYd) (width 0.05))
+ (fp_line (start -15.6 -2.5) (end -15.6 -0.6) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 15.6 -2.5) (end -15.6 -2.5) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 15.6 -0.6) (end 15.6 -2.5) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 15.05 -0.6) (end 15.6 -0.6) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 15.05 2.5) (end 15.05 -0.6) (layer B.CrtYd) (width 0.05))
+ (fp_line (start -12.65 3.75) (end 12.65 3.75) (layer B.CrtYd) (width 0.05))
+ (fp_line (start -12.65 2.5) (end -12.65 3.75) (layer B.CrtYd) (width 0.05))
+ (fp_line (start -15.05 2.5) (end -12.65 2.5) (layer B.CrtYd) (width 0.05))
+ (fp_line (start -15.05 -0.6) (end -15.05 2.5) (layer B.CrtYd) (width 0.05))
+ (fp_text user %R (at 0 0 90) (layer B.Fab)
+ (effects (font (size 1 1) (thickness 0.025)) (justify mirror))
+ )
+ (pad SHLD smd rect (at -13.79 0.55 270) (size 2 3) (layers 4_bot B.Paste B.Mask)
+ (net 47 GND))
+ (pad SHLD smd rect (at 13.79 0.55 270) (size 2 3) (layers 4_bot B.Paste B.Mask)
+ (net 47 GND))
+ (pad 50 smd rect (at 12.25 2.875 270) (size 0.3 1.25) (layers 4_bot B.Paste B.Mask)
+ (net 47 GND))
+ (pad 49 smd rect (at 11.75 2.875 270) (size 0.3 1.25) (layers 4_bot B.Paste B.Mask)
+ (net 47 GND))
+ (pad 48 smd rect (at 11.25 2.875 270) (size 0.3 1.25) (layers 4_bot B.Paste B.Mask)
+ (net 47 GND))
+ (pad 47 smd rect (at 10.75 2.875 270) (size 0.3 1.25) (layers 4_bot B.Paste B.Mask)
+ (net 45 /hackrf_if/TP_U))
+ (pad 46 smd rect (at 10.25 2.875 270) (size 0.3 1.25) (layers 4_bot B.Paste B.Mask)
+ (net 43 /hackrf_if/TP_L))
+ (pad 45 smd rect (at 9.75 2.875 270) (size 0.3 1.25) (layers 4_bot B.Paste B.Mask)
+ (net 42 /hackrf_if/TP_D))
+ (pad 44 smd rect (at 9.25 2.875 270) (size 0.3 1.25) (layers 4_bot B.Paste B.Mask)
+ (net 44 /hackrf_if/TP_R))
+ (pad 43 smd rect (at 8.75 2.875 270) (size 0.3 1.25) (layers 4_bot B.Paste B.Mask)
+ (net 47 GND))
+ (pad 42 smd rect (at 8.25 2.875 270) (size 0.3 1.25) (layers 4_bot B.Paste B.Mask)
+ (net 121 +3V3))
+ (pad 41 smd rect (at 7.75 2.875 270) (size 0.3 1.25) (layers 4_bot B.Paste B.Mask)
+ (net 122 +1V8))
+ (pad 40 smd rect (at 7.25 2.875 270) (size 0.3 1.25) (layers 4_bot B.Paste B.Mask)
+ (net 122 +1V8))
+ (pad 39 smd rect (at 6.75 2.875 270) (size 0.3 1.25) (layers 4_bot B.Paste B.Mask)
+ (net 25 /hackrf_if/LCD_TE))
+ (pad 38 smd rect (at 6.25 2.875 270) (size 0.3 1.25) (layers 4_bot B.Paste B.Mask)
+ (net 47 GND))
+ (pad 37 smd rect (at 5.75 2.875 270) (size 0.3 1.25) (layers 4_bot B.Paste B.Mask)
+ (net 24 /hackrf_if/LCD_RS))
+ (pad 36 smd rect (at 5.25 2.875 270) (size 0.3 1.25) (layers 4_bot B.Paste B.Mask)
+ (net 26 /hackrf_if/LCD_WR#))
+ (pad 35 smd rect (at 4.75 2.875 270) (size 0.3 1.25) (layers 4_bot B.Paste B.Mask)
+ (net 22 /hackrf_if/LCD_RD#))
+ (pad 34 smd rect (at 4.25 2.875 270) (size 0.3 1.25) (layers 4_bot B.Paste B.Mask)
+ (net 47 GND))
+ (pad 33 smd rect (at 3.75 2.875 270) (size 0.3 1.25) (layers 4_bot B.Paste B.Mask))
+ (pad 32 smd rect (at 3.25 2.875 270) (size 0.3 1.25) (layers 4_bot B.Paste B.Mask)
+ (net 6 /hackrf_if/LCD_DB0))
+ (pad 31 smd rect (at 2.75 2.875 270) (size 0.3 1.25) (layers 4_bot B.Paste B.Mask)
+ (net 7 /hackrf_if/LCD_DB1))
+ (pad 30 smd rect (at 2.25 2.875 270) (size 0.3 1.25) (layers 4_bot B.Paste B.Mask)
+ (net 14 /hackrf_if/LCD_DB2))
+ (pad 29 smd rect (at 1.75 2.875 270) (size 0.3 1.25) (layers 4_bot B.Paste B.Mask)
+ (net 15 /hackrf_if/LCD_DB3))
+ (pad 28 smd rect (at 1.25 2.875 270) (size 0.3 1.25) (layers 4_bot B.Paste B.Mask)
+ (net 16 /hackrf_if/LCD_DB4))
+ (pad 27 smd rect (at 0.75 2.875 270) (size 0.3 1.25) (layers 4_bot B.Paste B.Mask)
+ (net 17 /hackrf_if/LCD_DB5))
+ (pad 26 smd rect (at 0.25 2.875 270) (size 0.3 1.25) (layers 4_bot B.Paste B.Mask)
+ (net 18 /hackrf_if/LCD_DB6))
+ (pad 25 smd rect (at -0.25 2.875 270) (size 0.3 1.25) (layers 4_bot B.Paste B.Mask)
+ (net 19 /hackrf_if/LCD_DB7))
+ (pad 24 smd rect (at -0.75 2.875 270) (size 0.3 1.25) (layers 4_bot B.Paste B.Mask)
+ (net 20 /hackrf_if/LCD_DB8))
+ (pad 23 smd rect (at -1.25 2.875 270) (size 0.3 1.25) (layers 4_bot B.Paste B.Mask)
+ (net 21 /hackrf_if/LCD_DB9))
+ (pad 22 smd rect (at -1.75 2.875 270) (size 0.3 1.25) (layers 4_bot B.Paste B.Mask)
+ (net 8 /hackrf_if/LCD_DB10))
+ (pad 21 smd rect (at -2.25 2.875 270) (size 0.3 1.25) (layers 4_bot B.Paste B.Mask)
+ (net 9 /hackrf_if/LCD_DB11))
+ (pad 20 smd rect (at -2.75 2.875 270) (size 0.3 1.25) (layers 4_bot B.Paste B.Mask)
+ (net 10 /hackrf_if/LCD_DB12))
+ (pad 19 smd rect (at -3.25 2.875 270) (size 0.3 1.25) (layers 4_bot B.Paste B.Mask)
+ (net 11 /hackrf_if/LCD_DB13))
+ (pad 18 smd rect (at -3.75 2.875 270) (size 0.3 1.25) (layers 4_bot B.Paste B.Mask)
+ (net 12 /hackrf_if/LCD_DB14))
+ (pad 17 smd rect (at -4.25 2.875 270) (size 0.3 1.25) (layers 4_bot B.Paste B.Mask)
+ (net 13 /hackrf_if/LCD_DB15))
+ (pad 16 smd rect (at -4.75 2.875 270) (size 0.3 1.25) (layers 4_bot B.Paste B.Mask)
+ (net 47 GND))
+ (pad 15 smd rect (at -5.25 2.875 270) (size 0.3 1.25) (layers 4_bot B.Paste B.Mask)
+ (net 47 GND))
+ (pad 14 smd rect (at -5.75 2.875 270) (size 0.3 1.25) (layers 4_bot B.Paste B.Mask)
+ (net 47 GND))
+ (pad 13 smd rect (at -6.25 2.875 270) (size 0.3 1.25) (layers 4_bot B.Paste B.Mask)
+ (net 47 GND))
+ (pad 12 smd rect (at -6.75 2.875 270) (size 0.3 1.25) (layers 4_bot B.Paste B.Mask)
+ (net 47 GND))
+ (pad 11 smd rect (at -7.25 2.875 270) (size 0.3 1.25) (layers 4_bot B.Paste B.Mask)
+ (net 47 GND))
+ (pad 10 smd rect (at -7.75 2.875 270) (size 0.3 1.25) (layers 4_bot B.Paste B.Mask)
+ (net 23 /hackrf_if/LCD_RESET#))
+ (pad 9 smd rect (at -8.25 2.875 270) (size 0.3 1.25) (layers 4_bot B.Paste B.Mask)
+ (net 47 GND))
+ (pad 8 smd rect (at -8.75 2.875 270) (size 0.3 1.25) (layers 4_bot B.Paste B.Mask)
+ (net 47 GND))
+ (pad 7 smd rect (at -9.25 2.875 270) (size 0.3 1.25) (layers 4_bot B.Paste B.Mask)
+ (net 47 GND))
+ (pad 6 smd rect (at -9.75 2.875 270) (size 0.3 1.25) (layers 4_bot B.Paste B.Mask)
+ (net 122 +1V8))
+ (pad 5 smd rect (at -10.25 2.875 270) (size 0.3 1.25) (layers 4_bot B.Paste B.Mask)
+ (net 69 /lcd_sw_sd/LEDK4))
+ (pad 4 smd rect (at -10.75 2.875 270) (size 0.3 1.25) (layers 4_bot B.Paste B.Mask)
+ (net 68 /lcd_sw_sd/LEDK3))
+ (pad 3 smd rect (at -11.25 2.875 270) (size 0.3 1.25) (layers 4_bot B.Paste B.Mask)
+ (net 66 /lcd_sw_sd/LEDK2))
+ (pad 2 smd rect (at -11.75 2.875 270) (size 0.3 1.25) (layers 4_bot B.Paste B.Mask)
+ (net 67 /lcd_sw_sd/LEDK1))
+ (pad 1 smd rect (at -12.25 2.875 270) (size 0.3 1.25) (layers 4_bot B.Paste B.Mask)
+ (net 121 +3V3))
+ (model ${KISBLIB}/eastrising.pretty/ER-CON50HT-1.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 0.3937 0.3937 0.3937))
+ (rotate (xyz 0 0 180))
+ )
+ )
+
+ (module alps:ALPS_SCHA4B0419 (layer 4_bot) (tedit 5BD22B53) (tstamp 58FBAA83)
+ (at 68.4 114.6 180)
+ (path /53A9129D/53A8C6D0)
+ (attr smd)
+ (fp_text reference J2 (at -8.4 -6.5 270) (layer B.SilkS)
+ (effects (font (size 0.6096 0.6096) (thickness 0.12)) (justify mirror))
+ )
+ (fp_text value MICROSD_DETSW (at 0 0 180) (layer B.Fab)
+ (effects (font (size 0.6096 0.6096) (thickness 0.12)) (justify mirror))
+ )
+ (fp_line (start 0.27 -6.9725) (end -7.66 -6.9725) (layer B.SilkS) (width 0.12))
+ (fp_line (start -7.6 -6.9125) (end -7.6 6.9125) (layer B.Fab) (width 0.025))
+ (fp_line (start -7.6 6.9125) (end 7.65 6.9125) (layer B.Fab) (width 0.025))
+ (fp_line (start 7.65 6.9125) (end 7.65 -6.9125) (layer B.Fab) (width 0.025))
+ (fp_line (start 7.65 -6.9125) (end -7.6 -6.9125) (layer B.Fab) (width 0.025))
+ (fp_line (start -7.66 -6.9725) (end -7.66 -5.5) (layer B.SilkS) (width 0.12))
+ (fp_line (start -7.66 6.9725) (end 6.62 6.9725) (layer B.SilkS) (width 0.12))
+ (fp_line (start 7.71 5.92) (end 7.71 -5.9) (layer B.SilkS) (width 0.12))
+ (fp_line (start 6.42 -6.9725) (end 5.26 -6.9725) (layer B.SilkS) (width 0.12))
+ (fp_line (start 0.95 -6.0125) (end -3.45 -6.0125) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 0.95 2.8875) (end 0.95 -6.0125) (layer B.CrtYd) (width 0.05))
+ (fp_line (start -3.45 2.8875) (end 0.95 2.8875) (layer B.CrtYd) (width 0.05))
+ (fp_line (start -3.45 -6.0125) (end -3.45 2.8875) (layer B.CrtYd) (width 0.05))
+ (fp_line (start -7.45 1.0375) (end -7.45 -1.4675) (layer B.CrtYd) (width 0.05))
+ (fp_line (start -5.2 1.0375) (end -7.45 1.0375) (layer B.CrtYd) (width 0.05))
+ (fp_line (start -5.2 -2.5125) (end -5.2 1.0375) (layer B.CrtYd) (width 0.05))
+ (fp_line (start -6.6 -2.5125) (end -5.2 -2.5125) (layer B.CrtYd) (width 0.05))
+ (fp_line (start -6.6 -1.4675) (end -6.6 -2.5125) (layer B.CrtYd) (width 0.05))
+ (fp_line (start -7.45 -1.4675) (end -6.6 -1.4675) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 9.05 -5.5) (end 9.06 3.5) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 9.95 -5.5) (end 9.95 3.5) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 13.25 -5.5) (end 13.25 3.5) (layer B.CrtYd) (width 0.05))
+ (fp_line (start -7.66 6.9725) (end -7.66 6.85) (layer B.SilkS) (width 0.12))
+ (fp_line (start -7.66 -2.97) (end -7.66 2.37) (layer B.SilkS) (width 0.12))
+ (fp_line (start -7.66 3.38) (end -7.66 5.17) (layer B.SilkS) (width 0.12))
+ (fp_line (start 7.95 5.85) (end 7.95 7.3) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 7.9 5.85) (end 7.95 5.85) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 7.9 -5.8) (end 7.9 5.85) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 8 -5.8) (end 7.9 -5.8) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 8 -7.1) (end 8 -5.8) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 7.9 -7.1) (end 8 -7.1) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 7.9 -7.1625) (end 7.9 -7.1) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 5.35 -7.1625) (end 7.9 -7.1625) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 5.35 -7.6) (end 5.35 -7.1625) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 0.2 -7.6) (end 5.35 -7.6) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 0.2 -7.1625) (end 0.2 -7.6) (layer B.CrtYd) (width 0.05))
+ (fp_line (start -7.85 -7.1625) (end 0.2 -7.1625) (layer B.CrtYd) (width 0.05))
+ (fp_line (start -7.85 -5.6) (end -7.85 -7.1625) (layer B.CrtYd) (width 0.05))
+ (fp_line (start -8.1 -5.6) (end -7.85 -5.6) (layer B.CrtYd) (width 0.05))
+ (fp_line (start -8.1 -2.9) (end -8.1 -5.6) (layer B.CrtYd) (width 0.05))
+ (fp_line (start -7.85 -2.9) (end -8.1 -2.9) (layer B.CrtYd) (width 0.05))
+ (fp_line (start -7.85 2.3) (end -7.85 -2.9) (layer B.CrtYd) (width 0.05))
+ (fp_line (start -8.1 2.3) (end -7.85 2.3) (layer B.CrtYd) (width 0.05))
+ (fp_line (start -8.1 3.45) (end -8.1 2.3) (layer B.CrtYd) (width 0.05))
+ (fp_line (start -7.85 3.45) (end -8.1 3.45) (layer B.CrtYd) (width 0.05))
+ (fp_line (start -7.85 5.1) (end -7.85 3.45) (layer B.CrtYd) (width 0.05))
+ (fp_line (start -8.1 5.1) (end -7.85 5.1) (layer B.CrtYd) (width 0.05))
+ (fp_line (start -8.1 6.95) (end -8.1 5.1) (layer B.CrtYd) (width 0.05))
+ (fp_line (start -7.85 6.95) (end -8.1 6.95) (layer B.CrtYd) (width 0.05))
+ (fp_line (start -7.85 7.1625) (end -7.85 6.95) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 6.55 7.1625) (end -7.85 7.1625) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 6.55 7.3) (end 6.55 7.1625) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 7.95 7.3) (end 6.55 7.3) (layer B.CrtYd) (width 0.05))
+ (fp_text user OVERSTROKE (at 8.9 -0.9 90) (layer B.CrtYd)
+ (effects (font (size 0.2 0.2) (thickness 0.05)) (justify mirror))
+ )
+ (fp_text user INSERTED (at 9.8 -0.9 90) (layer B.CrtYd)
+ (effects (font (size 0.2 0.2) (thickness 0.05)) (justify mirror))
+ )
+ (fp_text user EJECTED (at 13.1 -0.9 90) (layer B.CrtYd)
+ (effects (font (size 0.2 0.2) (thickness 0.05)) (justify mirror))
+ )
+ (fp_text user %R (at 0 0 180) (layer B.Fab)
+ (effects (font (size 1 1) (thickness 0.025)) (justify mirror))
+ )
+ (pad SH smd rect (at 2.765 -7.1225 90) (size 0.42 4.63) (layers 4_bot B.Paste B.Mask)
+ (net 47 GND))
+ (pad 8 smd rect (at 4.475 -4.775 90) (size 0.7 0.75) (layers 4_bot B.Paste B.Mask)
+ (net 32 /hackrf_if/SD_DAT1))
+ (pad 7 smd rect (at 4.475 -3.775 90) (size 0.7 0.75) (layers 4_bot B.Paste B.Mask)
+ (net 31 /hackrf_if/SD_DAT0))
+ (pad 6 smd rect (at 4.475 -2.775 90) (size 0.7 0.75) (layers 4_bot B.Paste B.Mask)
+ (net 47 GND))
+ (pad 5 smd rect (at 4.475 -1.775 90) (size 0.7 0.75) (layers 4_bot B.Paste B.Mask)
+ (net 29 /hackrf_if/SD_CLK))
+ (pad 4 smd rect (at 4.475 -0.775 90) (size 0.7 0.75) (layers 4_bot B.Paste B.Mask)
+ (net 121 +3V3))
+ (pad 3 smd rect (at 4.475 0.225 90) (size 0.7 0.75) (layers 4_bot B.Paste B.Mask)
+ (net 30 /hackrf_if/SD_CMD))
+ (pad 2 smd rect (at 4.475 1.225 90) (size 0.7 0.75) (layers 4_bot B.Paste B.Mask)
+ (net 34 /hackrf_if/SD_DAT3))
+ (pad 1 smd rect (at 4.475 2.225 90) (size 0.7 0.75) (layers 4_bot B.Paste B.Mask)
+ (net 33 /hackrf_if/SD_DAT2))
+ (pad 0 smd rect (at 5.675 0.725 90) (size 0.7 0.65) (layers 4_bot B.Paste B.Mask)
+ (net 47 GND))
+ (pad 0 smd rect (at 5.675 -3.275 90) (size 0.7 0.65) (layers 4_bot B.Paste B.Mask)
+ (net 47 GND))
+ (pad SH smd rect (at 7.25 6.575 90) (size 0.95 0.9) (layers 4_bot B.Paste B.Mask)
+ (net 47 GND))
+ (pad SH smd rect (at 7.175 -6.46 90) (size 0.745 1.15) (layers 4_bot B.Paste B.Mask)
+ (net 47 GND))
+ (pad SH smd rect (at -7.425 6.0125 90) (size 1.3 0.85) (layers 4_bot B.Paste B.Mask)
+ (net 47 GND))
+ (pad B smd rect (at -7.475 2.875 90) (size 0.65 0.75) (layers 4_bot B.Paste B.Mask)
+ (net 28 /hackrf_if/SD_CD))
+ (pad A smd rect (at -7.475 -3.475 90) (size 0.65 0.75) (layers 4_bot B.Paste B.Mask)
+ (net 47 GND))
+ (pad SH smd rect (at -7.425 -4.7125 90) (size 1.2 0.85) (layers 4_bot B.Paste B.Mask)
+ (net 47 GND))
+ (model ${KISBLIB}/alps.pretty/SCHA4B0419.STEP
+ (offset (xyz -7.505 0 1.32))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 -90))
+ )
+ )
+
+ (module header:HEADER_11X2_REV_SM_254_AP locked (layer 4_bot) (tedit 5BD22CA3) (tstamp 53AA299C)
+ (at 123.5 143.25 90)
+ (descr "MLE TSHSM-1")
+ (path /53A8C780/53A8CDBE)
+ (attr smd)
+ (fp_text reference P28 (at -14.85 3.6 180) (layer B.SilkS)
+ (effects (font (size 0.6096 0.6096) (thickness 0.12)) (justify mirror))
+ )
+ (fp_text value HACKRF_ONE_P28 (at 0 0 90) (layer B.Fab)
+ (effects (font (size 0.6096 0.6096) (thickness 0.12)) (justify mirror))
+ )
+ (fp_line (start 13.39 2.5) (end 13.97 2.5) (layer B.SilkS) (width 0.12))
+ (fp_line (start 13.39 -2.5) (end 13.97 -2.5) (layer B.SilkS) (width 0.12))
+ (fp_line (start 10.85 2.5) (end 12.01 2.5) (layer B.SilkS) (width 0.12))
+ (fp_line (start 10.85 -2.5) (end 12.01 -2.5) (layer B.SilkS) (width 0.12))
+ (fp_line (start 8.31 2.5) (end 9.47 2.5) (layer B.SilkS) (width 0.12))
+ (fp_line (start 8.31 -2.5) (end 9.47 -2.5) (layer B.SilkS) (width 0.12))
+ (fp_line (start 5.77 2.5) (end 6.93 2.5) (layer B.SilkS) (width 0.12))
+ (fp_line (start 5.77 -2.5) (end 6.93 -2.5) (layer B.SilkS) (width 0.12))
+ (fp_line (start 3.23 2.5) (end 4.39 2.5) (layer B.SilkS) (width 0.12))
+ (fp_line (start 3.23 -2.5) (end 4.39 -2.5) (layer B.SilkS) (width 0.12))
+ (fp_line (start 0.69 2.5) (end 1.85 2.5) (layer B.SilkS) (width 0.12))
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+ (fp_line (start -1.85 2.5) (end -0.69 2.5) (layer B.SilkS) (width 0.12))
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+ (fp_line (start -13.97 -2.5) (end -13.97 2.5) (layer B.SilkS) (width 0.12))
+ (fp_circle (center -14 3.025) (end -14 2.9) (layer B.SilkS) (width 0.25))
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+ (fp_line (start -12.01 -2.5) (end -10.85 -2.5) (layer B.SilkS) (width 0.12))
+ (fp_line (start -13.97 -2.5) (end -13.39 -2.5) (layer B.SilkS) (width 0.12))
+ (fp_text user %R (at 0 0 90) (layer B.Fab)
+ (effects (font (size 1 1) (thickness 0.025)) (justify mirror))
+ )
+ (pad "" np_thru_hole circle (at 11.43 0) (size 1.95 1.95) (drill 1.95) (layers *.Cu *.Mask)
+ (clearance 0.4))
+ (pad "" np_thru_hole circle (at -11.43 0) (size 1.95 1.95) (drill 1.95) (layers *.Cu *.Mask)
+ (clearance 0.4))
+ (pad 21 smd rect (at 12.7 2.73) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask))
+ (pad 22 smd rect (at 12.7 -2.73) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask))
+ (pad 19 smd rect (at 10.16 2.73) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask)
+ (net 85 /hackrf_if/I2S0_RX_SDA))
+ (pad 20 smd rect (at 10.16 -2.73) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask))
+ (pad 17 smd rect (at 7.62 2.73) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask)
+ (net 65 /hackrf_if/H1_CPLD_TCK))
+ (pad 18 smd rect (at 7.62 -2.73) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask))
+ (pad 15 smd rect (at 5.08 2.73) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask))
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+ (pad 14 smd rect (at 2.54 -2.73) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask))
+ (pad 11 smd rect (at 0 2.73) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask)
+ (net 29 /hackrf_if/SD_CLK))
+ (pad 12 smd rect (at 0 -2.73) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask)
+ (net 47 GND))
+ (pad 9 smd rect (at -2.54 2.73) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask)
+ (net 30 /hackrf_if/SD_CMD))
+ (pad 10 smd rect (at -2.54 -2.73) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask)
+ (net 64 /hackrf_if/PP_CPLD_TDO))
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+ (net 31 /hackrf_if/SD_DAT0))
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+ (net 63 /hackrf_if/PP_CPLD_TMS))
+ (pad 5 smd rect (at -7.62 2.73) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask)
+ (net 33 /hackrf_if/SD_DAT2))
+ (pad 6 smd rect (at -7.62 -2.73) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask)
+ (net 32 /hackrf_if/SD_DAT1))
+ (pad 3 smd rect (at -10.16 2.73) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask)
+ (net 28 /hackrf_if/SD_CD))
+ (pad 4 smd rect (at -10.16 -2.73) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask)
+ (net 34 /hackrf_if/SD_DAT3))
+ (pad 1 smd rect (at -12.7 2.73) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask)
+ (net 121 +3V3))
+ (pad 2 smd rect (at -12.7 -2.73) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask)
+ (net 47 GND))
+ (model ${KISBLIB}/header.pretty/TSM-111-01-L-DV-A-P-TR.stp
+ (offset (xyz 0 0 2.54))
+ (scale (xyz 1 1 1))
+ (rotate (xyz -90 0 0))
+ )
+ )
+
+ (module header:HEADER_11X2_REV_SM_254_AP locked (layer 4_bot) (tedit 5BD22C3E) (tstamp 53AA295A)
+ (at 171.76 143.25 90)
+ (descr "MLE TSHSM-1")
+ (path /53A8C780/53A8CDAE)
+ (attr smd)
+ (fp_text reference P20 (at -14.05 4.34 180) (layer B.SilkS)
+ (effects (font (size 0.6096 0.6096) (thickness 0.12)) (justify mirror))
+ )
+ (fp_text value HACKRF_ONE_P20 (at 0 0 90) (layer B.Fab)
+ (effects (font (size 0.6096 0.6096) (thickness 0.12)) (justify mirror))
+ )
+ (fp_line (start 13.39 2.5) (end 13.97 2.5) (layer B.SilkS) (width 0.12))
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+ (fp_circle (center -14 3.025) (end -14 2.9) (layer B.SilkS) (width 0.25))
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+ (fp_line (start -12.01 -2.5) (end -10.85 -2.5) (layer B.SilkS) (width 0.12))
+ (fp_line (start -13.97 -2.5) (end -13.39 -2.5) (layer B.SilkS) (width 0.12))
+ (fp_text user %R (at 0 0 90) (layer B.Fab)
+ (effects (font (size 1 1) (thickness 0.025)) (justify mirror))
+ )
+ (pad "" np_thru_hole circle (at 11.43 0) (size 1.95 1.95) (drill 1.95) (layers *.Cu *.Mask)
+ (clearance 0.4))
+ (pad "" np_thru_hole circle (at -11.43 0) (size 1.95 1.95) (drill 1.95) (layers *.Cu *.Mask)
+ (clearance 0.4))
+ (pad 21 smd rect (at 12.7 2.73) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask)
+ (net 99 /hackrf_if/VBUS))
+ (pad 22 smd rect (at 12.7 -2.73) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask)
+ (net 72 /power/AUDIO_SVDD))
+ (pad 19 smd rect (at 10.16 2.73) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask)
+ (net 47 GND))
+ (pad 20 smd rect (at 10.16 -2.73) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask)
+ (net 45 /hackrf_if/TP_U))
+ (pad 17 smd rect (at 7.62 2.73) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask)
+ (net 100 /hackrf_if/VBUSCTRL))
+ (pad 18 smd rect (at 7.62 -2.73) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask)
+ (net 43 /hackrf_if/TP_L))
+ (pad 15 smd rect (at 5.08 2.73) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask)
+ (net 47 GND))
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+ (net 42 /hackrf_if/TP_D))
+ (pad 13 smd rect (at 2.54 2.73) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask)
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+ (pad 14 smd rect (at 2.54 -2.73) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask)
+ (net 44 /hackrf_if/TP_R))
+ (pad 11 smd rect (at 0 2.73) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask)
+ (net 56 /hackrf_if/MCU_D6))
+ (pad 12 smd rect (at 0 -2.73) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask)
+ (net 55 /hackrf_if/MCU_D7))
+ (pad 9 smd rect (at -2.54 2.73) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask)
+ (net 54 /hackrf_if/MCU_D4))
+ (pad 10 smd rect (at -2.54 -2.73) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask)
+ (net 53 /hackrf_if/MCU_D5))
+ (pad 7 smd rect (at -5.08 2.73) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask)
+ (net 52 /hackrf_if/MCU_D2))
+ (pad 8 smd rect (at -5.08 -2.73) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask)
+ (net 51 /hackrf_if/MCU_D3))
+ (pad 5 smd rect (at -7.62 2.73) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask)
+ (net 50 /hackrf_if/MCU_D0))
+ (pad 6 smd rect (at -7.62 -2.73) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask)
+ (net 49 /hackrf_if/MCU_D1))
+ (pad 3 smd rect (at -10.16 2.73) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask)
+ (net 121 +3V3))
+ (pad 4 smd rect (at -10.16 -2.73) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask))
+ (pad 1 smd rect (at -12.7 2.73) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask)
+ (net 46 /hackrf_if/VBAT))
+ (pad 2 smd rect (at -12.7 -2.73) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask))
+ (model ${KISBLIB}/header.pretty/TSM-111-01-L-DV-A-P-TR.stp
+ (offset (xyz 0 0 2.54))
+ (scale (xyz 1 1 1))
+ (rotate (xyz -90 0 0))
+ )
+ )
+
+ (module header:HEADER_13X2_REV_SM_254_AP locked (layer 4_bot) (tedit 5BD22C70) (tstamp 53AA297D)
+ (at 152.71 164.84 180)
+ (descr "MLE TSHSM-1")
+ (path /53A8C780/53A8CDB6)
+ (attr smd)
+ (fp_text reference P22 (at -16.59 4.29 270) (layer B.SilkS)
+ (effects (font (size 0.6096 0.6096) (thickness 0.12)) (justify mirror))
+ )
+ (fp_text value HACKRF_ONE_P22 (at 0 0 180) (layer B.Fab)
+ (effects (font (size 0.6096 0.6096) (thickness 0.12)) (justify mirror))
+ )
+ (fp_line (start 13.39 2.5) (end 14.55 2.5) (layer B.SilkS) (width 0.12))
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+ (fp_text user %R (at 0 0 180) (layer B.Fab)
+ (effects (font (size 1 1) (thickness 0.025)) (justify mirror))
+ )
+ (pad "" np_thru_hole circle (at 13.97 0 90) (size 1.95 1.95) (drill 1.95) (layers *.Cu *.Mask)
+ (clearance 0.4))
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+ (clearance 0.4))
+ (pad 25 smd rect (at 15.24 2.73 90) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask))
+ (pad 26 smd rect (at 15.24 -2.73 90) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask)
+ (net 3 /audio/SCL))
+ (pad 23 smd rect (at 12.7 2.73 90) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask)
+ (net 27 /hackrf_if/P2_8))
+ (pad 24 smd rect (at 12.7 -2.73 90) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask)
+ (net 4 /audio/SDA))
+ (pad 21 smd rect (at 10.16 2.73 90) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask)
+ (net 62 /hackrf_if/MCU_LCD_WR))
+ (pad 22 smd rect (at 10.16 -2.73 90) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask)
+ (net 61 /hackrf_if/MCU_DIR))
+ (pad 19 smd rect (at 7.62 2.73 90) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask)
+ (net 60 /hackrf_if/MCU_ADDR))
+ (pad 20 smd rect (at 7.62 -2.73 90) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask)
+ (net 59 /hackrf_if/MCU_IO_STBX))
+ (pad 17 smd rect (at 5.08 2.73 90) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask)
+ (net 84 /hackrf_if/I2S0_MCLK))
+ (pad 18 smd rect (at 5.08 -2.73 90) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask)
+ (net 47 GND))
+ (pad 15 smd rect (at 2.54 2.73 90) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask)
+ (net 83 /hackrf_if/I2S0_WS))
+ (pad 16 smd rect (at 2.54 -2.73 90) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask)
+ (net 82 /audio/BICK))
+ (pad 13 smd rect (at 0 2.73 90) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask)
+ (net 81 /hackrf_if/I2S0_TX_SDA))
+ (pad 14 smd rect (at 0 -2.73 90) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask))
+ (pad 11 smd rect (at -2.54 2.73 90) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask)
+ (net 121 +3V3))
+ (pad 12 smd rect (at -2.54 -2.73 90) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask))
+ (pad 9 smd rect (at -5.08 2.73 90) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask))
+ (pad 10 smd rect (at -5.08 -2.73 90) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask)
+ (net 47 GND))
+ (pad 7 smd rect (at -7.62 2.73 90) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask))
+ (pad 8 smd rect (at -7.62 -2.73 90) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask))
+ (pad 5 smd rect (at -10.16 2.73 90) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask)
+ (net 58 /hackrf_if/MCU_LCD_RD))
+ (pad 6 smd rect (at -10.16 -2.73 90) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask)
+ (net 57 /hackrf_if/MCU_LCD_TE))
+ (pad 3 smd rect (at -12.7 2.73 90) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask)
+ (net 113 /hackrf_if/RESET#))
+ (pad 4 smd rect (at -12.7 -2.73 90) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask)
+ (net 47 GND))
+ (pad 1 smd rect (at -15.24 2.73 90) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask))
+ (pad 2 smd rect (at -15.24 -2.73 90) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask)
+ (net 70 /hackrf_if/CLKIN))
+ (model ${KISBLIB}/header.pretty/TSM-113-01-L-DV-A-P-TR.stp
+ (offset (xyz 0 0 2.54))
+ (scale (xyz 1 1 1))
+ (rotate (xyz -90 0 0))
+ )
+ )
+
+ (module bat_coin:MPD_BU2032SM-BT-G (layer 4_bot) (tedit 5BD22CB3) (tstamp 53AA25F0)
+ (at 96 162)
+ (path /58CFF3E3/58D008D0)
+ (attr smd)
+ (fp_text reference BT1 (at 13.6 -4.05) (layer B.SilkS)
+ (effects (font (size 0.6096 0.6096) (thickness 0.12)) (justify mirror))
+ )
+ (fp_text value BATTERY (at 0 0) (layer B.Fab)
+ (effects (font (size 0.6096 0.6096) (thickness 0.12)) (justify mirror))
+ )
+ (fp_line (start 14.3 3.5) (end 10.639 3.5) (layer B.Fab) (width 0.025))
+ (fp_line (start 14.3 -3.5) (end 14.3 3.5) (layer B.Fab) (width 0.025))
+ (fp_line (start 10.639 -3.5) (end 14.3 -3.5) (layer B.Fab) (width 0.025))
+ (fp_line (start -14.3 3.5) (end -10.639 3.5) (layer B.Fab) (width 0.025))
+ (fp_line (start -14.3 -3.5) (end -14.3 3.5) (layer B.Fab) (width 0.025))
+ (fp_line (start -10.639 -3.5) (end -14.3 -3.5) (layer B.Fab) (width 0.025))
+ (fp_line (start 7.838 -8) (end -7.838 -8) (layer B.Fab) (width 0.025))
+ (fp_line (start 7.838 8) (end -7.838 8) (layer B.Fab) (width 0.025))
+ (fp_arc (start 0 0) (end -7.838 -8) (angle -91.1) (layer B.Fab) (width 0.025))
+ (fp_arc (start 0 0) (end 7.838 8) (angle -91.1) (layer B.Fab) (width 0.025))
+ (fp_line (start 11.5 4.5) (end 11.5 5.5) (layer B.Fab) (width 0.025))
+ (fp_line (start 12 5) (end 11 5) (layer B.Fab) (width 0.025))
+ (fp_line (start -14.8 2.6) (end -14.8 4) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 14.8 4) (end 10.995 4) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 14.8 -4) (end 14.8 -2.6) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 10.995 -4) (end 14.8 -4) (layer B.CrtYd) (width 0.05))
+ (fp_line (start -14.8 4) (end -10.995 4) (layer B.CrtYd) (width 0.05))
+ (fp_line (start -14.8 -4) (end -14.8 -2.6) (layer B.CrtYd) (width 0.05))
+ (fp_line (start -10.995 -4) (end -14.8 -4) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 6.164 -8.5) (end 8.04 -8.5) (layer B.CrtYd) (width 0.05))
+ (fp_line (start -8.04 -8.5) (end -6.164 -8.5) (layer B.CrtYd) (width 0.05))
+ (fp_line (start -6.164 8.5) (end -8.04 8.5) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 8.04 8.5) (end 6.164 8.5) (layer B.CrtYd) (width 0.05))
+ (fp_arc (start 0 0) (end -10.995 4) (angle -26.5) (layer B.CrtYd) (width 0.05))
+ (fp_arc (start 0 0) (end 10.995 -4) (angle -26.5) (layer B.CrtYd) (width 0.05))
+ (fp_arc (start 0 0) (end -8.04 -8.5) (angle -26.6) (layer B.CrtYd) (width 0.05))
+ (fp_arc (start 0 0) (end 8.04 8.5) (angle -26.6) (layer B.CrtYd) (width 0.05))
+ (fp_arc (start 0 0) (end -6.164 8.5) (angle -71.8) (layer B.CrtYd) (width 0.05))
+ (fp_arc (start 0 0) (end 6.164 -8.5) (angle -71.8) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 14.3 3.5) (end 10.639 3.5) (layer B.SilkS) (width 0.12))
+ (fp_line (start 10.639 -3.5) (end 14.3 -3.5) (layer B.SilkS) (width 0.12))
+ (fp_line (start -14.3 3.5) (end -10.639 3.5) (layer B.SilkS) (width 0.12))
+ (fp_line (start -10.639 -3.5) (end -14.3 -3.5) (layer B.SilkS) (width 0.12))
+ (fp_line (start 7.838 -8) (end -7.838 -8) (layer B.SilkS) (width 0.12))
+ (fp_line (start 7.838 8) (end -7.838 8) (layer B.SilkS) (width 0.12))
+ (fp_arc (start 0 0) (end -7.838 -8) (angle -91.1) (layer B.SilkS) (width 0.12))
+ (fp_arc (start 0 0) (end 7.838 8) (angle -91.1) (layer B.SilkS) (width 0.12))
+ (fp_line (start 11.5 4.5) (end 11.5 5.5) (layer B.SilkS) (width 0.12))
+ (fp_line (start 12 5) (end 11 5) (layer B.SilkS) (width 0.12))
+ (fp_line (start 16.65 -2.6) (end 14.8 -2.6) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 16.65 2.6) (end 16.65 -2.6) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 14.8 2.6) (end 16.65 2.6) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 14.8 2.6) (end 14.8 4) (layer B.CrtYd) (width 0.05))
+ (fp_line (start -14.8 -2.6) (end -16.75 -2.6) (layer B.CrtYd) (width 0.05))
+ (fp_line (start -16.75 -2.6) (end -16.75 2.6) (layer B.CrtYd) (width 0.05))
+ (fp_line (start -16.75 2.6) (end -14.8 2.6) (layer B.CrtYd) (width 0.05))
+ (fp_line (start -14.3 -3.5) (end -14.3 -2.28) (layer B.SilkS) (width 0.12))
+ (fp_line (start -14.3 3.5) (end -14.3 2.28) (layer B.SilkS) (width 0.12))
+ (fp_line (start 14.3 -3.5) (end 14.3 -2.28) (layer B.SilkS) (width 0.12))
+ (fp_line (start 14.3 3.5) (end 14.3 2.28) (layer B.SilkS) (width 0.12))
+ (fp_text user %R (at 0 0) (layer B.Fab)
+ (effects (font (size 1 1) (thickness 0.025)) (justify mirror))
+ )
+ (pad 2 smd rect (at -14.65 0 180) (size 3.2 4.2) (layers 4_bot B.Paste B.Mask)
+ (net 47 GND))
+ (pad 1 smd rect (at 14.65 0 180) (size 3.2 4.2) (layers 4_bot B.Paste B.Mask)
+ (net 46 /hackrf_if/VBAT))
+ (model ${KISBLIB}/bat_coin.pretty/BU2032SM-BT-GTR.STEP
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 90 180 0))
+ )
+ )
+
+ (module ipc_osccc:IPC_OSCCC320X250X110L75X100N (layer 4_bot) (tedit 5BD22C65) (tstamp 5B7B01BE)
(at 175 163.65 270)
(path /58CFF3E3/5B682C80)
(attr smd)
@@ -405,7 +1056,7 @@
(effects (font (size 0.6096 0.6096) (thickness 0.12)) (justify mirror))
)
(fp_text user %R (at 0 0 270) (layer B.Fab)
- (effects (font (size 0.6096 0.6096) (thickness 0.025)) (justify mirror))
+ (effects (font (size 1 1) (thickness 0.025)) (justify mirror))
)
(fp_line (start -1.6 1.25) (end 1.6 1.25) (layer B.Fab) (width 0.025))
(fp_line (start 1.6 1.25) (end 1.6 -1.25) (layer B.Fab) (width 0.025))
@@ -435,7 +1086,7 @@
)
)
- (module ublox:MAX-M8 (layer 4_bot) (tedit 5B7AE9EA) (tstamp 5B7AF914)
+ (module ublox:MAX-M8 (layer 4_bot) (tedit 5BD22CCB) (tstamp 5B7AF914)
(at 73.8 162.55 270)
(path /5B7E0B2A/5B7E0C1A)
(attr smd)
@@ -445,6 +1096,9 @@
(fp_text value MAX-M8 (at 0 0 270) (layer B.Fab)
(effects (font (size 0.6096 0.6096) (thickness 0.12)) (justify mirror))
)
+ (fp_text user %R (at 0 0 270) (layer B.Fab)
+ (effects (font (size 1 1) (thickness 0.025)) (justify mirror))
+ )
(fp_line (start -4.85 5.05) (end 4.85 5.05) (layer B.Fab) (width 0.025))
(fp_line (start -4.85 -5.05) (end -4.85 5.05) (layer B.Fab) (width 0.025))
(fp_line (start 4.85 -5.05) (end -4.85 -5.05) (layer B.Fab) (width 0.025))
@@ -502,7 +1156,7 @@
)
)
- (module ipc_son:IPC_SON9P50_200X200X100L30X25T80X120N (layer 4_bot) (tedit 5B79FEB8) (tstamp 58E5E2FF)
+ (module ipc_son:IPC_SON9P50_200X200X100L30X25T80X120N (layer 4_bot) (tedit 5BD22FF5) (tstamp 58E5E2FF)
(at 165 109.6)
(path /53A8BFC3/58D9A047)
(attr smd)
@@ -512,6 +1166,9 @@
(fp_text value NUF4220MN (at 0 0) (layer B.Fab)
(effects (font (size 0.6096 0.6096) (thickness 0.12)) (justify mirror))
)
+ (fp_text user %R (at 0 0 90) (layer B.Fab)
+ (effects (font (size 0.6 0.6) (thickness 0.025)) (justify mirror))
+ )
(fp_line (start -1.615 1.25) (end 1.615 1.25) (layer B.CrtYd) (width 0.05))
(fp_line (start 1.615 1.25) (end 1.615 -1.25) (layer B.CrtYd) (width 0.05))
(fp_line (start 1.615 -1.25) (end -1.615 -1.25) (layer B.CrtYd) (width 0.05))
@@ -523,32 +1180,32 @@
(fp_line (start 1 1) (end 1 -1) (layer B.Fab) (width 0.025))
(fp_line (start 1 -1) (end -1 -1) (layer B.Fab) (width 0.025))
(fp_line (start -1 -1) (end -1 1) (layer B.Fab) (width 0.025))
- (pad 1 smd oval (at -0.995 0.75 90) (size 0.27 0.74) (layers 4_bot B.Paste B.Mask)
+ (pad 1 smd rect (at -0.995 0.75 90) (size 0.27 0.74) (layers 4_bot B.Paste B.Mask)
(net 1 /audio/LHPOUT))
- (pad 2 smd oval (at -0.995 0.25 90) (size 0.27 0.74) (layers 4_bot B.Paste B.Mask)
+ (pad 2 smd rect (at -0.995 0.25 90) (size 0.27 0.74) (layers 4_bot B.Paste B.Mask)
(net 47 GND))
- (pad 3 smd oval (at -0.995 -0.25 90) (size 0.27 0.74) (layers 4_bot B.Paste B.Mask)
+ (pad 3 smd rect (at -0.995 -0.25 90) (size 0.27 0.74) (layers 4_bot B.Paste B.Mask)
(net 90 /audio/MIC))
- (pad 4 smd oval (at -0.995 -0.75 90) (size 0.27 0.74) (layers 4_bot B.Paste B.Mask)
+ (pad 4 smd rect (at -0.995 -0.75 90) (size 0.27 0.74) (layers 4_bot B.Paste B.Mask)
(net 2 /audio/RHPOUT))
- (pad 5 smd oval (at 0.995 -0.75 270) (size 0.27 0.74) (layers 4_bot B.Paste B.Mask)
+ (pad 5 smd rect (at 0.995 -0.75 270) (size 0.27 0.74) (layers 4_bot B.Paste B.Mask)
(net 89 /audio/RHPOUT_X))
- (pad 6 smd oval (at 0.995 -0.25 270) (size 0.27 0.74) (layers 4_bot B.Paste B.Mask)
+ (pad 6 smd rect (at 0.995 -0.25 270) (size 0.27 0.74) (layers 4_bot B.Paste B.Mask)
(net 86 /audio/MIC_X))
- (pad 7 smd oval (at 0.995 0.25 270) (size 0.27 0.74) (layers 4_bot B.Paste B.Mask)
+ (pad 7 smd rect (at 0.995 0.25 270) (size 0.27 0.74) (layers 4_bot B.Paste B.Mask)
(net 87 /audio/GND_X))
- (pad 8 smd oval (at 0.995 0.75 270) (size 0.27 0.74) (layers 4_bot B.Paste B.Mask)
+ (pad 8 smd rect (at 0.995 0.75 270) (size 0.27 0.74) (layers 4_bot B.Paste B.Mask)
(net 88 /audio/LHPOUT_X))
(pad 9 smd rect (at 0 0) (size 0.8 1.2) (layers 4_bot B.Paste B.Mask)
(net 47 GND) (solder_paste_margin -0.1))
- (model Housings_DFN_QFN.3dshapes/DFN-8-1EP_2x2mm_Pitch0.5mm.wrl
+ (model ${KISYS3DMOD}/Package_DFN_QFN.3dshapes/DFN-8-1EP_2x2mm_P0.5mm_EP1.05x1.75mm.step
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
- (module ipc_qfn:IPC_QFN33P40_400X400X80L35X20T280N (layer 4_bot) (tedit 5B79B878) (tstamp 58D2EC5D)
+ (module ipc_qfn:IPC_QFN33P40_400X400X80L35X20T280N (layer 4_bot) (tedit 5BD6998F) (tstamp 58D2EC5D)
(at 153.25 110.95 180)
(path /53A8BFC3/58CC98F8)
(attr smd)
@@ -558,280 +1215,118 @@
(fp_text value AK4951EN (at 0 0 180) (layer B.Fab)
(effects (font (size 0.6096 0.6096) (thickness 0.12)) (justify mirror))
)
- (fp_line (start -2 -2) (end -2 2) (layer B.Fab) (width 0.025))
- (fp_line (start 2 -2) (end -2 -2) (layer B.Fab) (width 0.025))
- (fp_line (start 2 2) (end 2 -2) (layer B.Fab) (width 0.025))
- (fp_line (start -2 2) (end 2 2) (layer B.Fab) (width 0.025))
- (fp_circle (center -2.73 1.4) (end -2.605 1.4) (layer B.SilkS) (width 0.25))
- (fp_line (start -1.69 2.06) (end -2.06 2.06) (layer B.SilkS) (width 0.12))
- (fp_line (start 2.06 2.06) (end 1.69 2.06) (layer B.SilkS) (width 0.12))
- (fp_line (start 2.06 1.69) (end 2.06 2.06) (layer B.SilkS) (width 0.12))
- (fp_line (start 2.06 -2.06) (end 2.06 -1.69) (layer B.SilkS) (width 0.12))
- (fp_line (start 1.69 -2.06) (end 2.06 -2.06) (layer B.SilkS) (width 0.12))
- (fp_line (start -2.06 -2.06) (end -1.69 -2.06) (layer B.SilkS) (width 0.12))
- (fp_line (start -2.06 -1.69) (end -2.06 -2.06) (layer B.SilkS) (width 0.12))
- (fp_line (start -2.06 2.06) (end -2.06 1.69) (layer B.SilkS) (width 0.12))
- (fp_line (start -2.61 -2.61) (end -2.61 2.61) (layer B.CrtYd) (width 0.05))
- (fp_line (start 2.61 -2.61) (end -2.61 -2.61) (layer B.CrtYd) (width 0.05))
- (fp_line (start 2.61 2.61) (end 2.61 -2.61) (layer B.CrtYd) (width 0.05))
+ (fp_poly (pts (xy 0.35 -0.35) (xy 1.25 -0.35) (xy 1.25 -1.25) (xy 0.35 -1.25)) (layer B.Paste) (width 0))
+ (fp_poly (pts (xy -1.25 -0.35) (xy -0.35 -0.35) (xy -0.35 -1.25) (xy -1.25 -1.25)) (layer B.Paste) (width 0))
+ (fp_poly (pts (xy -1.25 1.25) (xy -0.35 1.25) (xy -0.35 0.35) (xy -1.25 0.35)) (layer B.Paste) (width 0))
+ (fp_poly (pts (xy 0.35 1.25) (xy 1.25 1.25) (xy 1.25 0.35) (xy 0.35 0.35)) (layer B.Paste) (width 0))
+ (fp_poly (pts (xy 1.35 -0.25) (xy 0.25 -0.25) (xy 0.25 -1.35) (xy 1.35 -1.35)) (layer B.Mask) (width 0))
+ (fp_poly (pts (xy -0.25 -0.25) (xy -1.35 -0.25) (xy -1.35 -1.35) (xy -0.25 -1.35)) (layer B.Mask) (width 0))
+ (fp_poly (pts (xy -0.25 1.35) (xy -1.35 1.35) (xy -1.35 0.25) (xy -0.25 0.25)) (layer B.Mask) (width 0))
+ (fp_poly (pts (xy 1.35 1.35) (xy 0.25 1.35) (xy 0.25 0.25) (xy 1.35 0.25)) (layer B.Mask) (width 0))
(fp_line (start -2.61 2.61) (end 2.61 2.61) (layer B.CrtYd) (width 0.05))
- (pad 33 thru_hole rect (at 0 1.15 180) (size 0.5 0.5) (drill 0.3048) (layers *.Cu B.Mask)
- (net 47 GND) (zone_connect 2))
- (pad 33 thru_hole rect (at 0 -1.15 180) (size 0.5 0.5) (drill 0.3048) (layers *.Cu B.Mask)
- (net 47 GND) (zone_connect 2))
- (pad 33 thru_hole rect (at 1.15 0 180) (size 0.5 0.5) (drill 0.3048) (layers *.Cu B.Mask)
- (net 47 GND) (zone_connect 2))
- (pad 33 thru_hole rect (at 0 0 180) (size 0.5 0.5) (drill 0.3048) (layers *.Cu B.Mask)
- (net 47 GND) (zone_connect 2))
- (pad 33 thru_hole rect (at -1.15 0 180) (size 0.5 0.5) (drill 0.3048) (layers *.Cu B.Mask)
- (net 47 GND) (zone_connect 2))
- (pad 33 thru_hole rect (at -1.15 -1.15 180) (size 0.5 0.5) (drill 0.3048) (layers *.Cu B.Mask)
+ (fp_line (start 2.61 2.61) (end 2.61 -2.61) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 2.61 -2.61) (end -2.61 -2.61) (layer B.CrtYd) (width 0.05))
+ (fp_line (start -2.61 -2.61) (end -2.61 2.61) (layer B.CrtYd) (width 0.05))
+ (fp_line (start -2.06 2.06) (end -2.06 1.69) (layer B.SilkS) (width 0.12))
+ (fp_line (start -2.06 -1.69) (end -2.06 -2.06) (layer B.SilkS) (width 0.12))
+ (fp_line (start -2.06 -2.06) (end -1.69 -2.06) (layer B.SilkS) (width 0.12))
+ (fp_line (start 1.69 -2.06) (end 2.06 -2.06) (layer B.SilkS) (width 0.12))
+ (fp_line (start 2.06 -2.06) (end 2.06 -1.69) (layer B.SilkS) (width 0.12))
+ (fp_line (start 2.06 1.69) (end 2.06 2.06) (layer B.SilkS) (width 0.12))
+ (fp_line (start 2.06 2.06) (end 1.69 2.06) (layer B.SilkS) (width 0.12))
+ (fp_line (start -1.69 2.06) (end -2.06 2.06) (layer B.SilkS) (width 0.12))
+ (fp_circle (center -2.73 1.4) (end -2.605 1.4) (layer B.SilkS) (width 0.25))
+ (fp_line (start -2 2) (end 2 2) (layer B.Fab) (width 0.025))
+ (fp_line (start 2 2) (end 2 -2) (layer B.Fab) (width 0.025))
+ (fp_line (start 2 -2) (end -2 -2) (layer B.Fab) (width 0.025))
+ (fp_line (start -2 -2) (end -2 2) (layer B.Fab) (width 0.025))
+ (fp_text user %R (at 0 0 180) (layer B.Fab)
+ (effects (font (size 1 1) (thickness 0.025)) (justify mirror))
+ )
+ (pad 33 thru_hole circle (at 0 0 180) (size 0.5 0.5) (drill 0.3048) (layers *.Cu F.Mask)
(net 47 GND) (zone_connect 2))
- (pad 33 thru_hole rect (at 1.15 -1.15 180) (size 0.5 0.5) (drill 0.3048) (layers *.Cu B.Mask)
+ (pad 33 thru_hole circle (at 1.15 0 180) (size 0.5 0.5) (drill 0.3048) (layers *.Cu F.Mask)
(net 47 GND) (zone_connect 2))
- (pad 33 thru_hole rect (at 1.15 1.15 180) (size 0.5 0.5) (drill 0.3048) (layers *.Cu B.Mask)
+ (pad 33 thru_hole circle (at -1.15 0 180) (size 0.5 0.5) (drill 0.3048) (layers *.Cu F.Mask)
(net 47 GND) (zone_connect 2))
- (pad 33 thru_hole rect (at -1.15 1.15 180) (size 0.5 0.5) (drill 0.3048) (layers *.Cu B.Mask)
+ (pad 33 thru_hole circle (at 0 -1.15 180) (size 0.5 0.5) (drill 0.3048) (layers *.Cu F.Mask)
(net 47 GND) (zone_connect 2))
- (pad 33 smd rect (at -0.675 -0.575 180) (size 1.45 1.05) (layers 4_bot B.Paste B.Mask)
+ (pad 33 smd rect (at 0 0 180) (size 2.8 2.8) (layers 4_bot)
(net 47 GND) (solder_paste_margin -0.2))
- (pad 33 smd rect (at -0.575 -0.675 180) (size 1.05 1.45) (layers 4_bot B.Paste B.Mask)
- (net 47 GND) (solder_paste_margin -0.2))
- (pad 33 smd rect (at 0.675 -0.575 180) (size 1.45 1.05) (layers 4_bot B.Paste B.Mask)
- (net 47 GND) (solder_paste_margin -0.2))
- (pad 33 smd rect (at 0.575 -0.675 180) (size 1.05 1.45) (layers 4_bot B.Paste B.Mask)
- (net 47 GND) (solder_paste_margin -0.2))
- (pad 33 smd rect (at 0.675 0.575 180) (size 1.45 1.05) (layers 4_bot B.Paste B.Mask)
- (net 47 GND) (solder_paste_margin -0.2))
- (pad 33 smd rect (at 0.575 0.675 180) (size 1.05 1.45) (layers 4_bot B.Paste B.Mask)
- (net 47 GND) (solder_paste_margin -0.2))
- (pad 33 smd rect (at -0.675 0.575 180) (size 1.45 1.05) (layers 4_bot B.Paste B.Mask)
- (net 47 GND) (solder_paste_margin -0.2))
- (pad 33 smd rect (at -0.575 0.675 180) (size 1.05 1.45) (layers 4_bot B.Paste B.Mask)
- (net 47 GND) (solder_paste_margin -0.2))
- (pad 32 smd oval (at -1.4 1.99) (size 0.22 0.74) (layers 4_bot B.Paste B.Mask)
- (net 93 "Net-(TP1-Pad1)"))
- (pad 31 smd oval (at -1 1.99) (size 0.22 0.74) (layers 4_bot B.Paste B.Mask)
- (net 77 /audio/REGFIL))
- (pad 30 smd oval (at -0.6 1.99) (size 0.22 0.74) (layers 4_bot B.Paste B.Mask)
- (net 76 /audio/VCOM))
- (pad 29 smd oval (at -0.2 1.99) (size 0.22 0.74) (layers 4_bot B.Paste B.Mask)
- (net 47 GND))
- (pad 28 smd oval (at 0.2 1.99) (size 0.22 0.74) (layers 4_bot B.Paste B.Mask)
- (net 121 +3V3))
- (pad 27 smd oval (at 0.6 1.99) (size 0.22 0.74) (layers 4_bot B.Paste B.Mask)
- (net 74 /audio/CN))
- (pad 26 smd oval (at 1 1.99) (size 0.22 0.74) (layers 4_bot B.Paste B.Mask)
- (net 73 /audio/CP))
- (pad 25 smd oval (at 1.4 1.99) (size 0.22 0.74) (layers 4_bot B.Paste B.Mask)
- (net 47 GND))
- (pad 24 smd oval (at 1.99 1.4 90) (size 0.22 0.74) (layers 4_bot B.Paste B.Mask)
- (net 75 /audio/VEE))
- (pad 23 smd oval (at 1.99 1 90) (size 0.22 0.74) (layers 4_bot B.Paste B.Mask)
- (net 2 /audio/RHPOUT))
- (pad 22 smd oval (at 1.99 0.6 90) (size 0.22 0.74) (layers 4_bot B.Paste B.Mask)
- (net 1 /audio/LHPOUT))
- (pad 21 smd oval (at 1.99 0.2 90) (size 0.22 0.74) (layers 4_bot B.Paste B.Mask)
- (net 122 +1V8))
- (pad 20 smd oval (at 1.99 -0.2 90) (size 0.22 0.74) (layers 4_bot B.Paste B.Mask)
- (net 119 /audio/SPP))
- (pad 19 smd oval (at 1.99 -0.6 90) (size 0.22 0.74) (layers 4_bot B.Paste B.Mask)
- (net 120 /audio/SPN))
- (pad 18 smd oval (at 1.99 -1 90) (size 0.22 0.74) (layers 4_bot B.Paste B.Mask)
- (net 72 /power/AUDIO_SVDD))
- (pad 17 smd oval (at 1.99 -1.4 90) (size 0.22 0.74) (layers 4_bot B.Paste B.Mask)
- (net 47 GND))
- (pad 16 smd oval (at 1.4 -1.99 180) (size 0.22 0.74) (layers 4_bot B.Paste B.Mask)
- (net 121 +3V3))
- (pad 15 smd oval (at 1 -1.99 180) (size 0.22 0.74) (layers 4_bot B.Paste B.Mask)
- (net 84 /hackrf_if/I2S0_MCLK))
- (pad 14 smd oval (at 0.6 -1.99 180) (size 0.22 0.74) (layers 4_bot B.Paste B.Mask)
- (net 115 /audio/BICK_R))
- (pad 13 smd oval (at 0.2 -1.99 180) (size 0.22 0.74) (layers 4_bot B.Paste B.Mask)
- (net 116 /audio/LRCK_R))
- (pad 12 smd oval (at -0.2 -1.99 180) (size 0.22 0.74) (layers 4_bot B.Paste B.Mask)
- (net 117 /audio/SDTO_R))
- (pad 11 smd oval (at -0.6 -1.99 180) (size 0.22 0.74) (layers 4_bot B.Paste B.Mask)
- (net 81 /hackrf_if/I2S0_TX_SDA))
- (pad 10 smd oval (at -1 -1.99 180) (size 0.22 0.74) (layers 4_bot B.Paste B.Mask)
- (net 4 /audio/SDA))
- (pad 9 smd oval (at -1.4 -1.99 180) (size 0.22 0.74) (layers 4_bot B.Paste B.Mask)
- (net 3 /audio/SCL))
- (pad 8 smd oval (at -1.99 -1.4 270) (size 0.22 0.74) (layers 4_bot B.Paste B.Mask)
- (net 114 /audio/PDN#_R))
- (pad 7 smd oval (at -1.99 -1 270) (size 0.22 0.74) (layers 4_bot B.Paste B.Mask)
- (net 98 "Net-(TP6-Pad1)"))
- (pad 6 smd oval (at -1.99 -0.6 270) (size 0.22 0.74) (layers 4_bot B.Paste B.Mask)
- (net 97 "Net-(TP5-Pad1)"))
- (pad 5 smd oval (at -1.99 -0.2 270) (size 0.22 0.74) (layers 4_bot B.Paste B.Mask)
- (net 96 "Net-(TP4-Pad1)"))
- (pad 4 smd oval (at -1.99 0.2 270) (size 0.22 0.74) (layers 4_bot B.Paste B.Mask)
- (net 91 "Net-(R18-Pad1)"))
- (pad 3 smd oval (at -1.99 0.6 270) (size 0.22 0.74) (layers 4_bot B.Paste B.Mask)
- (net 79 "Net-(C25-Pad1)"))
- (pad 2 smd oval (at -1.99 1 270) (size 0.22 0.74) (layers 4_bot B.Paste B.Mask)
- (net 95 "Net-(TP3-Pad1)"))
- (pad 1 smd oval (at -1.99 1.4 270) (size 0.22 0.74) (layers 4_bot B.Paste B.Mask)
- (net 94 "Net-(TP2-Pad1)"))
- (model Housings_DFN_QFN.3dshapes/QFN-32-1EP_4x4mm_Pitch0.4mm.wrl
- (at (xyz 0 0 0))
- (scale (xyz 1 1 1))
- (rotate (xyz 0 0 0))
- )
- )
-
- (module eastrising:ER-CON50HT-1 (layer 4_bot) (tedit 58FD8DA6) (tstamp 58B09183)
- (at 87.3 137.5 270)
- (path /53A9129D/58AE3A81)
- (attr smd)
- (fp_text reference J3 (at 13.75 -2.95 270) (layer B.SilkS)
- (effects (font (size 0.6096 0.6096) (thickness 0.12)) (justify mirror))
- )
- (fp_text value ER-TFT024-3_FPC (at 0 0 270) (layer B.Fab)
- (effects (font (size 0.6096 0.6096) (thickness 0.12)) (justify mirror))
- )
- (fp_line (start 15.05 0.6) (end 15.05 -2.5) (layer B.CrtYd) (width 0.05))
- (fp_line (start 15.05 -2.5) (end 12.65 -2.5) (layer B.CrtYd) (width 0.05))
- (fp_line (start 12.65 -2.5) (end 12.65 -3.75) (layer B.CrtYd) (width 0.05))
- (fp_line (start 12.65 -3.75) (end -12.65 -3.75) (layer B.CrtYd) (width 0.05))
- (fp_line (start -15.05 -2.5) (end -15.05 0.6) (layer B.CrtYd) (width 0.05))
- (fp_line (start -15.05 0.6) (end -15.6 0.6) (layer B.CrtYd) (width 0.05))
- (fp_line (start -15.6 0.6) (end -15.6 2.5) (layer B.CrtYd) (width 0.05))
- (fp_line (start -15.6 2.5) (end 15.6 2.5) (layer B.CrtYd) (width 0.05))
- (fp_line (start 15.6 2.5) (end 15.6 0.6) (layer B.CrtYd) (width 0.05))
- (fp_line (start 15.6 0.6) (end 15.05 0.6) (layer B.CrtYd) (width 0.05))
- (fp_line (start -12.65 -2.5) (end -15.05 -2.5) (layer B.CrtYd) (width 0.05))
- (fp_line (start -12.65 -3.75) (end -12.65 -2.5) (layer B.CrtYd) (width 0.05))
- (fp_line (start -15.385 2.31) (end 15.385 2.31) (layer B.SilkS) (width 0.12))
- (fp_line (start 15.385 2.31) (end 15.385 0.79) (layer B.SilkS) (width 0.12))
- (fp_line (start 15.385 0.79) (end 15 0.79) (layer B.SilkS) (width 0.12))
- (fp_line (start 14.735 -2.31) (end 12.675 -2.31) (layer B.SilkS) (width 0.12))
- (fp_line (start -14.735 -2.31) (end -12.675 -2.31) (layer B.SilkS) (width 0.12))
- (fp_line (start -15 0.79) (end -15.385 0.79) (layer B.SilkS) (width 0.12))
- (fp_line (start -15.385 0.79) (end -15.385 2.31) (layer B.SilkS) (width 0.12))
- (fp_circle (center 12.85 -2.75) (end 12.975 -2.75) (layer B.SilkS) (width 0.25))
- (fp_line (start 14.675 0.85) (end 15.325 0.85) (layer B.Fab) (width 0.025))
- (fp_line (start -15.325 0.85) (end -14.675 0.85) (layer B.Fab) (width 0.025))
- (fp_line (start -15.325 0.85) (end -15.325 2.25) (layer B.Fab) (width 0.025))
- (fp_line (start 15.325 0.85) (end 15.325 2.25) (layer B.Fab) (width 0.025))
- (fp_line (start 14.675 0.85) (end 14.675 -2.25) (layer B.Fab) (width 0.025))
- (fp_line (start -14.675 0.85) (end -14.675 -2.25) (layer B.Fab) (width 0.025))
- (fp_line (start -14.675 -2.25) (end 14.675 -2.25) (layer B.Fab) (width 0.025))
- (fp_line (start -15.325 2.25) (end 15.325 2.25) (layer B.Fab) (width 0.025))
- (fp_line (start 12.75 -0.5) (end 12.75 2.25) (layer B.Fab) (width 0.025))
- (fp_line (start -12.75 -0.5) (end 12.75 -0.5) (layer B.Fab) (width 0.025))
- (fp_line (start -12.75 2.25) (end -12.75 -0.5) (layer B.Fab) (width 0.025))
- (pad 1 smd oval (at 12.25 -2.875 270) (size 0.29 1.25) (layers 4_bot B.Paste B.Mask)
- (net 121 +3V3))
- (pad 2 smd oval (at 11.75 -2.875 270) (size 0.29 1.25) (layers 4_bot B.Paste B.Mask)
- (net 67 /lcd_sw_sd/LEDK1))
- (pad 3 smd oval (at 11.25 -2.875 270) (size 0.29 1.25) (layers 4_bot B.Paste B.Mask)
- (net 66 /lcd_sw_sd/LEDK2))
- (pad 4 smd oval (at 10.75 -2.875 270) (size 0.29 1.25) (layers 4_bot B.Paste B.Mask)
- (net 68 /lcd_sw_sd/LEDK3))
- (pad 5 smd oval (at 10.25 -2.875 270) (size 0.29 1.25) (layers 4_bot B.Paste B.Mask)
- (net 69 /lcd_sw_sd/LEDK4))
- (pad 6 smd oval (at 9.75 -2.875 270) (size 0.29 1.25) (layers 4_bot B.Paste B.Mask)
- (net 122 +1V8))
- (pad 7 smd oval (at 9.25 -2.875 270) (size 0.29 1.25) (layers 4_bot B.Paste B.Mask)
- (net 47 GND))
- (pad 8 smd oval (at 8.75 -2.875 270) (size 0.29 1.25) (layers 4_bot B.Paste B.Mask)
- (net 47 GND))
- (pad 9 smd oval (at 8.25 -2.875 270) (size 0.29 1.25) (layers 4_bot B.Paste B.Mask)
- (net 47 GND))
- (pad 10 smd oval (at 7.75 -2.875 270) (size 0.29 1.25) (layers 4_bot B.Paste B.Mask)
- (net 23 /hackrf_if/LCD_RESET#))
- (pad 11 smd oval (at 7.25 -2.875 270) (size 0.29 1.25) (layers 4_bot B.Paste B.Mask)
- (net 47 GND))
- (pad 12 smd oval (at 6.75 -2.875 270) (size 0.29 1.25) (layers 4_bot B.Paste B.Mask)
- (net 47 GND))
- (pad 13 smd oval (at 6.25 -2.875 270) (size 0.29 1.25) (layers 4_bot B.Paste B.Mask)
- (net 47 GND))
- (pad 14 smd oval (at 5.75 -2.875 270) (size 0.29 1.25) (layers 4_bot B.Paste B.Mask)
- (net 47 GND))
- (pad 15 smd oval (at 5.25 -2.875 270) (size 0.29 1.25) (layers 4_bot B.Paste B.Mask)
- (net 47 GND))
- (pad 16 smd oval (at 4.75 -2.875 270) (size 0.29 1.25) (layers 4_bot B.Paste B.Mask)
- (net 47 GND))
- (pad 17 smd oval (at 4.25 -2.875 270) (size 0.29 1.25) (layers 4_bot B.Paste B.Mask)
- (net 13 /hackrf_if/LCD_DB15))
- (pad 18 smd oval (at 3.75 -2.875 270) (size 0.29 1.25) (layers 4_bot B.Paste B.Mask)
- (net 12 /hackrf_if/LCD_DB14))
- (pad 19 smd oval (at 3.25 -2.875 270) (size 0.29 1.25) (layers 4_bot B.Paste B.Mask)
- (net 11 /hackrf_if/LCD_DB13))
- (pad 20 smd oval (at 2.75 -2.875 270) (size 0.29 1.25) (layers 4_bot B.Paste B.Mask)
- (net 10 /hackrf_if/LCD_DB12))
- (pad 21 smd oval (at 2.25 -2.875 270) (size 0.29 1.25) (layers 4_bot B.Paste B.Mask)
- (net 9 /hackrf_if/LCD_DB11))
- (pad 22 smd oval (at 1.75 -2.875 270) (size 0.29 1.25) (layers 4_bot B.Paste B.Mask)
- (net 8 /hackrf_if/LCD_DB10))
- (pad 23 smd oval (at 1.25 -2.875 270) (size 0.29 1.25) (layers 4_bot B.Paste B.Mask)
- (net 21 /hackrf_if/LCD_DB9))
- (pad 24 smd oval (at 0.75 -2.875 270) (size 0.29 1.25) (layers 4_bot B.Paste B.Mask)
- (net 20 /hackrf_if/LCD_DB8))
- (pad 25 smd oval (at 0.25 -2.875 270) (size 0.29 1.25) (layers 4_bot B.Paste B.Mask)
- (net 19 /hackrf_if/LCD_DB7))
- (pad 26 smd oval (at -0.25 -2.875 270) (size 0.29 1.25) (layers 4_bot B.Paste B.Mask)
- (net 18 /hackrf_if/LCD_DB6))
- (pad 27 smd oval (at -0.75 -2.875 270) (size 0.29 1.25) (layers 4_bot B.Paste B.Mask)
- (net 17 /hackrf_if/LCD_DB5))
- (pad 28 smd oval (at -1.25 -2.875 270) (size 0.29 1.25) (layers 4_bot B.Paste B.Mask)
- (net 16 /hackrf_if/LCD_DB4))
- (pad 29 smd oval (at -1.75 -2.875 270) (size 0.29 1.25) (layers 4_bot B.Paste B.Mask)
- (net 15 /hackrf_if/LCD_DB3))
- (pad 30 smd oval (at -2.25 -2.875 270) (size 0.29 1.25) (layers 4_bot B.Paste B.Mask)
- (net 14 /hackrf_if/LCD_DB2))
- (pad 31 smd oval (at -2.75 -2.875 270) (size 0.29 1.25) (layers 4_bot B.Paste B.Mask)
- (net 7 /hackrf_if/LCD_DB1))
- (pad 32 smd oval (at -3.25 -2.875 270) (size 0.29 1.25) (layers 4_bot B.Paste B.Mask)
- (net 6 /hackrf_if/LCD_DB0))
- (pad 33 smd oval (at -3.75 -2.875 270) (size 0.29 1.25) (layers 4_bot B.Paste B.Mask))
- (pad 34 smd oval (at -4.25 -2.875 270) (size 0.29 1.25) (layers 4_bot B.Paste B.Mask)
- (net 47 GND))
- (pad 35 smd oval (at -4.75 -2.875 270) (size 0.29 1.25) (layers 4_bot B.Paste B.Mask)
- (net 22 /hackrf_if/LCD_RD#))
- (pad 36 smd oval (at -5.25 -2.875 270) (size 0.29 1.25) (layers 4_bot B.Paste B.Mask)
- (net 26 /hackrf_if/LCD_WR#))
- (pad 37 smd oval (at -5.75 -2.875 270) (size 0.29 1.25) (layers 4_bot B.Paste B.Mask)
- (net 24 /hackrf_if/LCD_RS))
- (pad 38 smd oval (at -6.25 -2.875 270) (size 0.29 1.25) (layers 4_bot B.Paste B.Mask)
- (net 47 GND))
- (pad 39 smd oval (at -6.75 -2.875 270) (size 0.29 1.25) (layers 4_bot B.Paste B.Mask)
- (net 25 /hackrf_if/LCD_TE))
- (pad 40 smd oval (at -7.25 -2.875 270) (size 0.29 1.25) (layers 4_bot B.Paste B.Mask)
- (net 122 +1V8))
- (pad 41 smd oval (at -7.75 -2.875 270) (size 0.29 1.25) (layers 4_bot B.Paste B.Mask)
- (net 122 +1V8))
- (pad 42 smd oval (at -8.25 -2.875 270) (size 0.29 1.25) (layers 4_bot B.Paste B.Mask)
- (net 121 +3V3))
- (pad 43 smd oval (at -8.75 -2.875 270) (size 0.29 1.25) (layers 4_bot B.Paste B.Mask)
- (net 47 GND))
- (pad 44 smd oval (at -9.25 -2.875 270) (size 0.29 1.25) (layers 4_bot B.Paste B.Mask)
- (net 44 /hackrf_if/TP_R))
- (pad 45 smd oval (at -9.75 -2.875 270) (size 0.29 1.25) (layers 4_bot B.Paste B.Mask)
- (net 42 /hackrf_if/TP_D))
- (pad 46 smd oval (at -10.25 -2.875 270) (size 0.29 1.25) (layers 4_bot B.Paste B.Mask)
- (net 43 /hackrf_if/TP_L))
- (pad 47 smd oval (at -10.75 -2.875 270) (size 0.29 1.25) (layers 4_bot B.Paste B.Mask)
- (net 45 /hackrf_if/TP_U))
- (pad 48 smd oval (at -11.25 -2.875 270) (size 0.29 1.25) (layers 4_bot B.Paste B.Mask)
- (net 47 GND))
- (pad 49 smd oval (at -11.75 -2.875 270) (size 0.29 1.25) (layers 4_bot B.Paste B.Mask)
- (net 47 GND))
- (pad 50 smd oval (at -12.25 -2.875 270) (size 0.29 1.25) (layers 4_bot B.Paste B.Mask)
+ (pad 33 thru_hole circle (at 0 1.15 180) (size 0.5 0.5) (drill 0.3048) (layers *.Cu F.Mask)
+ (net 47 GND) (zone_connect 2))
+ (pad 32 smd oval (at -1.4 1.99) (size 0.2 0.74) (layers 4_bot B.Paste B.Mask)
+ (net 93 "Net-(TP1-Pad1)"))
+ (pad 31 smd oval (at -1 1.99) (size 0.2 0.74) (layers 4_bot B.Paste B.Mask)
+ (net 77 /audio/REGFIL))
+ (pad 30 smd oval (at -0.6 1.99) (size 0.2 0.74) (layers 4_bot B.Paste B.Mask)
+ (net 76 /audio/VCOM))
+ (pad 29 smd oval (at -0.2 1.99) (size 0.2 0.74) (layers 4_bot B.Paste B.Mask)
(net 47 GND))
- (pad SHLD smd rect (at -13.79 -0.55 270) (size 2 3) (layers 4_bot B.Paste B.Mask)
+ (pad 28 smd oval (at 0.2 1.99) (size 0.2 0.74) (layers 4_bot B.Paste B.Mask)
+ (net 121 +3V3))
+ (pad 27 smd oval (at 0.6 1.99) (size 0.2 0.74) (layers 4_bot B.Paste B.Mask)
+ (net 74 /audio/CN))
+ (pad 26 smd oval (at 1 1.99) (size 0.2 0.74) (layers 4_bot B.Paste B.Mask)
+ (net 73 /audio/CP))
+ (pad 25 smd oval (at 1.4 1.99) (size 0.2 0.74) (layers 4_bot B.Paste B.Mask)
(net 47 GND))
- (pad SHLD smd rect (at 13.79 -0.55 270) (size 2 3) (layers 4_bot B.Paste B.Mask)
+ (pad 24 smd oval (at 1.99 1.4 90) (size 0.2 0.74) (layers 4_bot B.Paste B.Mask)
+ (net 75 /audio/VEE))
+ (pad 23 smd oval (at 1.99 1 90) (size 0.2 0.74) (layers 4_bot B.Paste B.Mask)
+ (net 2 /audio/RHPOUT))
+ (pad 22 smd oval (at 1.99 0.6 90) (size 0.2 0.74) (layers 4_bot B.Paste B.Mask)
+ (net 1 /audio/LHPOUT))
+ (pad 21 smd oval (at 1.99 0.2 90) (size 0.2 0.74) (layers 4_bot B.Paste B.Mask)
+ (net 122 +1V8))
+ (pad 20 smd oval (at 1.99 -0.2 90) (size 0.2 0.74) (layers 4_bot B.Paste B.Mask)
+ (net 119 /audio/SPP))
+ (pad 19 smd oval (at 1.99 -0.6 90) (size 0.2 0.74) (layers 4_bot B.Paste B.Mask)
+ (net 120 /audio/SPN))
+ (pad 18 smd oval (at 1.99 -1 90) (size 0.2 0.74) (layers 4_bot B.Paste B.Mask)
+ (net 72 /power/AUDIO_SVDD))
+ (pad 17 smd oval (at 1.99 -1.4 90) (size 0.2 0.74) (layers 4_bot B.Paste B.Mask)
(net 47 GND))
- (model ${KISBLIB}/eastrising.pretty/ER-CON50HT-1.wrl
+ (pad 16 smd oval (at 1.4 -1.99 180) (size 0.2 0.74) (layers 4_bot B.Paste B.Mask)
+ (net 121 +3V3))
+ (pad 15 smd oval (at 1 -1.99 180) (size 0.2 0.74) (layers 4_bot B.Paste B.Mask)
+ (net 84 /hackrf_if/I2S0_MCLK))
+ (pad 14 smd oval (at 0.6 -1.99 180) (size 0.2 0.74) (layers 4_bot B.Paste B.Mask)
+ (net 115 /audio/BICK_R))
+ (pad 13 smd oval (at 0.2 -1.99 180) (size 0.2 0.74) (layers 4_bot B.Paste B.Mask)
+ (net 116 /audio/LRCK_R))
+ (pad 12 smd oval (at -0.2 -1.99 180) (size 0.2 0.74) (layers 4_bot B.Paste B.Mask)
+ (net 117 /audio/SDTO_R))
+ (pad 11 smd oval (at -0.6 -1.99 180) (size 0.2 0.74) (layers 4_bot B.Paste B.Mask)
+ (net 81 /hackrf_if/I2S0_TX_SDA))
+ (pad 10 smd oval (at -1 -1.99 180) (size 0.2 0.74) (layers 4_bot B.Paste B.Mask)
+ (net 4 /audio/SDA))
+ (pad 9 smd oval (at -1.4 -1.99 180) (size 0.2 0.74) (layers 4_bot B.Paste B.Mask)
+ (net 3 /audio/SCL))
+ (pad 8 smd oval (at -1.99 -1.4 270) (size 0.2 0.74) (layers 4_bot B.Paste B.Mask)
+ (net 114 /audio/PDN#_R))
+ (pad 7 smd oval (at -1.99 -1 270) (size 0.2 0.74) (layers 4_bot B.Paste B.Mask)
+ (net 98 "Net-(TP6-Pad1)"))
+ (pad 6 smd oval (at -1.99 -0.6 270) (size 0.2 0.74) (layers 4_bot B.Paste B.Mask)
+ (net 97 "Net-(TP5-Pad1)"))
+ (pad 5 smd oval (at -1.99 -0.2 270) (size 0.2 0.74) (layers 4_bot B.Paste B.Mask)
+ (net 96 "Net-(TP4-Pad1)"))
+ (pad 4 smd oval (at -1.99 0.2 270) (size 0.2 0.74) (layers 4_bot B.Paste B.Mask)
+ (net 91 "Net-(R18-Pad1)"))
+ (pad 3 smd oval (at -1.99 0.6 270) (size 0.2 0.74) (layers 4_bot B.Paste B.Mask)
+ (net 79 "Net-(C25-Pad1)"))
+ (pad 2 smd oval (at -1.99 1 270) (size 0.2 0.74) (layers 4_bot B.Paste B.Mask)
+ (net 95 "Net-(TP3-Pad1)"))
+ (pad 1 smd oval (at -1.99 1.4 270) (size 0.2 0.74) (layers 4_bot B.Paste B.Mask)
+ (net 94 "Net-(TP2-Pad1)"))
+ (model ${KISYS3DMOD}/Package_DFN_QFN.3dshapes/QFN-32-1EP_4x4mm_P0.4mm_EP2.65x2.65mm.step
(at (xyz 0 0 0))
- (scale (xyz 0.3937 0.3937 0.3937))
+ (scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
- (module ipc_son:IPC_SON9P50_200X200X55L32X24T90X160N (layer 4_bot) (tedit 5B79FEF0) (tstamp 58D20D16)
+ (module ipc_son:IPC_SON9P50_200X200X55L32X24T90X160N (layer 4_bot) (tedit 5BD22CF5) (tstamp 58D20D16)
(at 94.2 148.5 90)
(path /53A9129D/58B747DD)
(attr smd)
@@ -841,6 +1336,9 @@
(fp_text value CAT4004[_AB] (at 0 0 90) (layer B.Fab)
(effects (font (size 0.6096 0.6096) (thickness 0.12)) (justify mirror))
)
+ (fp_text user %R (at 0 0 90) (layer B.Fab)
+ (effects (font (size 1 1) (thickness 0.025)) (justify mirror))
+ )
(fp_line (start -1.61 1.25) (end 1.61 1.25) (layer B.CrtYd) (width 0.05))
(fp_line (start 1.61 1.25) (end 1.61 -1.25) (layer B.CrtYd) (width 0.05))
(fp_line (start 1.61 -1.25) (end -1.61 -1.25) (layer B.CrtYd) (width 0.05))
@@ -852,40 +1350,44 @@
(fp_line (start 1 1) (end 1 -1) (layer B.Fab) (width 0.025))
(fp_line (start 1 -1) (end -1 -1) (layer B.Fab) (width 0.025))
(fp_line (start -1 -1) (end -1 1) (layer B.Fab) (width 0.025))
- (pad 1 smd oval (at -1.005 0.75 180) (size 0.26 0.71) (layers 4_bot B.Paste B.Mask)
+ (pad 1 smd rect (at -1.005 0.75 180) (size 0.26 0.71) (layers 4_bot B.Paste B.Mask)
(net 5 /hackrf_if/LCD_BACKLIGHT))
- (pad 2 smd oval (at -1.005 0.25 180) (size 0.26 0.71) (layers 4_bot B.Paste B.Mask)
+ (pad 2 smd rect (at -1.005 0.25 180) (size 0.26 0.71) (layers 4_bot B.Paste B.Mask)
(net 47 GND))
- (pad 3 smd oval (at -1.005 -0.25 180) (size 0.26 0.71) (layers 4_bot B.Paste B.Mask)
+ (pad 3 smd rect (at -1.005 -0.25 180) (size 0.26 0.71) (layers 4_bot B.Paste B.Mask)
(net 67 /lcd_sw_sd/LEDK1))
- (pad 4 smd oval (at -1.005 -0.75 180) (size 0.26 0.71) (layers 4_bot B.Paste B.Mask)
+ (pad 4 smd rect (at -1.005 -0.75 180) (size 0.26 0.71) (layers 4_bot B.Paste B.Mask)
(net 66 /lcd_sw_sd/LEDK2))
- (pad 5 smd oval (at 1.005 -0.75) (size 0.26 0.71) (layers 4_bot B.Paste B.Mask)
+ (pad 5 smd rect (at 1.005 -0.75) (size 0.26 0.71) (layers 4_bot B.Paste B.Mask)
(net 68 /lcd_sw_sd/LEDK3))
- (pad 6 smd oval (at 1.005 -0.25) (size 0.26 0.71) (layers 4_bot B.Paste B.Mask)
+ (pad 6 smd rect (at 1.005 -0.25) (size 0.26 0.71) (layers 4_bot B.Paste B.Mask)
(net 69 /lcd_sw_sd/LEDK4))
- (pad 7 smd oval (at 1.005 0.25) (size 0.26 0.71) (layers 4_bot B.Paste B.Mask)
+ (pad 7 smd rect (at 1.005 0.25) (size 0.26 0.71) (layers 4_bot B.Paste B.Mask)
(net 71 "Net-(R20-Pad1)"))
- (pad 8 smd oval (at 1.005 0.75) (size 0.26 0.71) (layers 4_bot B.Paste B.Mask)
+ (pad 8 smd rect (at 1.005 0.75) (size 0.26 0.71) (layers 4_bot B.Paste B.Mask)
(net 121 +3V3))
(pad 9 smd rect (at 0 0 90) (size 0.85 1.6) (layers 4_bot B.Paste B.Mask)
(net 47 GND) (solder_paste_margin -0.1))
- (model Housings_DFN_QFN.3dshapes/DFN-8-1EP_2x2mm_Pitch0.5mm.wrl
+ (model ${KISYS3DMOD}/Package_DFN_QFN.3dshapes/DFN-8-1EP_2x2mm_P0.5mm_EP1.05x1.75mm.step
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
- (module ipc_qfn:IPC_QFN17P50_300X300X100L40X25T160N (layer 4_bot) (tedit 5B79B9C7) (tstamp 58F1AF31)
+ (module ipc_qfn:IPC_QFN17P50_300X300X100L40X25T160N (layer 4_bot) (tedit 5BD22C21) (tstamp 58F1AF31)
(at 170.575 123.875 90)
(path /58CFF3E3/58F1AA75)
+ (attr smd)
(fp_text reference U6 (at -4.225 -1.275 90) (layer B.SilkS)
(effects (font (size 0.6096 0.6096) (thickness 0.12)) (justify mirror))
)
(fp_text value BQ24075RGT (at 0 0 90) (layer B.Fab)
(effects (font (size 0.6096 0.6096) (thickness 0.12)) (justify mirror))
)
+ (fp_text user %R (at 0 0 90) (layer B.Fab)
+ (effects (font (size 1 1) (thickness 0.025)) (justify mirror))
+ )
(fp_line (start -2.115 2.115) (end 2.115 2.115) (layer B.CrtYd) (width 0.05))
(fp_line (start 2.115 2.115) (end 2.115 -2.115) (layer B.CrtYd) (width 0.05))
(fp_line (start 2.115 -2.115) (end -2.115 -2.115) (layer B.CrtYd) (width 0.05))
@@ -903,37 +1405,37 @@
(fp_line (start 1.5 1.5) (end 1.5 -1.5) (layer B.Fab) (width 0.025))
(fp_line (start 1.5 -1.5) (end -1.5 -1.5) (layer B.Fab) (width 0.025))
(fp_line (start -1.5 -1.5) (end -1.5 1.5) (layer B.Fab) (width 0.025))
- (pad 1 smd oval (at -1.435 0.75 180) (size 0.27 0.86) (layers 4_bot B.Paste B.Mask)
+ (pad 1 smd rect (at -1.435 0.75 180) (size 0.27 0.86) (layers 4_bot B.Paste B.Mask)
(net 104 "Net-(R8-Pad1)"))
- (pad 2 smd oval (at -1.435 0.25 180) (size 0.27 0.86) (layers 4_bot B.Paste B.Mask)
+ (pad 2 smd rect (at -1.435 0.25 180) (size 0.27 0.86) (layers 4_bot B.Paste B.Mask)
(net 118 /power/BBAT))
- (pad 3 smd oval (at -1.435 -0.25 180) (size 0.27 0.86) (layers 4_bot B.Paste B.Mask)
+ (pad 3 smd rect (at -1.435 -0.25 180) (size 0.27 0.86) (layers 4_bot B.Paste B.Mask)
(net 118 /power/BBAT))
- (pad 4 smd oval (at -1.435 -0.75 180) (size 0.27 0.86) (layers 4_bot B.Paste B.Mask)
+ (pad 4 smd rect (at -1.435 -0.75 180) (size 0.27 0.86) (layers 4_bot B.Paste B.Mask)
(net 105 "Net-(R9-Pad1)"))
- (pad 5 smd oval (at -0.75 -1.435 90) (size 0.27 0.86) (layers 4_bot B.Paste B.Mask)
+ (pad 5 smd rect (at -0.75 -1.435 90) (size 0.27 0.86) (layers 4_bot B.Paste B.Mask)
(net 108 "Net-(R14-Pad1)"))
- (pad 6 smd oval (at -0.25 -1.435 90) (size 0.27 0.86) (layers 4_bot B.Paste B.Mask)
+ (pad 6 smd rect (at -0.25 -1.435 90) (size 0.27 0.86) (layers 4_bot B.Paste B.Mask)
(net 107 "Net-(R13-Pad2)"))
- (pad 7 smd oval (at 0.25 -1.435 90) (size 0.27 0.86) (layers 4_bot B.Paste B.Mask)
+ (pad 7 smd rect (at 0.25 -1.435 90) (size 0.27 0.86) (layers 4_bot B.Paste B.Mask)
(net 111 "Net-(D1-PadC)"))
- (pad 8 smd oval (at 0.75 -1.435 90) (size 0.27 0.86) (layers 4_bot B.Paste B.Mask)
+ (pad 8 smd rect (at 0.75 -1.435 90) (size 0.27 0.86) (layers 4_bot B.Paste B.Mask)
(net 47 GND))
- (pad 9 smd oval (at 1.435 -0.75) (size 0.27 0.86) (layers 4_bot B.Paste B.Mask)
+ (pad 9 smd rect (at 1.435 -0.75) (size 0.27 0.86) (layers 4_bot B.Paste B.Mask)
(net 112 "Net-(D2-PadC)"))
- (pad 10 smd oval (at 1.435 -0.25) (size 0.27 0.86) (layers 4_bot B.Paste B.Mask)
+ (pad 10 smd rect (at 1.435 -0.25) (size 0.27 0.86) (layers 4_bot B.Paste B.Mask)
(net 72 /power/AUDIO_SVDD))
- (pad 11 smd oval (at 1.435 0.25) (size 0.27 0.86) (layers 4_bot B.Paste B.Mask)
+ (pad 11 smd rect (at 1.435 0.25) (size 0.27 0.86) (layers 4_bot B.Paste B.Mask)
(net 72 /power/AUDIO_SVDD))
- (pad 12 smd oval (at 1.435 0.75) (size 0.27 0.86) (layers 4_bot B.Paste B.Mask)
+ (pad 12 smd rect (at 1.435 0.75) (size 0.27 0.86) (layers 4_bot B.Paste B.Mask)
(net 102 "Net-(R4-Pad1)"))
- (pad 13 smd oval (at 0.75 1.435 270) (size 0.27 0.86) (layers 4_bot B.Paste B.Mask)
+ (pad 13 smd rect (at 0.75 1.435 270) (size 0.27 0.86) (layers 4_bot B.Paste B.Mask)
(net 99 /hackrf_if/VBUS))
- (pad 14 smd oval (at 0.25 1.435 270) (size 0.27 0.86) (layers 4_bot B.Paste B.Mask)
+ (pad 14 smd rect (at 0.25 1.435 270) (size 0.27 0.86) (layers 4_bot B.Paste B.Mask)
(net 101 "Net-(R1-Pad1)"))
- (pad 15 smd oval (at -0.25 1.435 270) (size 0.27 0.86) (layers 4_bot B.Paste B.Mask)
+ (pad 15 smd rect (at -0.25 1.435 270) (size 0.27 0.86) (layers 4_bot B.Paste B.Mask)
(net 106 "Net-(R10-Pad1)"))
- (pad 16 smd oval (at -0.75 1.435 270) (size 0.27 0.86) (layers 4_bot B.Paste B.Mask)
+ (pad 16 smd rect (at -0.75 1.435 270) (size 0.27 0.86) (layers 4_bot B.Paste B.Mask)
(net 103 "Net-(R6-Pad1)"))
(pad 17 smd rect (at 0 0 90) (size 0.9 1.6) (layers 4_bot B.Paste B.Mask)
(net 47 GND) (solder_paste_margin -0.15))
@@ -947,22 +1449,26 @@
(net 47 GND) (zone_connect 2))
(pad 17 thru_hole rect (at -0.55 -0.55 90) (size 0.5 0.5) (drill 0.3048) (layers *.Cu B.Mask)
(net 47 GND) (zone_connect 2))
- (model Housings_DFN_QFN.3dshapes/QFN-16-1EP_3x3mm_Pitch0.5mm.wrl
+ (model ${KISYS3DMOD}/Package_DFN_QFN.3dshapes/QFN-16-1EP_3x3mm_P0.5mm_EP1.8x1.8mm.step
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
- (module jst:JST_S3B-PH-SM4-TB (layer 4_bot) (tedit 58F43DFE) (tstamp 58F8093C)
+ (module jst:JST_S3B-PH-SM4-TB (layer 4_bot) (tedit 5BD22B6A) (tstamp 58F8093C)
(at 137.9 115.25 270)
(path /53A8BFC3/58F82DA0)
+ (attr smd)
(fp_text reference J1 (at 4.6 -4.45 270) (layer B.SilkS)
(effects (font (size 0.6096 0.6096) (thickness 0.12)) (justify mirror))
)
(fp_text value HEADER_1X3 (at 0 0 270) (layer B.Fab)
(effects (font (size 0.6096 0.6096) (thickness 0.12)) (justify mirror))
)
+ (fp_text user %R (at 0 0 270) (layer B.Fab)
+ (effects (font (size 1 1) (thickness 0.025)) (justify mirror))
+ )
(fp_line (start -2.75 -4.05) (end -2.75 -5.45) (layer B.CrtYd) (width 0.05))
(fp_line (start -5.2 -4.05) (end -2.75 -4.05) (layer B.CrtYd) (width 0.05))
(fp_line (start -5.2 0.35) (end -5.2 -4.05) (layer B.CrtYd) (width 0.05))
@@ -998,22 +1504,26 @@
(net 47 GND))
(pad 3 smd rect (at -2 -3.45 270) (size 1 3.5) (layers 4_bot B.Paste B.Mask)
(net 119 /audio/SPP))
- (model ${KISBLIB}/jst.pretty/S3B-PH-SM4-TB.wrl
- (offset (xyz 9.899999851316919 -13.19999980175589 0))
- (scale (xyz 0.393701 0.393701 0.393701))
+ (model ${KISBLIB}/jst.pretty/S3B-PH-SM4-TB.STEP
+ (offset (xyz 9.9 -13.2 0))
+ (scale (xyz 1 1 1))
(rotate (xyz 90 180 0))
)
)
- (module jst:JST_S2B-PH-SM4-TB (layer 4_bot) (tedit 58F43DFE) (tstamp 58F1AEEF)
+ (module jst:JST_S2B-PH-SM4-TB (layer 4_bot) (tedit 5BD22BF3) (tstamp 58F1AEEF)
(at 151.1 123.9 90)
(path /58CFF3E3/58F1DD77)
+ (attr smd)
(fp_text reference J4 (at 3.55 -4.4 90) (layer B.SilkS)
(effects (font (size 0.6096 0.6096) (thickness 0.12)) (justify mirror))
)
(fp_text value HEADER_1X2 (at 0 0 90) (layer B.Fab)
(effects (font (size 0.6096 0.6096) (thickness 0.12)) (justify mirror))
)
+ (fp_text user %R (at 0 0 90) (layer B.Fab)
+ (effects (font (size 1 1) (thickness 0.025)) (justify mirror))
+ )
(fp_line (start -1.75 -4.05) (end -1.75 -5.45) (layer B.CrtYd) (width 0.05))
(fp_line (start -4.2 -4.05) (end -1.75 -4.05) (layer B.CrtYd) (width 0.05))
(fp_line (start -4.2 0.35) (end -4.2 -4.05) (layer B.CrtYd) (width 0.05))
@@ -1046,85 +1556,14 @@
(net 118 /power/BBAT))
(pad 2 smd rect (at -1 -3.45 90) (size 1 3.5) (layers 4_bot B.Paste B.Mask)
(net 47 GND))
- (model ${KISBLIB}/jst.pretty/S2B-PH-SM4-TB.wrl
- (offset (xyz 7.90000948135376 -13.1999988017559 0))
- (scale (xyz 0.393701 0.393701 0.393701))
+ (model ${KISBLIB}/jst.pretty/S2B-PH-SM4-TB.STEP
+ (offset (xyz 7.9 -13.2 0))
+ (scale (xyz 1 1 1))
(rotate (xyz 90 180 0))
)
)
- (module bat_coin:MPD_BU2032SM-BT-G (layer 4_bot) (tedit 58FCF037) (tstamp 53AA25F0)
- (at 96 162 180)
- (path /58CFF3E3/58D008D0)
- (attr smd)
- (fp_text reference BT1 (at -13.6 4.05 180) (layer B.SilkS)
- (effects (font (size 0.6096 0.6096) (thickness 0.12)) (justify mirror))
- )
- (fp_text value BATTERY (at 0 0 180) (layer B.Fab)
- (effects (font (size 0.6096 0.6096) (thickness 0.12)) (justify mirror))
- )
- (fp_line (start -14.3 -3.5) (end -14.3 -2.28) (layer B.SilkS) (width 0.12))
- (fp_line (start -14.3 3.5) (end -14.3 2.28) (layer B.SilkS) (width 0.12))
- (fp_line (start 14.3 -3.5) (end 14.3 -2.28) (layer B.SilkS) (width 0.12))
- (fp_line (start 14.3 3.5) (end 14.3 2.28) (layer B.SilkS) (width 0.12))
- (fp_line (start 16.75 -2.6) (end 14.8 -2.6) (layer B.CrtYd) (width 0.05))
- (fp_line (start 16.75 2.6) (end 16.75 -2.6) (layer B.CrtYd) (width 0.05))
- (fp_line (start 14.8 2.6) (end 16.75 2.6) (layer B.CrtYd) (width 0.05))
- (fp_line (start -14.8 -2.6) (end -14.8 -4) (layer B.CrtYd) (width 0.05))
- (fp_line (start -14.8 -2.6) (end -16.65 -2.6) (layer B.CrtYd) (width 0.05))
- (fp_line (start -16.65 -2.6) (end -16.65 2.6) (layer B.CrtYd) (width 0.05))
- (fp_line (start -16.65 2.6) (end -14.8 2.6) (layer B.CrtYd) (width 0.05))
- (fp_line (start -12 -5) (end -11 -5) (layer B.SilkS) (width 0.12))
- (fp_line (start -11.5 -4.5) (end -11.5 -5.5) (layer B.SilkS) (width 0.12))
- (fp_arc (start 0 0) (end -7.838 -8) (angle -91.1) (layer B.SilkS) (width 0.12))
- (fp_arc (start 0 0) (end 7.838 8) (angle -91.1) (layer B.SilkS) (width 0.12))
- (fp_line (start -7.838 -8) (end 7.838 -8) (layer B.SilkS) (width 0.12))
- (fp_line (start -7.838 8) (end 7.838 8) (layer B.SilkS) (width 0.12))
- (fp_line (start 10.639 3.5) (end 14.3 3.5) (layer B.SilkS) (width 0.12))
- (fp_line (start 14.3 -3.5) (end 10.639 -3.5) (layer B.SilkS) (width 0.12))
- (fp_line (start -10.639 3.5) (end -14.3 3.5) (layer B.SilkS) (width 0.12))
- (fp_line (start -14.3 -3.5) (end -10.639 -3.5) (layer B.SilkS) (width 0.12))
- (fp_arc (start 0 0) (end -6.164 8.5) (angle -71.8) (layer B.CrtYd) (width 0.05))
- (fp_arc (start 0 0) (end 6.164 -8.5) (angle -71.8) (layer B.CrtYd) (width 0.05))
- (fp_arc (start 0 0) (end -8.04 -8.5) (angle -26.6) (layer B.CrtYd) (width 0.05))
- (fp_arc (start 0 0) (end 8.04 8.5) (angle -26.6) (layer B.CrtYd) (width 0.05))
- (fp_arc (start 0 0) (end -10.995 4) (angle -26.5) (layer B.CrtYd) (width 0.05))
- (fp_arc (start 0 0) (end 10.995 -4) (angle -26.5) (layer B.CrtYd) (width 0.05))
- (fp_line (start -8.04 -8.5) (end -6.164 -8.5) (layer B.CrtYd) (width 0.05))
- (fp_line (start 6.164 -8.5) (end 8.04 -8.5) (layer B.CrtYd) (width 0.05))
- (fp_line (start 8.04 8.5) (end 6.164 8.5) (layer B.CrtYd) (width 0.05))
- (fp_line (start -6.164 8.5) (end -8.04 8.5) (layer B.CrtYd) (width 0.05))
- (fp_line (start 10.995 4) (end 14.8 4) (layer B.CrtYd) (width 0.05))
- (fp_line (start 14.8 4) (end 14.8 2.6) (layer B.CrtYd) (width 0.05))
- (fp_line (start 14.8 -4) (end 10.995 -4) (layer B.CrtYd) (width 0.05))
- (fp_line (start -10.995 4) (end -14.8 4) (layer B.CrtYd) (width 0.05))
- (fp_line (start -14.8 4) (end -14.8 2.6) (layer B.CrtYd) (width 0.05))
- (fp_line (start -14.8 -4) (end -10.995 -4) (layer B.CrtYd) (width 0.05))
- (fp_line (start 14.8 -2.6) (end 14.8 -4) (layer B.CrtYd) (width 0.05))
- (fp_line (start -12 -5) (end -11 -5) (layer B.Fab) (width 0.025))
- (fp_line (start -11.5 -4.5) (end -11.5 -5.5) (layer B.Fab) (width 0.025))
- (fp_arc (start 0 0) (end -7.838 -8) (angle -91.1) (layer B.Fab) (width 0.025))
- (fp_arc (start 0 0) (end 7.838 8) (angle -91.1) (layer B.Fab) (width 0.025))
- (fp_line (start -7.838 -8) (end 7.838 -8) (layer B.Fab) (width 0.025))
- (fp_line (start -7.838 8) (end 7.838 8) (layer B.Fab) (width 0.025))
- (fp_line (start 10.639 3.5) (end 14.3 3.5) (layer B.Fab) (width 0.025))
- (fp_line (start 14.3 3.5) (end 14.3 -3.5) (layer B.Fab) (width 0.025))
- (fp_line (start 14.3 -3.5) (end 10.639 -3.5) (layer B.Fab) (width 0.025))
- (fp_line (start -10.639 3.5) (end -14.3 3.5) (layer B.Fab) (width 0.025))
- (fp_line (start -14.3 3.5) (end -14.3 -3.5) (layer B.Fab) (width 0.025))
- (fp_line (start -14.3 -3.5) (end -10.639 -3.5) (layer B.Fab) (width 0.025))
- (pad 1 smd rect (at -14.65 0 180) (size 3.2 4.2) (layers 4_bot B.Paste B.Mask)
- (net 46 /hackrf_if/VBAT))
- (pad 2 smd rect (at 14.65 0 180) (size 3.2 4.2) (layers 4_bot B.Paste B.Mask)
- (net 47 GND))
- (model ${KISBLIB}/bat_coin.pretty/bu2032sm-bt-gtr.wrl
- (at (xyz 0 0 0))
- (scale (xyz 0.393701 0.393701 0.393701))
- (rotate (xyz 270 0 0))
- )
- )
-
- (module cui:CUI_SJ-43516-SMT locked (layer 4_bot) (tedit 58F43AAB) (tstamp 53AA3C96)
+ (module cui:CUI_SJ-43516-SMT locked (layer 4_bot) (tedit 5BD22BC0) (tstamp 53AA3C96)
(at 172.1 114.8 180)
(path /53A8BFC3/53A8C2C6)
(attr smd)
@@ -1134,6 +1573,9 @@
(fp_text value TRRS_SW_JACK (at 0 0 180) (layer B.Fab)
(effects (font (size 0.6096 0.6096) (thickness 0.12)) (justify mirror))
)
+ (fp_text user %R (at 0 0 180) (layer B.Fab)
+ (effects (font (size 1 1) (thickness 0.025)) (justify mirror))
+ )
(fp_line (start -7.75 -2.75) (end -7.75 -5.35) (layer B.CrtYd) (width 0.05))
(fp_line (start -8.75 -2.75) (end -7.75 -2.75) (layer B.CrtYd) (width 0.05))
(fp_line (start -8.75 2.75) (end -8.75 -2.75) (layer B.CrtYd) (width 0.05))
@@ -1202,120 +1644,7 @@
)
)
- (module alps:ALPS_SCHA4B0419 (layer 4_bot) (tedit 58FBA237) (tstamp 58FBAA83)
- (at 68.4 114.6 90)
- (path /53A9129D/53A8C6D0)
- (attr smd)
- (fp_text reference J2 (at -6.5 8.4 90) (layer B.SilkS)
- (effects (font (size 0.6096 0.6096) (thickness 0.12)) (justify mirror))
- )
- (fp_text value MICROSD_DETSW (at 0 0 90) (layer B.Fab)
- (effects (font (size 0.6096 0.6096) (thickness 0.12)) (justify mirror))
- )
- (fp_text user EJECTED (at -0.9 -13.1 90) (layer Cmts.User)
- (effects (font (size 0.2 0.2) (thickness 0.05)))
- )
- (fp_text user INSERTED (at -0.9 -9.8 90) (layer Cmts.User)
- (effects (font (size 0.2 0.2) (thickness 0.05)))
- )
- (fp_text user OVERSTROKE (at -0.9 -8.9 90) (layer Cmts.User)
- (effects (font (size 0.2 0.2) (thickness 0.05)))
- )
- (fp_line (start 7.3 -7.95) (end 7.3 -6.55) (layer B.CrtYd) (width 0.05))
- (fp_line (start 7.3 -6.55) (end 7.1625 -6.55) (layer B.CrtYd) (width 0.05))
- (fp_line (start 7.1625 -6.55) (end 7.1625 7.85) (layer B.CrtYd) (width 0.05))
- (fp_line (start 7.1625 7.85) (end 6.95 7.85) (layer B.CrtYd) (width 0.05))
- (fp_line (start 6.95 7.85) (end 6.95 8.1) (layer B.CrtYd) (width 0.05))
- (fp_line (start 6.95 8.1) (end 5.1 8.1) (layer B.CrtYd) (width 0.05))
- (fp_line (start 5.1 8.1) (end 5.1 7.85) (layer B.CrtYd) (width 0.05))
- (fp_line (start 5.1 7.85) (end 3.45 7.85) (layer B.CrtYd) (width 0.05))
- (fp_line (start 3.45 7.85) (end 3.45 8.1) (layer B.CrtYd) (width 0.05))
- (fp_line (start 3.45 8.1) (end 2.3 8.1) (layer B.CrtYd) (width 0.05))
- (fp_line (start 2.3 8.1) (end 2.3 7.85) (layer B.CrtYd) (width 0.05))
- (fp_line (start 2.3 7.85) (end -2.9 7.85) (layer B.CrtYd) (width 0.05))
- (fp_line (start -2.9 7.85) (end -2.9 8.1) (layer B.CrtYd) (width 0.05))
- (fp_line (start -2.9 8.1) (end -5.6 8.1) (layer B.CrtYd) (width 0.05))
- (fp_line (start -5.6 8.1) (end -5.6 7.85) (layer B.CrtYd) (width 0.05))
- (fp_line (start -5.6 7.85) (end -7.1625 7.85) (layer B.CrtYd) (width 0.05))
- (fp_line (start -7.1625 7.85) (end -7.1625 -0.2) (layer B.CrtYd) (width 0.05))
- (fp_line (start -7.1625 -0.2) (end -7.6 -0.2) (layer B.CrtYd) (width 0.05))
- (fp_line (start -7.6 -0.2) (end -7.6 -5.35) (layer B.CrtYd) (width 0.05))
- (fp_line (start -7.6 -5.35) (end -7.1625 -5.35) (layer B.CrtYd) (width 0.05))
- (fp_line (start -7.1625 -5.35) (end -7.1625 -7.9) (layer B.CrtYd) (width 0.05))
- (fp_line (start -7.1625 -7.9) (end -7.1 -7.9) (layer B.CrtYd) (width 0.05))
- (fp_line (start -7.1 -7.9) (end -7.1 -8) (layer B.CrtYd) (width 0.05))
- (fp_line (start -7.1 -8) (end -5.8 -8) (layer B.CrtYd) (width 0.05))
- (fp_line (start -5.8 -8) (end -5.8 -7.9) (layer B.CrtYd) (width 0.05))
- (fp_line (start -5.8 -7.9) (end 5.85 -7.9) (layer B.CrtYd) (width 0.05))
- (fp_line (start 5.85 -7.9) (end 5.85 -7.95) (layer B.CrtYd) (width 0.05))
- (fp_line (start 5.85 -7.95) (end 7.3 -7.95) (layer B.CrtYd) (width 0.05))
- (fp_line (start 3.38 7.66) (end 5.17 7.66) (layer B.SilkS) (width 0.12))
- (fp_line (start -2.97 7.66) (end 2.37 7.66) (layer B.SilkS) (width 0.12))
- (fp_line (start 6.9725 7.66) (end 6.85 7.66) (layer B.SilkS) (width 0.12))
- (fp_line (start -5.5 -13.25) (end 3.5 -13.25) (layer Cmts.User) (width 0.025))
- (fp_line (start -5.5 -9.95) (end 3.5 -9.95) (layer Cmts.User) (width 0.025))
- (fp_line (start -5.5 -9.05) (end 3.5 -9.06) (layer Cmts.User) (width 0.025))
- (fp_line (start -1.4675 7.45) (end -1.4675 6.6) (layer Cmts.User) (width 0.025))
- (fp_line (start -1.4675 6.6) (end -2.5125 6.6) (layer Cmts.User) (width 0.025))
- (fp_line (start -2.5125 6.6) (end -2.5125 5.2) (layer Cmts.User) (width 0.025))
- (fp_line (start -2.5125 5.2) (end 1.0375 5.2) (layer Cmts.User) (width 0.025))
- (fp_line (start 1.0375 5.2) (end 1.0375 7.45) (layer Cmts.User) (width 0.025))
- (fp_line (start 1.0375 7.45) (end -1.4675 7.45) (layer Cmts.User) (width 0.025))
- (fp_line (start -6.0125 3.45) (end 2.8875 3.45) (layer Cmts.User) (width 0.025))
- (fp_line (start 2.8875 3.45) (end 2.8875 -0.95) (layer Cmts.User) (width 0.025))
- (fp_line (start 2.8875 -0.95) (end -6.0125 -0.95) (layer Cmts.User) (width 0.025))
- (fp_line (start -6.0125 -0.95) (end -6.0125 3.45) (layer Cmts.User) (width 0.025))
- (fp_line (start -6.9725 -6.42) (end -6.9725 -5.26) (layer B.SilkS) (width 0.12))
- (fp_line (start 5.92 -7.71) (end -5.9 -7.71) (layer B.SilkS) (width 0.12))
- (fp_line (start 6.9725 7.66) (end 6.9725 -6.62) (layer B.SilkS) (width 0.12))
- (fp_line (start -6.9725 7.66) (end -5.5 7.66) (layer B.SilkS) (width 0.12))
- (fp_line (start -6.9125 -7.65) (end -6.9125 7.6) (layer B.Fab) (width 0.025))
- (fp_line (start 6.9125 -7.65) (end -6.9125 -7.65) (layer B.Fab) (width 0.025))
- (fp_line (start 6.9125 7.6) (end 6.9125 -7.65) (layer B.Fab) (width 0.025))
- (fp_line (start -6.9125 7.6) (end 6.9125 7.6) (layer B.Fab) (width 0.025))
- (fp_line (start -6.9725 -0.27) (end -6.9725 7.66) (layer B.SilkS) (width 0.12))
- (pad SH smd rect (at -4.7125 7.425 90) (size 1.2 0.85) (layers 4_bot B.Paste B.Mask)
- (net 47 GND))
- (pad A smd rect (at -3.475 7.475 90) (size 0.65 0.75) (layers 4_bot B.Paste B.Mask)
- (net 47 GND))
- (pad B smd rect (at 2.875 7.475 90) (size 0.65 0.75) (layers 4_bot B.Paste B.Mask)
- (net 28 /hackrf_if/SD_CD))
- (pad SH smd rect (at 6.0125 7.425 90) (size 1.3 0.85) (layers 4_bot B.Paste B.Mask)
- (net 47 GND))
- (pad SH smd rect (at -6.46 -7.175 90) (size 0.745 1.15) (layers 4_bot B.Paste B.Mask)
- (net 47 GND))
- (pad SH smd rect (at 6.575 -7.25 90) (size 0.95 0.9) (layers 4_bot B.Paste B.Mask)
- (net 47 GND))
- (pad 0 smd rect (at -3.275 -5.675 90) (size 0.7 0.65) (layers 4_bot B.Paste B.Mask)
- (net 47 GND))
- (pad 0 smd rect (at 0.725 -5.675 90) (size 0.7 0.65) (layers 4_bot B.Paste B.Mask)
- (net 47 GND))
- (pad 1 smd rect (at 2.225 -4.475 90) (size 0.7 0.75) (layers 4_bot B.Paste B.Mask)
- (net 33 /hackrf_if/SD_DAT2))
- (pad 2 smd rect (at 1.225 -4.475 90) (size 0.7 0.75) (layers 4_bot B.Paste B.Mask)
- (net 34 /hackrf_if/SD_DAT3))
- (pad 3 smd rect (at 0.225 -4.475 90) (size 0.7 0.75) (layers 4_bot B.Paste B.Mask)
- (net 30 /hackrf_if/SD_CMD))
- (pad 4 smd rect (at -0.775 -4.475 90) (size 0.7 0.75) (layers 4_bot B.Paste B.Mask)
- (net 121 +3V3))
- (pad 5 smd rect (at -1.775 -4.475 90) (size 0.7 0.75) (layers 4_bot B.Paste B.Mask)
- (net 29 /hackrf_if/SD_CLK))
- (pad 6 smd rect (at -2.775 -4.475 90) (size 0.7 0.75) (layers 4_bot B.Paste B.Mask)
- (net 47 GND))
- (pad 7 smd rect (at -3.775 -4.475 90) (size 0.7 0.75) (layers 4_bot B.Paste B.Mask)
- (net 31 /hackrf_if/SD_DAT0))
- (pad 8 smd rect (at -4.775 -4.475 90) (size 0.7 0.75) (layers 4_bot B.Paste B.Mask)
- (net 32 /hackrf_if/SD_DAT1))
- (pad SH smd rect (at -7.1225 -2.765 90) (size 0.42 4.63) (layers 4_bot B.Paste B.Mask)
- (net 47 GND))
- (model ${KISBLIB}/alps.pretty/SCHA4B0419.wrl
- (offset (xyz 0 7.504988687286377 1.3200125801754))
- (scale (xyz 0.393701 0.393701 0.393701))
- (rotate (xyz 0 0 0))
- )
- )
-
- (module eastrising:ER-TFT024-3 locked (layer 1_top) (tedit 58FE2156) (tstamp 58A5FE6D)
+ (module eastrising:ER-TFT024-3 locked (layer 1_top) (tedit 5BD22D17) (tstamp 58A5FE6D)
(at 95.25 137.5 270)
(path /53A9129D/58A60E03)
(fp_text reference LCD1 (at 16.5 -23.25 270) (layer F.SilkS)
@@ -1324,6 +1653,9 @@
(fp_text value ER-TFT024-3_PANEL (at 0 0 270) (layer F.Fab)
(effects (font (size 0.6096 0.6096) (thickness 0.12)))
)
+ (fp_text user %R (at 0 0 270) (layer F.Fab)
+ (effects (font (size 1 1) (thickness 0.025)))
+ )
(fp_line (start -18.5 20.78) (end -18.5 32.38) (layer B.CrtYd) (width 0.12))
(fp_line (start 18.5 20.78) (end 18.5 32.38) (layer B.CrtYd) (width 0.12))
(fp_line (start -12.75 20.78) (end -18.5 20.78) (layer B.CrtYd) (width 0.12))
@@ -1361,7 +1693,7 @@
)
)
- (module ck:CK_TSWB-3N-CB222_LFS locked (layer 1_top) (tedit 58FE20A6) (tstamp 53AA2AAD)
+ (module ck:CK_TSWB-3N-CB222_LFS locked (layer 1_top) (tedit 5BD22D44) (tstamp 53AA2AAD)
(at 147.5 137.5 90)
(path /53A9129D/53A8C6FD)
(attr smd)
@@ -1371,6 +1703,9 @@
(fp_text value CK_TSWB-3N-CB (at 0 0 90) (layer F.Fab)
(effects (font (size 0.6096 0.6096) (thickness 0.12)))
)
+ (fp_text user %R (at 0 0 90) (layer F.Fab)
+ (effects (font (size 1 1) (thickness 0.025)))
+ )
(fp_circle (center 0 0) (end 11.45 0) (layer F.SilkS) (width 0.12))
(fp_circle (center 0 0) (end 4.05 0) (layer F.SilkS) (width 0.12))
(fp_circle (center 0 0) (end 16 0) (layer F.SilkS) (width 0.12))
@@ -1407,7 +1742,7 @@
(net 41 /hackrf_if/SW_U))
)
- (module ipc_sot:IPC_SOT23-5P95_275X135L40X40N (layer 4_bot) (tedit 58FD8D61) (tstamp 58FBD8CB)
+ (module ipc_sot:IPC_SOT23-5P95_275X135L40X40N (layer 4_bot) (tedit 5BD23001) (tstamp 58FBD8CB)
(at 143.2 108.2)
(path /58CFF3E3/58CFF91A)
(attr smd)
@@ -1417,6 +1752,9 @@
(fp_text value "TCR2EF18,LM(CT" (at 0 0) (layer B.Fab)
(effects (font (size 0.6096 0.6096) (thickness 0.12)) (justify mirror))
)
+ (fp_text user %R (at 0 0 90) (layer B.Fab)
+ (effects (font (size 0.6 0.6) (thickness 0.025)) (justify mirror))
+ )
(fp_line (start -2.105 1.7) (end 2.105 1.7) (layer B.CrtYd) (width 0.05))
(fp_line (start 2.105 1.7) (end 2.105 -1.7) (layer B.CrtYd) (width 0.05))
(fp_line (start 2.105 -1.7) (end -2.105 -1.7) (layer B.CrtYd) (width 0.05))
@@ -1438,14 +1776,14 @@
(net 48 "Net-(C39-Pad1)"))
(pad 5 smd rect (at 1.165 0.95 270) (size 0.59 1.38) (layers 4_bot B.Paste B.Mask)
(net 122 +1V8))
- (model TO_SOT_Packages_SMD.3dshapes/SOT-23-5.wrl
+ (model ${KISYS3DMOD}/Package_TO_SOT_SMD.3dshapes/SOT-23-5.step
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
- (module ipc_resc:IPC_RESCAXS8P80_320X160X60L30X45N (layer 4_bot) (tedit 58FD8CA0) (tstamp 58F95A04)
+ (module ipc_rescax:IPC_RESCAXS8P80_320X160X60L30X45N (layer 4_bot) (tedit 5BD22BE0) (tstamp 5BD11DB9)
(at 154.1 116.7 270)
(path /53A8BFC3/58F9564A)
(attr smd)
@@ -1455,70 +1793,77 @@
(fp_text value 220R (at 0 0 270) (layer B.Fab)
(effects (font (size 0.6096 0.6096) (thickness 0.12)) (justify mirror))
)
- (fp_line (start -1.585 1.89) (end 1.585 1.89) (layer B.CrtYd) (width 0.05))
- (fp_line (start 1.585 1.89) (end 1.585 -1.89) (layer B.CrtYd) (width 0.05))
- (fp_line (start 1.585 -1.89) (end -1.585 -1.89) (layer B.CrtYd) (width 0.05))
- (fp_line (start -1.585 -1.89) (end -1.585 1.89) (layer B.CrtYd) (width 0.05))
- (fp_line (start -0.8 1.82) (end 0.8 1.82) (layer B.SilkS) (width 0.12))
- (fp_line (start 0.8 -1.82) (end -0.8 -1.82) (layer B.SilkS) (width 0.12))
+ (fp_text user %R (at 0 0) (layer B.Fab)
+ (effects (font (size 1 1) (thickness 0.025)) (justify mirror))
+ )
(fp_line (start -0.8 1.6) (end 0.8 1.6) (layer B.Fab) (width 0.025))
(fp_line (start 0.8 1.6) (end 0.8 -1.6) (layer B.Fab) (width 0.025))
(fp_line (start 0.8 -1.6) (end -0.8 -1.6) (layer B.Fab) (width 0.025))
(fp_line (start -0.8 -1.6) (end -0.8 1.6) (layer B.Fab) (width 0.025))
- (pad 1 smd rect (at -0.87 1.3) (size 0.68 0.93) (layers 4_bot B.Paste B.Mask)
+ (fp_line (start -0.175 -1.66) (end 0.175 -1.66) (layer B.SilkS) (width 0.12))
+ (fp_line (start 0.175 1.66) (end -0.175 1.66) (layer B.SilkS) (width 0.12))
+ (fp_line (start -1.485 1.92) (end 1.485 1.92) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 1.485 1.92) (end 1.485 -1.92) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 1.485 -1.92) (end -1.485 -1.92) (layer B.CrtYd) (width 0.05))
+ (fp_line (start -1.485 -1.92) (end -1.485 1.92) (layer B.CrtYd) (width 0.05))
+ (pad 1 smd rect (at -0.795 1.3) (size 0.74 0.88) (layers 4_bot B.Paste B.Mask)
(net 115 /audio/BICK_R))
- (pad 2 smd rect (at -0.87 0.4) (size 0.48 0.93) (layers 4_bot B.Paste B.Mask)
+ (pad 2 smd rect (at -0.795 0.4) (size 0.54 0.88) (layers 4_bot B.Paste B.Mask)
(net 116 /audio/LRCK_R))
- (pad 3 smd rect (at -0.87 -0.4) (size 0.48 0.93) (layers 4_bot B.Paste B.Mask)
+ (pad 3 smd rect (at -0.795 -0.4) (size 0.54 0.88) (layers 4_bot B.Paste B.Mask)
(net 117 /audio/SDTO_R))
- (pad 4 smd rect (at -0.87 -1.3) (size 0.68 0.93) (layers 4_bot B.Paste B.Mask)
+ (pad 4 smd rect (at -0.795 -1.3) (size 0.74 0.88) (layers 4_bot B.Paste B.Mask)
(net 114 /audio/PDN#_R))
- (pad 5 smd rect (at 0.87 -1.3 180) (size 0.68 0.93) (layers 4_bot B.Paste B.Mask)
+ (pad 5 smd rect (at 0.795 -1.3 180) (size 0.74 0.88) (layers 4_bot B.Paste B.Mask)
(net 80 /hackrf_if/AUDIO_RESET#))
- (pad 6 smd rect (at 0.87 -0.4 180) (size 0.48 0.93) (layers 4_bot B.Paste B.Mask)
+ (pad 6 smd rect (at 0.795 -0.4 180) (size 0.54 0.88) (layers 4_bot B.Paste B.Mask)
(net 85 /hackrf_if/I2S0_RX_SDA))
- (pad 7 smd rect (at 0.87 0.4 180) (size 0.48 0.93) (layers 4_bot B.Paste B.Mask)
+ (pad 7 smd rect (at 0.795 0.4 180) (size 0.54 0.88) (layers 4_bot B.Paste B.Mask)
(net 83 /hackrf_if/I2S0_WS))
- (pad 8 smd rect (at 0.87 1.3 180) (size 0.68 0.93) (layers 4_bot B.Paste B.Mask)
+ (pad 8 smd rect (at 0.795 1.3 180) (size 0.74 0.88) (layers 4_bot B.Paste B.Mask)
(net 82 /audio/BICK))
- (model Resistors_SMD.3dshapes/R_Array_Convex_4x0603.wrl
+ (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_Array_Convex_4x0603.step
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
- (module ipc_resc:IPC_RESC1608X55L25N (layer 4_bot) (tedit 58FD8CA7) (tstamp 58F8E7B2)
+ (module ipc_resc:IPC_RESC160X80X55L25N (layer 4_bot) (tedit 5BD22BD7) (tstamp 5BD11CD1)
(at 157.05 114.5 270)
(path /53A8BFC3/58CF5E5F)
+ (attr smd)
(fp_text reference R2 (at 0 -1.25 270) (layer B.SilkS)
(effects (font (size 0.6096 0.6096) (thickness 0.12)) (justify mirror))
)
(fp_text value 10K (at 0 0 270) (layer B.Fab)
(effects (font (size 0.6096 0.6096) (thickness 0.12)) (justify mirror))
)
- (fp_line (start -0.8 0.4) (end 0.8 0.4) (layer B.Fab) (width 0.025))
- (fp_line (start 0.8 0.4) (end 0.8 -0.4) (layer B.Fab) (width 0.025))
- (fp_line (start 0.8 -0.4) (end -0.8 -0.4) (layer B.Fab) (width 0.025))
+ (fp_line (start -1.365 -0.665) (end -1.365 0.665) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 1.365 -0.665) (end -1.365 -0.665) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 1.365 0.665) (end 1.365 -0.665) (layer B.CrtYd) (width 0.05))
+ (fp_line (start -1.365 0.665) (end 1.365 0.665) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 0.245 0.46) (end -0.245 0.46) (layer B.SilkS) (width 0.12))
+ (fp_line (start -0.245 -0.46) (end 0.245 -0.46) (layer B.SilkS) (width 0.12))
(fp_line (start -0.8 -0.4) (end -0.8 0.4) (layer B.Fab) (width 0.025))
- (fp_line (start -0.8 0.645) (end 0.8 0.645) (layer B.SilkS) (width 0.12))
- (fp_line (start 0.8 -0.645) (end -0.8 -0.645) (layer B.SilkS) (width 0.12))
- (fp_line (start -1.465 0.715) (end 1.465 0.715) (layer B.CrtYd) (width 0.05))
- (fp_line (start 1.465 0.715) (end 1.465 -0.715) (layer B.CrtYd) (width 0.05))
- (fp_line (start 1.465 -0.715) (end -1.465 -0.715) (layer B.CrtYd) (width 0.05))
- (fp_line (start -1.465 -0.715) (end -1.465 0.715) (layer B.CrtYd) (width 0.05))
- (pad 1 smd rect (at -0.82 0 270) (size 0.79 0.93) (layers 4_bot B.Paste B.Mask)
- (net 114 /audio/PDN#_R))
- (pad 2 smd rect (at 0.82 0 270) (size 0.79 0.93) (layers 4_bot B.Paste B.Mask)
+ (fp_line (start 0.8 -0.4) (end -0.8 -0.4) (layer B.Fab) (width 0.025))
+ (fp_line (start 0.8 0.4) (end 0.8 -0.4) (layer B.Fab) (width 0.025))
+ (fp_line (start -0.8 0.4) (end 0.8 0.4) (layer B.Fab) (width 0.025))
+ (fp_text user %R (at 0 0 270) (layer B.Fab)
+ (effects (font (size 0.45 0.45) (thickness 0.025)) (justify mirror))
+ )
+ (pad 2 smd rect (at 0.795 0 270) (size 0.74 0.93) (layers 4_bot B.Paste B.Mask)
(net 47 GND))
- (model Resistors_SMD.3dshapes/R_0603.wrl
+ (pad 1 smd rect (at -0.795 0 270) (size 0.74 0.93) (layers 4_bot B.Paste B.Mask)
+ (net 114 /audio/PDN#_R))
+ (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.step
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
- (module ipc_ledc:IPC_LEDC1608X90L40N (layer 4_bot) (tedit 58FD8B04) (tstamp 58F5B137)
+ (module ipc_ledc:IPC_LEDC1608X90L40N (layer 4_bot) (tedit 5BD22C06) (tstamp 58F5B137)
(at 166.6 121.8 180)
(path /58CFF3E3/58F5BA0B)
(fp_text reference D2 (at 1 1.2 180) (layer B.SilkS)
@@ -1527,6 +1872,9 @@
(fp_text value "LED 0603 yellow" (at 0 0 180) (layer B.Fab)
(effects (font (size 0.6096 0.6096) (thickness 0.12)) (justify mirror))
)
+ (fp_text user %R (at 0 0 180) (layer B.Fab)
+ (effects (font (size 0.45 0.45) (thickness 0.025)) (justify mirror))
+ )
(fp_line (start -0.8 0.4) (end 0.8 0.4) (layer B.Fab) (width 0.025))
(fp_line (start 0.8 0.4) (end 0.8 -0.4) (layer B.Fab) (width 0.025))
(fp_line (start 0.8 -0.4) (end -0.8 -0.4) (layer B.Fab) (width 0.025))
@@ -1546,14 +1894,14 @@
(net 112 "Net-(D2-PadC)"))
(pad A smd rect (at 0.76 0 180) (size 0.91 0.93) (layers 4_bot B.Paste B.Mask)
(net 110 "Net-(D2-PadA)"))
- (model LEDs.3dshapes/LED_0603.wrl
+ (model ${KISYS3DMOD}/LED_SMD.3dshapes/LED_0603_1608Metric.step
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
- (rotate (xyz 0 0 180))
+ (rotate (xyz 0 0 0))
)
)
- (module ipc_ledc:IPC_LEDC1608X90L40N (layer 4_bot) (tedit 58FD8AFC) (tstamp 58F5B131)
+ (module ipc_ledc:IPC_LEDC1608X90L40N (layer 4_bot) (tedit 5BD22C09) (tstamp 58F5B131)
(at 166.6 123.3 180)
(path /58CFF3E3/58F5B932)
(fp_text reference D1 (at 1 -1.2 180) (layer B.SilkS)
@@ -1562,6 +1910,9 @@
(fp_text value "LED 0603 green" (at 0 0 180) (layer B.Fab)
(effects (font (size 0.6096 0.6096) (thickness 0.12)) (justify mirror))
)
+ (fp_text user %R (at 0 0 180) (layer B.Fab)
+ (effects (font (size 0.45 0.45) (thickness 0.025)) (justify mirror))
+ )
(fp_line (start -0.8 0.4) (end 0.8 0.4) (layer B.Fab) (width 0.025))
(fp_line (start 0.8 0.4) (end 0.8 -0.4) (layer B.Fab) (width 0.025))
(fp_line (start 0.8 -0.4) (end -0.8 -0.4) (layer B.Fab) (width 0.025))
@@ -1581,14 +1932,14 @@
(net 111 "Net-(D1-PadC)"))
(pad A smd rect (at 0.76 0 180) (size 0.91 0.93) (layers 4_bot B.Paste B.Mask)
(net 109 "Net-(D1-PadA)"))
- (model LEDs.3dshapes/LED_0603.wrl
+ (model ${KISYS3DMOD}/LED_SMD.3dshapes/LED_0603_1608Metric.step
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
- (rotate (xyz 0 0 180))
+ (rotate (xyz 0 0 0))
)
)
- (module ipc_resc:IPC_RESC1608X55L25N (layer 4_bot) (tedit 58FD8B80) (tstamp 58F5BB55)
+ (module ipc_resc:IPC_RESC160X80X55L25N (layer 4_bot) (tedit 5B60D758) (tstamp 5BD11D8D)
(at 161 110.2)
(path /53A8BFC3/53A8C29C)
(attr smd)
@@ -1598,388 +1949,415 @@
(fp_text value 2K2 (at 0 0) (layer B.Fab)
(effects (font (size 0.6096 0.6096) (thickness 0.12)) (justify mirror))
)
+ (fp_text user %R (at 0 0) (layer B.Fab)
+ (effects (font (size 0.45 0.45) (thickness 0.025)) (justify mirror))
+ )
(fp_line (start -0.8 0.4) (end 0.8 0.4) (layer B.Fab) (width 0.025))
(fp_line (start 0.8 0.4) (end 0.8 -0.4) (layer B.Fab) (width 0.025))
(fp_line (start 0.8 -0.4) (end -0.8 -0.4) (layer B.Fab) (width 0.025))
(fp_line (start -0.8 -0.4) (end -0.8 0.4) (layer B.Fab) (width 0.025))
- (fp_line (start -0.8 0.645) (end 0.8 0.645) (layer B.SilkS) (width 0.12))
- (fp_line (start 0.8 -0.645) (end -0.8 -0.645) (layer B.SilkS) (width 0.12))
- (fp_line (start -1.465 0.715) (end 1.465 0.715) (layer B.CrtYd) (width 0.05))
- (fp_line (start 1.465 0.715) (end 1.465 -0.715) (layer B.CrtYd) (width 0.05))
- (fp_line (start 1.465 -0.715) (end -1.465 -0.715) (layer B.CrtYd) (width 0.05))
- (fp_line (start -1.465 -0.715) (end -1.465 0.715) (layer B.CrtYd) (width 0.05))
- (pad 1 smd rect (at -0.82 0) (size 0.79 0.93) (layers 4_bot B.Paste B.Mask)
+ (fp_line (start -0.245 -0.46) (end 0.245 -0.46) (layer B.SilkS) (width 0.12))
+ (fp_line (start 0.245 0.46) (end -0.245 0.46) (layer B.SilkS) (width 0.12))
+ (fp_line (start -1.365 0.665) (end 1.365 0.665) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 1.365 0.665) (end 1.365 -0.665) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 1.365 -0.665) (end -1.365 -0.665) (layer B.CrtYd) (width 0.05))
+ (fp_line (start -1.365 -0.665) (end -1.365 0.665) (layer B.CrtYd) (width 0.05))
+ (pad 1 smd rect (at -0.795 0) (size 0.74 0.93) (layers 4_bot B.Paste B.Mask)
(net 91 "Net-(R18-Pad1)"))
- (pad 2 smd rect (at 0.82 0) (size 0.79 0.93) (layers 4_bot B.Paste B.Mask)
+ (pad 2 smd rect (at 0.795 0) (size 0.74 0.93) (layers 4_bot B.Paste B.Mask)
(net 90 /audio/MIC))
- (model Resistors_SMD.3dshapes/R_0603.wrl
+ (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.step
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
- (module ipc_resc:IPC_RESC1005X40L25N (layer 4_bot) (tedit 58FD8852) (tstamp 58F45B53)
+ (module ipc_resc:IPC_RESC100X50X40L25N (layer 4_bot) (tedit 5BD22CF1) (tstamp 5BD11DAB)
(at 94 145.8 180)
(path /53A9129D/58B751E2)
+ (attr smd)
(fp_text reference R20 (at 0 1 180) (layer B.SilkS)
(effects (font (size 0.6096 0.6096) (thickness 0.12)) (justify mirror))
)
(fp_text value 3K9 (at 0 0 180) (layer B.Fab)
(effects (font (size 0.6096 0.6096) (thickness 0.12)) (justify mirror))
)
+ (fp_text user %R (at 0 0 180) (layer B.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)) (justify mirror))
+ )
(fp_line (start -0.5 0.25) (end 0.5 0.25) (layer B.Fab) (width 0.025))
(fp_line (start 0.5 0.25) (end 0.5 -0.25) (layer B.Fab) (width 0.025))
(fp_line (start 0.5 -0.25) (end -0.5 -0.25) (layer B.Fab) (width 0.025))
(fp_line (start -0.5 -0.25) (end -0.5 0.25) (layer B.Fab) (width 0.025))
- (fp_line (start -0.5 0.48) (end 0.5 0.48) (layer B.SilkS) (width 0.12))
- (fp_line (start 0.5 -0.48) (end -0.5 -0.48) (layer B.SilkS) (width 0.12))
- (fp_line (start -0.85 0.54) (end 0.85 0.54) (layer B.CrtYd) (width 0.05))
- (fp_line (start 0.85 0.54) (end 0.85 -0.54) (layer B.CrtYd) (width 0.05))
- (fp_line (start 0.85 -0.54) (end -0.85 -0.54) (layer B.CrtYd) (width 0.05))
- (fp_line (start -0.85 -0.54) (end -0.85 0.54) (layer B.CrtYd) (width 0.05))
- (pad 1 smd rect (at -0.43 0 180) (size 0.54 0.6) (layers 4_bot B.Paste B.Mask)
+ (fp_line (start -0.9 0.44) (end 0.9 0.44) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 0.9 0.44) (end 0.9 -0.44) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 0.9 -0.44) (end -0.9 -0.44) (layer B.CrtYd) (width 0.05))
+ (fp_line (start -0.9 -0.44) (end -0.9 0.44) (layer B.CrtYd) (width 0.05))
+ (pad 1 smd rect (at -0.46 0 180) (size 0.58 0.58) (layers 4_bot B.Paste B.Mask)
(net 71 "Net-(R20-Pad1)"))
- (pad 2 smd rect (at 0.43 0 180) (size 0.54 0.6) (layers 4_bot B.Paste B.Mask)
+ (pad 2 smd rect (at 0.46 0 180) (size 0.58 0.58) (layers 4_bot B.Paste B.Mask)
(net 47 GND))
- (model Resistors_SMD.3dshapes/R_0402.wrl
+ (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0402_1005Metric.step
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
- (module ipc_resc:IPC_RESC1005X40L25N (layer 4_bot) (tedit 58FD8841) (tstamp 58F45B4E)
- (at 92.6 145.4 270)
+ (module ipc_resc:IPC_RESC100X50X40L25N (layer 4_bot) (tedit 5BD22CED) (tstamp 5BD11D9D)
+ (at 92.6 145.35 270)
(path /53A9129D/53A91657)
+ (attr smd)
(fp_text reference R19 (at -1.8 0 270) (layer B.SilkS)
(effects (font (size 0.6096 0.6096) (thickness 0.12)) (justify mirror))
)
(fp_text value 10K (at 0 0 270) (layer B.Fab)
(effects (font (size 0.6096 0.6096) (thickness 0.12)) (justify mirror))
)
+ (fp_text user %R (at 0 0 270) (layer B.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)) (justify mirror))
+ )
(fp_line (start -0.5 0.25) (end 0.5 0.25) (layer B.Fab) (width 0.025))
(fp_line (start 0.5 0.25) (end 0.5 -0.25) (layer B.Fab) (width 0.025))
(fp_line (start 0.5 -0.25) (end -0.5 -0.25) (layer B.Fab) (width 0.025))
(fp_line (start -0.5 -0.25) (end -0.5 0.25) (layer B.Fab) (width 0.025))
- (fp_line (start -0.5 0.48) (end 0.5 0.48) (layer B.SilkS) (width 0.12))
- (fp_line (start 0.5 -0.48) (end -0.5 -0.48) (layer B.SilkS) (width 0.12))
- (fp_line (start -0.85 0.54) (end 0.85 0.54) (layer B.CrtYd) (width 0.05))
- (fp_line (start 0.85 0.54) (end 0.85 -0.54) (layer B.CrtYd) (width 0.05))
- (fp_line (start 0.85 -0.54) (end -0.85 -0.54) (layer B.CrtYd) (width 0.05))
- (fp_line (start -0.85 -0.54) (end -0.85 0.54) (layer B.CrtYd) (width 0.05))
- (pad 1 smd rect (at -0.43 0 270) (size 0.54 0.6) (layers 4_bot B.Paste B.Mask)
+ (fp_line (start -0.9 0.44) (end 0.9 0.44) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 0.9 0.44) (end 0.9 -0.44) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 0.9 -0.44) (end -0.9 -0.44) (layer B.CrtYd) (width 0.05))
+ (fp_line (start -0.9 -0.44) (end -0.9 0.44) (layer B.CrtYd) (width 0.05))
+ (pad 1 smd rect (at -0.46 0 270) (size 0.58 0.58) (layers 4_bot B.Paste B.Mask)
(net 23 /hackrf_if/LCD_RESET#))
- (pad 2 smd rect (at 0.43 0 270) (size 0.54 0.6) (layers 4_bot B.Paste B.Mask)
+ (pad 2 smd rect (at 0.46 0 270) (size 0.58 0.58) (layers 4_bot B.Paste B.Mask)
(net 47 GND))
- (model Resistors_SMD.3dshapes/R_0402.wrl
+ (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0402_1005Metric.step
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
- (module ipc_resc:IPC_RESC1005X40L25N (layer 4_bot) (tedit 58FD8AE4) (tstamp 58F4592E)
+ (module ipc_resc:IPC_RESC100X50X40L25N (layer 4_bot) (tedit 5BD22C19) (tstamp 5BD11D7F)
(at 167.9 125.15 270)
(path /58CFF3E3/58F44903)
+ (attr smd)
(fp_text reference R14 (at 1.75 1.8 270) (layer B.SilkS)
(effects (font (size 0.6096 0.6096) (thickness 0.12)) (justify mirror))
)
(fp_text value 10K (at 0 0 270) (layer B.Fab)
(effects (font (size 0.6096 0.6096) (thickness 0.12)) (justify mirror))
)
+ (fp_text user %R (at 0 0 270) (layer B.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)) (justify mirror))
+ )
(fp_line (start -0.5 0.25) (end 0.5 0.25) (layer B.Fab) (width 0.025))
(fp_line (start 0.5 0.25) (end 0.5 -0.25) (layer B.Fab) (width 0.025))
(fp_line (start 0.5 -0.25) (end -0.5 -0.25) (layer B.Fab) (width 0.025))
(fp_line (start -0.5 -0.25) (end -0.5 0.25) (layer B.Fab) (width 0.025))
- (fp_line (start -0.5 0.48) (end 0.5 0.48) (layer B.SilkS) (width 0.12))
- (fp_line (start 0.5 -0.48) (end -0.5 -0.48) (layer B.SilkS) (width 0.12))
- (fp_line (start -0.85 0.54) (end 0.85 0.54) (layer B.CrtYd) (width 0.05))
- (fp_line (start 0.85 0.54) (end 0.85 -0.54) (layer B.CrtYd) (width 0.05))
- (fp_line (start 0.85 -0.54) (end -0.85 -0.54) (layer B.CrtYd) (width 0.05))
- (fp_line (start -0.85 -0.54) (end -0.85 0.54) (layer B.CrtYd) (width 0.05))
- (pad 1 smd rect (at -0.43 0 270) (size 0.54 0.6) (layers 4_bot B.Paste B.Mask)
+ (fp_line (start -0.9 0.44) (end 0.9 0.44) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 0.9 0.44) (end 0.9 -0.44) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 0.9 -0.44) (end -0.9 -0.44) (layer B.CrtYd) (width 0.05))
+ (fp_line (start -0.9 -0.44) (end -0.9 0.44) (layer B.CrtYd) (width 0.05))
+ (pad 1 smd rect (at -0.46 0 270) (size 0.58 0.58) (layers 4_bot B.Paste B.Mask)
(net 108 "Net-(R14-Pad1)"))
- (pad 2 smd rect (at 0.43 0 270) (size 0.54 0.6) (layers 4_bot B.Paste B.Mask)
+ (pad 2 smd rect (at 0.46 0 270) (size 0.58 0.58) (layers 4_bot B.Paste B.Mask)
(net 47 GND))
- (model Resistors_SMD.3dshapes/R_0402.wrl
+ (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0402_1005Metric.step
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
- (module ipc_resc:IPC_RESC1005X40L25N (layer 4_bot) (tedit 58FD8A87) (tstamp 58F45924)
+ (module ipc_resc:IPC_RESC100X50X40L25N (layer 4_bot) (tedit 5BD22C2B) (tstamp 5BD11D43)
(at 174.35 125.15 270)
(path /58CFF3E3/58F44562)
+ (attr smd)
(fp_text reference R10 (at -0.05 -2.95 270) (layer B.SilkS)
(effects (font (size 0.6096 0.6096) (thickness 0.12)) (justify mirror))
)
(fp_text value 10K (at 0 0 270) (layer B.Fab)
(effects (font (size 0.6096 0.6096) (thickness 0.12)) (justify mirror))
)
- (fp_line (start -0.5 0.25) (end 0.5 0.25) (layer B.Fab) (width 0.025))
- (fp_line (start 0.5 0.25) (end 0.5 -0.25) (layer B.Fab) (width 0.025))
- (fp_line (start 0.5 -0.25) (end -0.5 -0.25) (layer B.Fab) (width 0.025))
+ (fp_line (start -0.9 -0.44) (end -0.9 0.44) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 0.9 -0.44) (end -0.9 -0.44) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 0.9 0.44) (end 0.9 -0.44) (layer B.CrtYd) (width 0.05))
+ (fp_line (start -0.9 0.44) (end 0.9 0.44) (layer B.CrtYd) (width 0.05))
(fp_line (start -0.5 -0.25) (end -0.5 0.25) (layer B.Fab) (width 0.025))
- (fp_line (start -0.5 0.48) (end 0.5 0.48) (layer B.SilkS) (width 0.12))
- (fp_line (start 0.5 -0.48) (end -0.5 -0.48) (layer B.SilkS) (width 0.12))
- (fp_line (start -0.85 0.54) (end 0.85 0.54) (layer B.CrtYd) (width 0.05))
- (fp_line (start 0.85 0.54) (end 0.85 -0.54) (layer B.CrtYd) (width 0.05))
- (fp_line (start 0.85 -0.54) (end -0.85 -0.54) (layer B.CrtYd) (width 0.05))
- (fp_line (start -0.85 -0.54) (end -0.85 0.54) (layer B.CrtYd) (width 0.05))
- (pad 1 smd rect (at -0.43 0 270) (size 0.54 0.6) (layers 4_bot B.Paste B.Mask)
- (net 106 "Net-(R10-Pad1)"))
- (pad 2 smd rect (at 0.43 0 270) (size 0.54 0.6) (layers 4_bot B.Paste B.Mask)
+ (fp_line (start 0.5 -0.25) (end -0.5 -0.25) (layer B.Fab) (width 0.025))
+ (fp_line (start 0.5 0.25) (end 0.5 -0.25) (layer B.Fab) (width 0.025))
+ (fp_line (start -0.5 0.25) (end 0.5 0.25) (layer B.Fab) (width 0.025))
+ (fp_text user %R (at 0 0 270) (layer B.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)) (justify mirror))
+ )
+ (pad 2 smd rect (at 0.46 0 270) (size 0.58 0.58) (layers 4_bot B.Paste B.Mask)
(net 47 GND))
- (model Resistors_SMD.3dshapes/R_0402.wrl
+ (pad 1 smd rect (at -0.46 0 270) (size 0.58 0.58) (layers 4_bot B.Paste B.Mask)
+ (net 106 "Net-(R10-Pad1)"))
+ (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0402_1005Metric.step
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
- (module ipc_resc:IPC_RESC1005X40L25N (layer 4_bot) (tedit 58FD8AAE) (tstamp 58F4591F)
+ (module ipc_resc:IPC_RESC100X50X40L25N (layer 4_bot) (tedit 5BD22C1E) (tstamp 5BD11D35)
(at 168.2 126.55 180)
(path /58CFF3E3/58F443CF)
+ (attr smd)
(fp_text reference R9 (at 0 -1.05 180) (layer B.SilkS)
(effects (font (size 0.6096 0.6096) (thickness 0.12)) (justify mirror))
)
(fp_text value 10K (at 0 0 180) (layer B.Fab)
(effects (font (size 0.6096 0.6096) (thickness 0.12)) (justify mirror))
)
- (fp_line (start -0.5 0.25) (end 0.5 0.25) (layer B.Fab) (width 0.025))
- (fp_line (start 0.5 0.25) (end 0.5 -0.25) (layer B.Fab) (width 0.025))
- (fp_line (start 0.5 -0.25) (end -0.5 -0.25) (layer B.Fab) (width 0.025))
+ (fp_line (start -0.9 -0.44) (end -0.9 0.44) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 0.9 -0.44) (end -0.9 -0.44) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 0.9 0.44) (end 0.9 -0.44) (layer B.CrtYd) (width 0.05))
+ (fp_line (start -0.9 0.44) (end 0.9 0.44) (layer B.CrtYd) (width 0.05))
(fp_line (start -0.5 -0.25) (end -0.5 0.25) (layer B.Fab) (width 0.025))
- (fp_line (start -0.5 0.48) (end 0.5 0.48) (layer B.SilkS) (width 0.12))
- (fp_line (start 0.5 -0.48) (end -0.5 -0.48) (layer B.SilkS) (width 0.12))
- (fp_line (start -0.85 0.54) (end 0.85 0.54) (layer B.CrtYd) (width 0.05))
- (fp_line (start 0.85 0.54) (end 0.85 -0.54) (layer B.CrtYd) (width 0.05))
- (fp_line (start 0.85 -0.54) (end -0.85 -0.54) (layer B.CrtYd) (width 0.05))
- (fp_line (start -0.85 -0.54) (end -0.85 0.54) (layer B.CrtYd) (width 0.05))
- (pad 1 smd rect (at -0.43 0 180) (size 0.54 0.6) (layers 4_bot B.Paste B.Mask)
- (net 105 "Net-(R9-Pad1)"))
- (pad 2 smd rect (at 0.43 0 180) (size 0.54 0.6) (layers 4_bot B.Paste B.Mask)
+ (fp_line (start 0.5 -0.25) (end -0.5 -0.25) (layer B.Fab) (width 0.025))
+ (fp_line (start 0.5 0.25) (end 0.5 -0.25) (layer B.Fab) (width 0.025))
+ (fp_line (start -0.5 0.25) (end 0.5 0.25) (layer B.Fab) (width 0.025))
+ (fp_text user %R (at 0 0 180) (layer B.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)) (justify mirror))
+ )
+ (pad 2 smd rect (at 0.46 0 180) (size 0.58 0.58) (layers 4_bot B.Paste B.Mask)
(net 47 GND))
- (model Resistors_SMD.3dshapes/R_0402.wrl
+ (pad 1 smd rect (at -0.46 0 180) (size 0.58 0.58) (layers 4_bot B.Paste B.Mask)
+ (net 105 "Net-(R9-Pad1)"))
+ (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0402_1005Metric.step
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
- (module ipc_resc:IPC_RESC1005X40L25N (layer 4_bot) (tedit 58FD8A66) (tstamp 58F4591A)
+ (module ipc_resc:IPC_RESC100X50X40L25N (layer 4_bot) (tedit 5B60D758) (tstamp 5BD11D27)
(at 173.9 128.2)
(path /58CFF3E3/58F1E372)
+ (attr smd)
(fp_text reference R8 (at 1.3 -1) (layer B.SilkS)
(effects (font (size 0.6096 0.6096) (thickness 0.12)) (justify mirror))
)
(fp_text value 10K (at 0 0) (layer B.Fab)
(effects (font (size 0.6096 0.6096) (thickness 0.12)) (justify mirror))
)
- (fp_line (start -0.5 0.25) (end 0.5 0.25) (layer B.Fab) (width 0.025))
- (fp_line (start 0.5 0.25) (end 0.5 -0.25) (layer B.Fab) (width 0.025))
- (fp_line (start 0.5 -0.25) (end -0.5 -0.25) (layer B.Fab) (width 0.025))
+ (fp_line (start -0.9 -0.44) (end -0.9 0.44) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 0.9 -0.44) (end -0.9 -0.44) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 0.9 0.44) (end 0.9 -0.44) (layer B.CrtYd) (width 0.05))
+ (fp_line (start -0.9 0.44) (end 0.9 0.44) (layer B.CrtYd) (width 0.05))
(fp_line (start -0.5 -0.25) (end -0.5 0.25) (layer B.Fab) (width 0.025))
- (fp_line (start -0.5 0.48) (end 0.5 0.48) (layer B.SilkS) (width 0.12))
- (fp_line (start 0.5 -0.48) (end -0.5 -0.48) (layer B.SilkS) (width 0.12))
- (fp_line (start -0.85 0.54) (end 0.85 0.54) (layer B.CrtYd) (width 0.05))
- (fp_line (start 0.85 0.54) (end 0.85 -0.54) (layer B.CrtYd) (width 0.05))
- (fp_line (start 0.85 -0.54) (end -0.85 -0.54) (layer B.CrtYd) (width 0.05))
- (fp_line (start -0.85 -0.54) (end -0.85 0.54) (layer B.CrtYd) (width 0.05))
- (pad 1 smd rect (at -0.43 0) (size 0.54 0.6) (layers 4_bot B.Paste B.Mask)
- (net 104 "Net-(R8-Pad1)"))
- (pad 2 smd rect (at 0.43 0) (size 0.54 0.6) (layers 4_bot B.Paste B.Mask)
+ (fp_line (start 0.5 -0.25) (end -0.5 -0.25) (layer B.Fab) (width 0.025))
+ (fp_line (start 0.5 0.25) (end 0.5 -0.25) (layer B.Fab) (width 0.025))
+ (fp_line (start -0.5 0.25) (end 0.5 0.25) (layer B.Fab) (width 0.025))
+ (fp_text user %R (at 0 0) (layer B.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)) (justify mirror))
+ )
+ (pad 2 smd rect (at 0.46 0) (size 0.58 0.58) (layers 4_bot B.Paste B.Mask)
(net 47 GND))
- (model Resistors_SMD.3dshapes/R_0402.wrl
+ (pad 1 smd rect (at -0.46 0) (size 0.58 0.58) (layers 4_bot B.Paste B.Mask)
+ (net 104 "Net-(R8-Pad1)"))
+ (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0402_1005Metric.step
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
- (module ipc_resc:IPC_RESC1005X40L25N (layer 4_bot) (tedit 58FD8A69) (tstamp 58F45915)
+ (module ipc_resc:IPC_RESC100X50X40L25N (layer 4_bot) (tedit 5BD22C38) (tstamp 5BD11D19)
(at 176.25 128.2)
(path /58CFF3E3/58F1F0EF)
+ (attr smd)
(fp_text reference R7 (at 0.55 -1) (layer B.SilkS)
(effects (font (size 0.6096 0.6096) (thickness 0.12)) (justify mirror))
)
(fp_text value 0R (at 0 0) (layer B.Fab)
(effects (font (size 0.6096 0.6096) (thickness 0.12)) (justify mirror))
)
+ (fp_text user %R (at 0 0) (layer B.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)) (justify mirror))
+ )
(fp_line (start -0.5 0.25) (end 0.5 0.25) (layer B.Fab) (width 0.025))
(fp_line (start 0.5 0.25) (end 0.5 -0.25) (layer B.Fab) (width 0.025))
(fp_line (start 0.5 -0.25) (end -0.5 -0.25) (layer B.Fab) (width 0.025))
(fp_line (start -0.5 -0.25) (end -0.5 0.25) (layer B.Fab) (width 0.025))
- (fp_line (start -0.5 0.48) (end 0.5 0.48) (layer B.SilkS) (width 0.12))
- (fp_line (start 0.5 -0.48) (end -0.5 -0.48) (layer B.SilkS) (width 0.12))
- (fp_line (start -0.85 0.54) (end 0.85 0.54) (layer B.CrtYd) (width 0.05))
- (fp_line (start 0.85 0.54) (end 0.85 -0.54) (layer B.CrtYd) (width 0.05))
- (fp_line (start 0.85 -0.54) (end -0.85 -0.54) (layer B.CrtYd) (width 0.05))
- (fp_line (start -0.85 -0.54) (end -0.85 0.54) (layer B.CrtYd) (width 0.05))
- (pad 1 smd rect (at -0.43 0) (size 0.54 0.6) (layers 4_bot B.Paste B.Mask)
+ (fp_line (start -0.9 0.44) (end 0.9 0.44) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 0.9 0.44) (end 0.9 -0.44) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 0.9 -0.44) (end -0.9 -0.44) (layer B.CrtYd) (width 0.05))
+ (fp_line (start -0.9 -0.44) (end -0.9 0.44) (layer B.CrtYd) (width 0.05))
+ (pad 1 smd rect (at -0.46 0) (size 0.58 0.58) (layers 4_bot B.Paste B.Mask)
(net 99 /hackrf_if/VBUS))
- (pad 2 smd rect (at 0.43 0) (size 0.54 0.6) (layers 4_bot B.Paste B.Mask)
+ (pad 2 smd rect (at 0.46 0) (size 0.58 0.58) (layers 4_bot B.Paste B.Mask)
(net 100 /hackrf_if/VBUSCTRL))
- (model Resistors_SMD.3dshapes/R_0402.wrl
+ (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0402_1005Metric.step
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
- (module ipc_resc:IPC_RESC1005X40L25N (layer 4_bot) (tedit 58FD8A85) (tstamp 58F45910)
+ (module ipc_resc:IPC_RESC100X50X40L25N (layer 4_bot) (tedit 5BD22C28) (tstamp 5BD11D0B)
(at 173.25 125.15 270)
(path /58CFF3E3/58F1CC38)
+ (attr smd)
(fp_text reference R6 (at -0.05 -3.25 270) (layer B.SilkS)
(effects (font (size 0.6096 0.6096) (thickness 0.12)) (justify mirror))
)
(fp_text value 1K8 (at 0 0 270) (layer B.Fab)
(effects (font (size 0.6096 0.6096) (thickness 0.12)) (justify mirror))
)
+ (fp_text user %R (at 0 0 270) (layer B.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)) (justify mirror))
+ )
(fp_line (start -0.5 0.25) (end 0.5 0.25) (layer B.Fab) (width 0.025))
(fp_line (start 0.5 0.25) (end 0.5 -0.25) (layer B.Fab) (width 0.025))
(fp_line (start 0.5 -0.25) (end -0.5 -0.25) (layer B.Fab) (width 0.025))
(fp_line (start -0.5 -0.25) (end -0.5 0.25) (layer B.Fab) (width 0.025))
- (fp_line (start -0.5 0.48) (end 0.5 0.48) (layer B.SilkS) (width 0.12))
- (fp_line (start 0.5 -0.48) (end -0.5 -0.48) (layer B.SilkS) (width 0.12))
- (fp_line (start -0.85 0.54) (end 0.85 0.54) (layer B.CrtYd) (width 0.05))
- (fp_line (start 0.85 0.54) (end 0.85 -0.54) (layer B.CrtYd) (width 0.05))
- (fp_line (start 0.85 -0.54) (end -0.85 -0.54) (layer B.CrtYd) (width 0.05))
- (fp_line (start -0.85 -0.54) (end -0.85 0.54) (layer B.CrtYd) (width 0.05))
- (pad 1 smd rect (at -0.43 0 270) (size 0.54 0.6) (layers 4_bot B.Paste B.Mask)
+ (fp_line (start -0.9 0.44) (end 0.9 0.44) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 0.9 0.44) (end 0.9 -0.44) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 0.9 -0.44) (end -0.9 -0.44) (layer B.CrtYd) (width 0.05))
+ (fp_line (start -0.9 -0.44) (end -0.9 0.44) (layer B.CrtYd) (width 0.05))
+ (pad 1 smd rect (at -0.46 0 270) (size 0.58 0.58) (layers 4_bot B.Paste B.Mask)
(net 103 "Net-(R6-Pad1)"))
- (pad 2 smd rect (at 0.43 0 270) (size 0.54 0.6) (layers 4_bot B.Paste B.Mask)
+ (pad 2 smd rect (at 0.46 0 270) (size 0.58 0.58) (layers 4_bot B.Paste B.Mask)
(net 47 GND))
- (model Resistors_SMD.3dshapes/R_0402.wrl
+ (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0402_1005Metric.step
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
- (module ipc_resc:IPC_RESC1005X40L25N (layer 4_bot) (tedit 58FD8AF2) (tstamp 58F4590B)
- (at 164.55 121.7 270)
+ (module ipc_resc:IPC_RESC100X50X40L25N (layer 4_bot) (tedit 5BD22C0E) (tstamp 5BD206B5)
+ (at 164.55 121.65 270)
(path /58CFF3E3/58F1D207)
+ (attr smd)
(fp_text reference R5 (at 0 1.05 270) (layer B.SilkS)
(effects (font (size 0.6096 0.6096) (thickness 0.12)) (justify mirror))
)
(fp_text value 1K5 (at 0 0 270) (layer B.Fab)
(effects (font (size 0.6096 0.6096) (thickness 0.12)) (justify mirror))
)
+ (fp_text user %R (at 0 0 270) (layer B.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)) (justify mirror))
+ )
(fp_line (start -0.5 0.25) (end 0.5 0.25) (layer B.Fab) (width 0.025))
(fp_line (start 0.5 0.25) (end 0.5 -0.25) (layer B.Fab) (width 0.025))
(fp_line (start 0.5 -0.25) (end -0.5 -0.25) (layer B.Fab) (width 0.025))
(fp_line (start -0.5 -0.25) (end -0.5 0.25) (layer B.Fab) (width 0.025))
- (fp_line (start -0.5 0.48) (end 0.5 0.48) (layer B.SilkS) (width 0.12))
- (fp_line (start 0.5 -0.48) (end -0.5 -0.48) (layer B.SilkS) (width 0.12))
- (fp_line (start -0.85 0.54) (end 0.85 0.54) (layer B.CrtYd) (width 0.05))
- (fp_line (start 0.85 0.54) (end 0.85 -0.54) (layer B.CrtYd) (width 0.05))
- (fp_line (start 0.85 -0.54) (end -0.85 -0.54) (layer B.CrtYd) (width 0.05))
- (fp_line (start -0.85 -0.54) (end -0.85 0.54) (layer B.CrtYd) (width 0.05))
- (pad 1 smd rect (at -0.43 0 270) (size 0.54 0.6) (layers 4_bot B.Paste B.Mask)
+ (fp_line (start -0.9 0.44) (end 0.9 0.44) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 0.9 0.44) (end 0.9 -0.44) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 0.9 -0.44) (end -0.9 -0.44) (layer B.CrtYd) (width 0.05))
+ (fp_line (start -0.9 -0.44) (end -0.9 0.44) (layer B.CrtYd) (width 0.05))
+ (pad 1 smd rect (at -0.46 0 270) (size 0.58 0.58) (layers 4_bot B.Paste B.Mask)
(net 72 /power/AUDIO_SVDD))
- (pad 2 smd rect (at 0.43 0 270) (size 0.54 0.6) (layers 4_bot B.Paste B.Mask)
+ (pad 2 smd rect (at 0.46 0 270) (size 0.58 0.58) (layers 4_bot B.Paste B.Mask)
(net 110 "Net-(D2-PadA)"))
- (model Resistors_SMD.3dshapes/R_0402.wrl
+ (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0402_1005Metric.step
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
- (module ipc_resc:IPC_RESC1005X40L25N (layer 4_bot) (tedit 58FD9028) (tstamp 58F45906)
- (at 172.15 120.9 90)
+ (module ipc_resc:IPC_RESC100X50X40L25N (layer 4_bot) (tedit 5BD22C00) (tstamp 5BD11CEF)
+ (at 172.15 120.85 90)
(path /58CFF3E3/58F1CBFA)
+ (attr smd)
(fp_text reference R4 (at 1.6 1.7 90) (layer B.SilkS)
(effects (font (size 0.6096 0.6096) (thickness 0.12)) (justify mirror))
)
(fp_text value 1K91 (at 0 0 90) (layer B.Fab)
(effects (font (size 0.6096 0.6096) (thickness 0.12)) (justify mirror))
)
- (fp_line (start -0.5 0.25) (end 0.5 0.25) (layer B.Fab) (width 0.025))
- (fp_line (start 0.5 0.25) (end 0.5 -0.25) (layer B.Fab) (width 0.025))
- (fp_line (start 0.5 -0.25) (end -0.5 -0.25) (layer B.Fab) (width 0.025))
- (fp_line (start -0.5 -0.25) (end -0.5 0.25) (layer B.Fab) (width 0.025))
- (fp_line (start -0.5 0.48) (end 0.5 0.48) (layer B.SilkS) (width 0.12))
- (fp_line (start 0.5 -0.48) (end -0.5 -0.48) (layer B.SilkS) (width 0.12))
- (fp_line (start -0.85 0.54) (end 0.85 0.54) (layer B.CrtYd) (width 0.05))
- (fp_line (start 0.85 0.54) (end 0.85 -0.54) (layer B.CrtYd) (width 0.05))
- (fp_line (start 0.85 -0.54) (end -0.85 -0.54) (layer B.CrtYd) (width 0.05))
- (fp_line (start -0.85 -0.54) (end -0.85 0.54) (layer B.CrtYd) (width 0.05))
- (pad 1 smd rect (at -0.43 0 90) (size 0.54 0.6) (layers 4_bot B.Paste B.Mask)
- (net 102 "Net-(R4-Pad1)"))
- (pad 2 smd rect (at 0.43 0 90) (size 0.54 0.6) (layers 4_bot B.Paste B.Mask)
+ (fp_line (start -0.9 -0.44) (end -0.9 0.44) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 0.9 -0.44) (end -0.9 -0.44) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 0.9 0.44) (end 0.9 -0.44) (layer B.CrtYd) (width 0.05))
+ (fp_line (start -0.9 0.44) (end 0.9 0.44) (layer B.CrtYd) (width 0.05))
+ (fp_line (start -0.5 -0.25) (end -0.5 0.25) (layer B.Fab) (width 0.025))
+ (fp_line (start 0.5 -0.25) (end -0.5 -0.25) (layer B.Fab) (width 0.025))
+ (fp_line (start 0.5 0.25) (end 0.5 -0.25) (layer B.Fab) (width 0.025))
+ (fp_line (start -0.5 0.25) (end 0.5 0.25) (layer B.Fab) (width 0.025))
+ (fp_text user %R (at 0 0 90) (layer B.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)) (justify mirror))
+ )
+ (pad 2 smd rect (at 0.46 0 90) (size 0.58 0.58) (layers 4_bot B.Paste B.Mask)
(net 47 GND))
- (model Resistors_SMD.3dshapes/R_0402.wrl
+ (pad 1 smd rect (at -0.46 0 90) (size 0.58 0.58) (layers 4_bot B.Paste B.Mask)
+ (net 102 "Net-(R4-Pad1)"))
+ (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0402_1005Metric.step
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
- (module ipc_resc:IPC_RESC1005X40L25N (layer 4_bot) (tedit 58FD8AEE) (tstamp 58F45901)
- (at 164.55 123.4 90)
+ (module ipc_resc:IPC_RESC100X50X40L25N (layer 4_bot) (tedit 5BD22C12) (tstamp 5BD11CE1)
+ (at 164.55 123.45 90)
(path /58CFF3E3/58F1D0EB)
+ (attr smd)
(fp_text reference R3 (at 0 -1.05 90) (layer B.SilkS)
(effects (font (size 0.6096 0.6096) (thickness 0.12)) (justify mirror))
)
(fp_text value 1K5 (at 0 0 90) (layer B.Fab)
(effects (font (size 0.6096 0.6096) (thickness 0.12)) (justify mirror))
)
- (fp_line (start -0.5 0.25) (end 0.5 0.25) (layer B.Fab) (width 0.025))
- (fp_line (start 0.5 0.25) (end 0.5 -0.25) (layer B.Fab) (width 0.025))
- (fp_line (start 0.5 -0.25) (end -0.5 -0.25) (layer B.Fab) (width 0.025))
+ (fp_line (start -0.9 -0.44) (end -0.9 0.44) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 0.9 -0.44) (end -0.9 -0.44) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 0.9 0.44) (end 0.9 -0.44) (layer B.CrtYd) (width 0.05))
+ (fp_line (start -0.9 0.44) (end 0.9 0.44) (layer B.CrtYd) (width 0.05))
(fp_line (start -0.5 -0.25) (end -0.5 0.25) (layer B.Fab) (width 0.025))
- (fp_line (start -0.5 0.48) (end 0.5 0.48) (layer B.SilkS) (width 0.12))
- (fp_line (start 0.5 -0.48) (end -0.5 -0.48) (layer B.SilkS) (width 0.12))
- (fp_line (start -0.85 0.54) (end 0.85 0.54) (layer B.CrtYd) (width 0.05))
- (fp_line (start 0.85 0.54) (end 0.85 -0.54) (layer B.CrtYd) (width 0.05))
- (fp_line (start 0.85 -0.54) (end -0.85 -0.54) (layer B.CrtYd) (width 0.05))
- (fp_line (start -0.85 -0.54) (end -0.85 0.54) (layer B.CrtYd) (width 0.05))
- (pad 1 smd rect (at -0.43 0 90) (size 0.54 0.6) (layers 4_bot B.Paste B.Mask)
- (net 72 /power/AUDIO_SVDD))
- (pad 2 smd rect (at 0.43 0 90) (size 0.54 0.6) (layers 4_bot B.Paste B.Mask)
+ (fp_line (start 0.5 -0.25) (end -0.5 -0.25) (layer B.Fab) (width 0.025))
+ (fp_line (start 0.5 0.25) (end 0.5 -0.25) (layer B.Fab) (width 0.025))
+ (fp_line (start -0.5 0.25) (end 0.5 0.25) (layer B.Fab) (width 0.025))
+ (fp_text user %R (at 0 0 90) (layer B.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)) (justify mirror))
+ )
+ (pad 2 smd rect (at 0.46 0 90) (size 0.58 0.58) (layers 4_bot B.Paste B.Mask)
(net 109 "Net-(D1-PadA)"))
- (model Resistors_SMD.3dshapes/R_0402.wrl
+ (pad 1 smd rect (at -0.46 0 90) (size 0.58 0.58) (layers 4_bot B.Paste B.Mask)
+ (net 72 /power/AUDIO_SVDD))
+ (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0402_1005Metric.step
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
- (module ipc_resc:IPC_RESC1005X40L25N (layer 4_bot) (tedit 58FD8A9B) (tstamp 58F458F7)
+ (module ipc_resc:IPC_RESC100X50X40L25N (layer 4_bot) (tedit 5BD22C2E) (tstamp 5BD11CC3)
(at 175.45 125.15 270)
(path /58CFF3E3/58F1CB6B)
+ (attr smd)
(fp_text reference R1 (at -0.05 -2.65 270) (layer B.SilkS)
(effects (font (size 0.6096 0.6096) (thickness 0.12)) (justify mirror))
)
(fp_text value R (at 0 0 270) (layer B.Fab)
(effects (font (size 0.6096 0.6096) (thickness 0.12)) (justify mirror))
)
+ (fp_text user %R (at 0 0 270) (layer B.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)) (justify mirror))
+ )
(fp_line (start -0.5 0.25) (end 0.5 0.25) (layer B.Fab) (width 0.025))
(fp_line (start 0.5 0.25) (end 0.5 -0.25) (layer B.Fab) (width 0.025))
(fp_line (start 0.5 -0.25) (end -0.5 -0.25) (layer B.Fab) (width 0.025))
(fp_line (start -0.5 -0.25) (end -0.5 0.25) (layer B.Fab) (width 0.025))
- (fp_line (start -0.5 0.48) (end 0.5 0.48) (layer B.SilkS) (width 0.12))
- (fp_line (start 0.5 -0.48) (end -0.5 -0.48) (layer B.SilkS) (width 0.12))
- (fp_line (start -0.85 0.54) (end 0.85 0.54) (layer B.CrtYd) (width 0.05))
- (fp_line (start 0.85 0.54) (end 0.85 -0.54) (layer B.CrtYd) (width 0.05))
- (fp_line (start 0.85 -0.54) (end -0.85 -0.54) (layer B.CrtYd) (width 0.05))
- (fp_line (start -0.85 -0.54) (end -0.85 0.54) (layer B.CrtYd) (width 0.05))
- (pad 1 smd rect (at -0.43 0 270) (size 0.54 0.6) (layers 4_bot B.Paste B.Mask)
+ (fp_line (start -0.9 0.44) (end 0.9 0.44) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 0.9 0.44) (end 0.9 -0.44) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 0.9 -0.44) (end -0.9 -0.44) (layer B.CrtYd) (width 0.05))
+ (fp_line (start -0.9 -0.44) (end -0.9 0.44) (layer B.CrtYd) (width 0.05))
+ (pad 1 smd rect (at -0.46 0 270) (size 0.58 0.58) (layers 4_bot B.Paste B.Mask)
(net 101 "Net-(R1-Pad1)"))
- (pad 2 smd rect (at 0.43 0 270) (size 0.54 0.6) (layers 4_bot B.Paste B.Mask)
+ (pad 2 smd rect (at 0.46 0 270) (size 0.58 0.58) (layers 4_bot B.Paste B.Mask)
(net 47 GND))
- (model Resistors_SMD.3dshapes/R_0402.wrl
+ (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0402_1005Metric.step
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
- (module ipc_capc:IPC_CAPC1005X55L25N (layer 4_bot) (tedit 58FD8C97) (tstamp 58EB01C7)
+ (module ipc_capc:IPC_CAPC100X50X55L25N (layer 4_bot) (tedit 5BD22BD4) (tstamp 5BD11AA9)
(at 150.4 114.9 270)
(path /53A8BFC3/53A8C6A5)
(attr smd)
@@ -1989,28 +2367,29 @@
(fp_text value 100N (at 0 0 270) (layer B.Fab)
(effects (font (size 0.6096 0.6096) (thickness 0.12)) (justify mirror))
)
+ (fp_text user %R (at 0 0 270) (layer B.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)) (justify mirror))
+ )
(fp_line (start -0.5 0.25) (end 0.5 0.25) (layer B.Fab) (width 0.025))
(fp_line (start 0.5 0.25) (end 0.5 -0.25) (layer B.Fab) (width 0.025))
(fp_line (start 0.5 -0.25) (end -0.5 -0.25) (layer B.Fab) (width 0.025))
(fp_line (start -0.5 -0.25) (end -0.5 0.25) (layer B.Fab) (width 0.025))
- (fp_line (start -0.5 0.48) (end 0.5 0.48) (layer B.SilkS) (width 0.12))
- (fp_line (start 0.5 -0.48) (end -0.5 -0.48) (layer B.SilkS) (width 0.12))
- (fp_line (start -0.85 0.54) (end 0.85 0.54) (layer B.CrtYd) (width 0.05))
- (fp_line (start 0.85 0.54) (end 0.85 -0.54) (layer B.CrtYd) (width 0.05))
- (fp_line (start 0.85 -0.54) (end -0.85 -0.54) (layer B.CrtYd) (width 0.05))
- (fp_line (start -0.85 -0.54) (end -0.85 0.54) (layer B.CrtYd) (width 0.05))
- (pad 1 smd rect (at -0.43 0 270) (size 0.54 0.6) (layers 4_bot B.Paste B.Mask)
+ (fp_line (start -0.9 0.44) (end 0.9 0.44) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 0.9 0.44) (end 0.9 -0.44) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 0.9 -0.44) (end -0.9 -0.44) (layer B.CrtYd) (width 0.05))
+ (fp_line (start -0.9 -0.44) (end -0.9 0.44) (layer B.CrtYd) (width 0.05))
+ (pad 1 smd rect (at -0.46 0 270) (size 0.58 0.58) (layers 4_bot B.Paste B.Mask)
(net 121 +3V3))
- (pad 2 smd rect (at 0.43 0 270) (size 0.54 0.6) (layers 4_bot B.Paste B.Mask)
+ (pad 2 smd rect (at 0.46 0 270) (size 0.58 0.58) (layers 4_bot B.Paste B.Mask)
(net 47 GND))
- (model Capacitors_SMD.3dshapes/C_0402.wrl
+ (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0402_1005Metric.step
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
- (module ipc_capc:IPC_CAPC1005X55L25N (layer 4_bot) (tedit 58FD8C17) (tstamp 58EB01D6)
+ (module ipc_capc:IPC_CAPC100X50X55L25N (layer 4_bot) (tedit 5BD22BC9) (tstamp 5BD11AB7)
(at 148.4 111.4 270)
(path /53A8BFC3/53A8C69F)
(attr smd)
@@ -2020,28 +2399,29 @@
(fp_text value 100N (at 0 0 270) (layer B.Fab)
(effects (font (size 0.6096 0.6096) (thickness 0.12)) (justify mirror))
)
- (fp_line (start -0.5 0.25) (end 0.5 0.25) (layer B.Fab) (width 0.025))
- (fp_line (start 0.5 0.25) (end 0.5 -0.25) (layer B.Fab) (width 0.025))
- (fp_line (start 0.5 -0.25) (end -0.5 -0.25) (layer B.Fab) (width 0.025))
+ (fp_line (start -0.9 -0.44) (end -0.9 0.44) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 0.9 -0.44) (end -0.9 -0.44) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 0.9 0.44) (end 0.9 -0.44) (layer B.CrtYd) (width 0.05))
+ (fp_line (start -0.9 0.44) (end 0.9 0.44) (layer B.CrtYd) (width 0.05))
(fp_line (start -0.5 -0.25) (end -0.5 0.25) (layer B.Fab) (width 0.025))
- (fp_line (start -0.5 0.48) (end 0.5 0.48) (layer B.SilkS) (width 0.12))
- (fp_line (start 0.5 -0.48) (end -0.5 -0.48) (layer B.SilkS) (width 0.12))
- (fp_line (start -0.85 0.54) (end 0.85 0.54) (layer B.CrtYd) (width 0.05))
- (fp_line (start 0.85 0.54) (end 0.85 -0.54) (layer B.CrtYd) (width 0.05))
- (fp_line (start 0.85 -0.54) (end -0.85 -0.54) (layer B.CrtYd) (width 0.05))
- (fp_line (start -0.85 -0.54) (end -0.85 0.54) (layer B.CrtYd) (width 0.05))
- (pad 1 smd rect (at -0.43 0 270) (size 0.54 0.6) (layers 4_bot B.Paste B.Mask)
- (net 122 +1V8))
- (pad 2 smd rect (at 0.43 0 270) (size 0.54 0.6) (layers 4_bot B.Paste B.Mask)
+ (fp_line (start 0.5 -0.25) (end -0.5 -0.25) (layer B.Fab) (width 0.025))
+ (fp_line (start 0.5 0.25) (end 0.5 -0.25) (layer B.Fab) (width 0.025))
+ (fp_line (start -0.5 0.25) (end 0.5 0.25) (layer B.Fab) (width 0.025))
+ (fp_text user %R (at 0 0 270) (layer B.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)) (justify mirror))
+ )
+ (pad 2 smd rect (at 0.46 0 270) (size 0.58 0.58) (layers 4_bot B.Paste B.Mask)
(net 47 GND))
- (model Capacitors_SMD.3dshapes/C_0402.wrl
+ (pad 1 smd rect (at -0.46 0 270) (size 0.58 0.58) (layers 4_bot B.Paste B.Mask)
+ (net 122 +1V8))
+ (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0402_1005Metric.step
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
- (module ipc_capc:IPC_CAPC1005X55L25N (layer 4_bot) (tedit 58FD8B8B) (tstamp 58EB01E5)
+ (module ipc_capc:IPC_CAPC100X50X55L25N (layer 4_bot) (tedit 5BD22B85) (tstamp 5BD11AC5)
(at 153.6 105.3)
(path /53A8BFC3/53A8C6B1)
(attr smd)
@@ -2051,28 +2431,29 @@
(fp_text value 100N (at 0 0) (layer B.Fab)
(effects (font (size 0.6096 0.6096) (thickness 0.12)) (justify mirror))
)
- (fp_line (start -0.5 0.25) (end 0.5 0.25) (layer B.Fab) (width 0.025))
- (fp_line (start 0.5 0.25) (end 0.5 -0.25) (layer B.Fab) (width 0.025))
- (fp_line (start 0.5 -0.25) (end -0.5 -0.25) (layer B.Fab) (width 0.025))
+ (fp_line (start -0.9 -0.44) (end -0.9 0.44) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 0.9 -0.44) (end -0.9 -0.44) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 0.9 0.44) (end 0.9 -0.44) (layer B.CrtYd) (width 0.05))
+ (fp_line (start -0.9 0.44) (end 0.9 0.44) (layer B.CrtYd) (width 0.05))
(fp_line (start -0.5 -0.25) (end -0.5 0.25) (layer B.Fab) (width 0.025))
- (fp_line (start -0.5 0.48) (end 0.5 0.48) (layer B.SilkS) (width 0.12))
- (fp_line (start 0.5 -0.48) (end -0.5 -0.48) (layer B.SilkS) (width 0.12))
- (fp_line (start -0.85 0.54) (end 0.85 0.54) (layer B.CrtYd) (width 0.05))
- (fp_line (start 0.85 0.54) (end 0.85 -0.54) (layer B.CrtYd) (width 0.05))
- (fp_line (start 0.85 -0.54) (end -0.85 -0.54) (layer B.CrtYd) (width 0.05))
- (fp_line (start -0.85 -0.54) (end -0.85 0.54) (layer B.CrtYd) (width 0.05))
- (pad 1 smd rect (at -0.43 0) (size 0.54 0.6) (layers 4_bot B.Paste B.Mask)
- (net 121 +3V3))
- (pad 2 smd rect (at 0.43 0) (size 0.54 0.6) (layers 4_bot B.Paste B.Mask)
+ (fp_line (start 0.5 -0.25) (end -0.5 -0.25) (layer B.Fab) (width 0.025))
+ (fp_line (start 0.5 0.25) (end 0.5 -0.25) (layer B.Fab) (width 0.025))
+ (fp_line (start -0.5 0.25) (end 0.5 0.25) (layer B.Fab) (width 0.025))
+ (fp_text user %R (at 0 0) (layer B.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)) (justify mirror))
+ )
+ (pad 2 smd rect (at 0.46 0) (size 0.58 0.58) (layers 4_bot B.Paste B.Mask)
(net 47 GND))
- (model Capacitors_SMD.3dshapes/C_0402.wrl
+ (pad 1 smd rect (at -0.46 0) (size 0.58 0.58) (layers 4_bot B.Paste B.Mask)
+ (net 121 +3V3))
+ (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0402_1005Metric.step
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
- (module ipc_capc:IPC_CAPC1005X55L25N (layer 4_bot) (tedit 58FD8C8C) (tstamp 58EB01F4)
+ (module ipc_capc:IPC_CAPC100X50X55L25N (layer 4_bot) (tedit 5BD22BCE) (tstamp 5BD11AD3)
(at 148.4 114.2 180)
(path /53A8BFC3/53A8C6AB)
(attr smd)
@@ -2082,28 +2463,29 @@
(fp_text value 100N (at 0 0 180) (layer B.Fab)
(effects (font (size 0.6096 0.6096) (thickness 0.12)) (justify mirror))
)
- (fp_line (start -0.5 0.25) (end 0.5 0.25) (layer B.Fab) (width 0.025))
- (fp_line (start 0.5 0.25) (end 0.5 -0.25) (layer B.Fab) (width 0.025))
- (fp_line (start 0.5 -0.25) (end -0.5 -0.25) (layer B.Fab) (width 0.025))
+ (fp_line (start -0.9 -0.44) (end -0.9 0.44) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 0.9 -0.44) (end -0.9 -0.44) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 0.9 0.44) (end 0.9 -0.44) (layer B.CrtYd) (width 0.05))
+ (fp_line (start -0.9 0.44) (end 0.9 0.44) (layer B.CrtYd) (width 0.05))
(fp_line (start -0.5 -0.25) (end -0.5 0.25) (layer B.Fab) (width 0.025))
- (fp_line (start -0.5 0.48) (end 0.5 0.48) (layer B.SilkS) (width 0.12))
- (fp_line (start 0.5 -0.48) (end -0.5 -0.48) (layer B.SilkS) (width 0.12))
- (fp_line (start -0.85 0.54) (end 0.85 0.54) (layer B.CrtYd) (width 0.05))
- (fp_line (start 0.85 0.54) (end 0.85 -0.54) (layer B.CrtYd) (width 0.05))
- (fp_line (start 0.85 -0.54) (end -0.85 -0.54) (layer B.CrtYd) (width 0.05))
- (fp_line (start -0.85 -0.54) (end -0.85 0.54) (layer B.CrtYd) (width 0.05))
- (pad 1 smd rect (at -0.43 0 180) (size 0.54 0.6) (layers 4_bot B.Paste B.Mask)
- (net 72 /power/AUDIO_SVDD))
- (pad 2 smd rect (at 0.43 0 180) (size 0.54 0.6) (layers 4_bot B.Paste B.Mask)
+ (fp_line (start 0.5 -0.25) (end -0.5 -0.25) (layer B.Fab) (width 0.025))
+ (fp_line (start 0.5 0.25) (end 0.5 -0.25) (layer B.Fab) (width 0.025))
+ (fp_line (start -0.5 0.25) (end 0.5 0.25) (layer B.Fab) (width 0.025))
+ (fp_text user %R (at 0 0 180) (layer B.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)) (justify mirror))
+ )
+ (pad 2 smd rect (at 0.46 0 180) (size 0.58 0.58) (layers 4_bot B.Paste B.Mask)
(net 47 GND))
- (model Capacitors_SMD.3dshapes/C_0402.wrl
+ (pad 1 smd rect (at -0.46 0 180) (size 0.58 0.58) (layers 4_bot B.Paste B.Mask)
+ (net 72 /power/AUDIO_SVDD))
+ (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0402_1005Metric.step
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
- (module ipc_capc:IPC_CAPC1005X55L25N (layer 4_bot) (tedit 58FD8DC8) (tstamp 58EB02C6)
+ (module ipc_capc:IPC_CAPC100X50X55L25N (layer 4_bot) (tedit 5BD22B58) (tstamp 5BD11BC1)
(at 77.5 116.4)
(path /53A9129D/53AA73CE)
(attr smd)
@@ -2113,28 +2495,29 @@
(fp_text value 100N (at 0 0) (layer B.Fab)
(effects (font (size 0.6096 0.6096) (thickness 0.12)) (justify mirror))
)
+ (fp_text user %R (at 0 0) (layer B.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)) (justify mirror))
+ )
(fp_line (start -0.5 0.25) (end 0.5 0.25) (layer B.Fab) (width 0.025))
(fp_line (start 0.5 0.25) (end 0.5 -0.25) (layer B.Fab) (width 0.025))
(fp_line (start 0.5 -0.25) (end -0.5 -0.25) (layer B.Fab) (width 0.025))
(fp_line (start -0.5 -0.25) (end -0.5 0.25) (layer B.Fab) (width 0.025))
- (fp_line (start -0.5 0.48) (end 0.5 0.48) (layer B.SilkS) (width 0.12))
- (fp_line (start 0.5 -0.48) (end -0.5 -0.48) (layer B.SilkS) (width 0.12))
- (fp_line (start -0.85 0.54) (end 0.85 0.54) (layer B.CrtYd) (width 0.05))
- (fp_line (start 0.85 0.54) (end 0.85 -0.54) (layer B.CrtYd) (width 0.05))
- (fp_line (start 0.85 -0.54) (end -0.85 -0.54) (layer B.CrtYd) (width 0.05))
- (fp_line (start -0.85 -0.54) (end -0.85 0.54) (layer B.CrtYd) (width 0.05))
- (pad 1 smd rect (at -0.43 0) (size 0.54 0.6) (layers 4_bot B.Paste B.Mask)
+ (fp_line (start -0.9 0.44) (end 0.9 0.44) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 0.9 0.44) (end 0.9 -0.44) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 0.9 -0.44) (end -0.9 -0.44) (layer B.CrtYd) (width 0.05))
+ (fp_line (start -0.9 -0.44) (end -0.9 0.44) (layer B.CrtYd) (width 0.05))
+ (pad 1 smd rect (at -0.46 0) (size 0.58 0.58) (layers 4_bot B.Paste B.Mask)
(net 121 +3V3))
- (pad 2 smd rect (at 0.43 0) (size 0.54 0.6) (layers 4_bot B.Paste B.Mask)
+ (pad 2 smd rect (at 0.46 0) (size 0.58 0.58) (layers 4_bot B.Paste B.Mask)
(net 47 GND))
- (model Capacitors_SMD.3dshapes/C_0402.wrl
+ (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0402_1005Metric.step
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
- (module ipc_capc:IPC_CAPC1005X55L25N (layer 4_bot) (tedit 58FD88BF) (tstamp 58EB02D5)
+ (module ipc_capc:IPC_CAPC100X50X55L25N (layer 4_bot) (tedit 5B60D756) (tstamp 5BD11BCF)
(at 112.8 143.8)
(path /53A8C780/53A8D527)
(attr smd)
@@ -2144,28 +2527,29 @@
(fp_text value 100N (at 0 0) (layer B.Fab)
(effects (font (size 0.6096 0.6096) (thickness 0.12)) (justify mirror))
)
+ (fp_text user %R (at 0 0) (layer B.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)) (justify mirror))
+ )
(fp_line (start -0.5 0.25) (end 0.5 0.25) (layer B.Fab) (width 0.025))
(fp_line (start 0.5 0.25) (end 0.5 -0.25) (layer B.Fab) (width 0.025))
(fp_line (start 0.5 -0.25) (end -0.5 -0.25) (layer B.Fab) (width 0.025))
(fp_line (start -0.5 -0.25) (end -0.5 0.25) (layer B.Fab) (width 0.025))
- (fp_line (start -0.5 0.48) (end 0.5 0.48) (layer B.SilkS) (width 0.12))
- (fp_line (start 0.5 -0.48) (end -0.5 -0.48) (layer B.SilkS) (width 0.12))
- (fp_line (start -0.85 0.54) (end 0.85 0.54) (layer B.CrtYd) (width 0.05))
- (fp_line (start 0.85 0.54) (end 0.85 -0.54) (layer B.CrtYd) (width 0.05))
- (fp_line (start 0.85 -0.54) (end -0.85 -0.54) (layer B.CrtYd) (width 0.05))
- (fp_line (start -0.85 -0.54) (end -0.85 0.54) (layer B.CrtYd) (width 0.05))
- (pad 1 smd rect (at -0.43 0) (size 0.54 0.6) (layers 4_bot B.Paste B.Mask)
+ (fp_line (start -0.9 0.44) (end 0.9 0.44) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 0.9 0.44) (end 0.9 -0.44) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 0.9 -0.44) (end -0.9 -0.44) (layer B.CrtYd) (width 0.05))
+ (fp_line (start -0.9 -0.44) (end -0.9 0.44) (layer B.CrtYd) (width 0.05))
+ (pad 1 smd rect (at -0.46 0) (size 0.58 0.58) (layers 4_bot B.Paste B.Mask)
(net 121 +3V3))
- (pad 2 smd rect (at 0.43 0) (size 0.54 0.6) (layers 4_bot B.Paste B.Mask)
+ (pad 2 smd rect (at 0.46 0) (size 0.58 0.58) (layers 4_bot B.Paste B.Mask)
(net 47 GND))
- (model Capacitors_SMD.3dshapes/C_0402.wrl
+ (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0402_1005Metric.step
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
- (module ipc_capc:IPC_CAPC1005X55L25N (layer 4_bot) (tedit 58FD887E) (tstamp 58EB02E4)
+ (module ipc_capc:IPC_CAPC100X50X55L25N (layer 4_bot) (tedit 5BD22D1D) (tstamp 5BD11BDD)
(at 98 134 180)
(path /53A8C780/53A8D548)
(attr smd)
@@ -2175,29 +2559,30 @@
(fp_text value 100N (at 0 0 180) (layer B.Fab)
(effects (font (size 0.6096 0.6096) (thickness 0.12)) (justify mirror))
)
+ (fp_text user %R (at 0 0 180) (layer B.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)) (justify mirror))
+ )
(fp_line (start -0.5 0.25) (end 0.5 0.25) (layer B.Fab) (width 0.025))
(fp_line (start 0.5 0.25) (end 0.5 -0.25) (layer B.Fab) (width 0.025))
(fp_line (start 0.5 -0.25) (end -0.5 -0.25) (layer B.Fab) (width 0.025))
(fp_line (start -0.5 -0.25) (end -0.5 0.25) (layer B.Fab) (width 0.025))
- (fp_line (start -0.5 0.48) (end 0.5 0.48) (layer B.SilkS) (width 0.12))
- (fp_line (start 0.5 -0.48) (end -0.5 -0.48) (layer B.SilkS) (width 0.12))
- (fp_line (start -0.85 0.54) (end 0.85 0.54) (layer B.CrtYd) (width 0.05))
- (fp_line (start 0.85 0.54) (end 0.85 -0.54) (layer B.CrtYd) (width 0.05))
- (fp_line (start 0.85 -0.54) (end -0.85 -0.54) (layer B.CrtYd) (width 0.05))
- (fp_line (start -0.85 -0.54) (end -0.85 0.54) (layer B.CrtYd) (width 0.05))
- (pad 1 smd rect (at -0.43 0 180) (size 0.54 0.6) (layers 4_bot B.Paste B.Mask)
+ (fp_line (start -0.9 0.44) (end 0.9 0.44) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 0.9 0.44) (end 0.9 -0.44) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 0.9 -0.44) (end -0.9 -0.44) (layer B.CrtYd) (width 0.05))
+ (fp_line (start -0.9 -0.44) (end -0.9 0.44) (layer B.CrtYd) (width 0.05))
+ (pad 1 smd rect (at -0.46 0 180) (size 0.58 0.58) (layers 4_bot B.Paste B.Mask)
(net 122 +1V8))
- (pad 2 smd rect (at 0.43 0 180) (size 0.54 0.6) (layers 4_bot B.Paste B.Mask)
+ (pad 2 smd rect (at 0.46 0 180) (size 0.58 0.58) (layers 4_bot B.Paste B.Mask)
(net 47 GND))
- (model Capacitors_SMD.3dshapes/C_0402.wrl
+ (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0402_1005Metric.step
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
- (module ipc_capc:IPC_CAPC1005X55L25N (layer 4_bot) (tedit 58FD88AC) (tstamp 58EB02F3)
- (at 110.5 132.4 315)
+ (module ipc_capc:IPC_CAPC100X50X55L25N (layer 4_bot) (tedit 5BD22B0E) (tstamp 5BD11BEB)
+ (at 110.45 132.35 315)
(path /53A8C780/53A8D542)
(attr smd)
(fp_text reference C30 (at -1.838478 0 315) (layer B.SilkS)
@@ -2206,28 +2591,29 @@
(fp_text value 100N (at 0 0 315) (layer B.Fab)
(effects (font (size 0.6096 0.6096) (thickness 0.12)) (justify mirror))
)
- (fp_line (start -0.5 0.25) (end 0.5 0.25) (layer B.Fab) (width 0.025))
- (fp_line (start 0.5 0.25) (end 0.5 -0.25) (layer B.Fab) (width 0.025))
- (fp_line (start 0.5 -0.25) (end -0.5 -0.25) (layer B.Fab) (width 0.025))
+ (fp_line (start -0.9 -0.44) (end -0.9 0.44) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 0.9 -0.44) (end -0.9 -0.44) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 0.9 0.44) (end 0.9 -0.44) (layer B.CrtYd) (width 0.05))
+ (fp_line (start -0.9 0.44) (end 0.9 0.44) (layer B.CrtYd) (width 0.05))
(fp_line (start -0.5 -0.25) (end -0.5 0.25) (layer B.Fab) (width 0.025))
- (fp_line (start -0.5 0.48) (end 0.5 0.48) (layer B.SilkS) (width 0.12))
- (fp_line (start 0.5 -0.48) (end -0.5 -0.48) (layer B.SilkS) (width 0.12))
- (fp_line (start -0.85 0.54) (end 0.85 0.54) (layer B.CrtYd) (width 0.05))
- (fp_line (start 0.85 0.54) (end 0.85 -0.54) (layer B.CrtYd) (width 0.05))
- (fp_line (start 0.85 -0.54) (end -0.85 -0.54) (layer B.CrtYd) (width 0.05))
- (fp_line (start -0.85 -0.54) (end -0.85 0.54) (layer B.CrtYd) (width 0.05))
- (pad 1 smd rect (at -0.43 0 315) (size 0.54 0.6) (layers 4_bot B.Paste B.Mask)
- (net 121 +3V3))
- (pad 2 smd rect (at 0.43 0 315) (size 0.54 0.6) (layers 4_bot B.Paste B.Mask)
+ (fp_line (start 0.5 -0.25) (end -0.5 -0.25) (layer B.Fab) (width 0.025))
+ (fp_line (start 0.5 0.25) (end 0.5 -0.25) (layer B.Fab) (width 0.025))
+ (fp_line (start -0.5 0.25) (end 0.5 0.25) (layer B.Fab) (width 0.025))
+ (fp_text user %R (at 0 0 315) (layer B.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)) (justify mirror))
+ )
+ (pad 2 smd rect (at 0.46 0 315) (size 0.58 0.58) (layers 4_bot B.Paste B.Mask)
(net 47 GND))
- (model Capacitors_SMD.3dshapes/C_0402.wrl
+ (pad 1 smd rect (at -0.46 0 315) (size 0.58 0.58) (layers 4_bot B.Paste B.Mask)
+ (net 121 +3V3))
+ (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0402_1005Metric.step
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
- (module ipc_capc:IPC_CAPC1005X55L25N (layer 4_bot) (tedit 58FD8866) (tstamp 58EB0302)
+ (module ipc_capc:IPC_CAPC100X50X55L25N (layer 4_bot) (tedit 5BD22B27) (tstamp 5BD11BF9)
(at 101.5 145.2 315)
(path /53A8C780/53A8D54E)
(attr smd)
@@ -2237,29 +2623,30 @@
(fp_text value 100N (at 0 0 315) (layer B.Fab)
(effects (font (size 0.6096 0.6096) (thickness 0.12)) (justify mirror))
)
- (fp_line (start -0.5 0.25) (end 0.5 0.25) (layer B.Fab) (width 0.025))
- (fp_line (start 0.5 0.25) (end 0.5 -0.25) (layer B.Fab) (width 0.025))
- (fp_line (start 0.5 -0.25) (end -0.5 -0.25) (layer B.Fab) (width 0.025))
+ (fp_line (start -0.9 -0.44) (end -0.9 0.44) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 0.9 -0.44) (end -0.9 -0.44) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 0.9 0.44) (end 0.9 -0.44) (layer B.CrtYd) (width 0.05))
+ (fp_line (start -0.9 0.44) (end 0.9 0.44) (layer B.CrtYd) (width 0.05))
(fp_line (start -0.5 -0.25) (end -0.5 0.25) (layer B.Fab) (width 0.025))
- (fp_line (start -0.5 0.48) (end 0.5 0.48) (layer B.SilkS) (width 0.12))
- (fp_line (start 0.5 -0.48) (end -0.5 -0.48) (layer B.SilkS) (width 0.12))
- (fp_line (start -0.85 0.54) (end 0.85 0.54) (layer B.CrtYd) (width 0.05))
- (fp_line (start 0.85 0.54) (end 0.85 -0.54) (layer B.CrtYd) (width 0.05))
- (fp_line (start 0.85 -0.54) (end -0.85 -0.54) (layer B.CrtYd) (width 0.05))
- (fp_line (start -0.85 -0.54) (end -0.85 0.54) (layer B.CrtYd) (width 0.05))
- (pad 1 smd rect (at -0.43 0 315) (size 0.54 0.6) (layers 4_bot B.Paste B.Mask)
- (net 122 +1V8))
- (pad 2 smd rect (at 0.43 0 315) (size 0.54 0.6) (layers 4_bot B.Paste B.Mask)
+ (fp_line (start 0.5 -0.25) (end -0.5 -0.25) (layer B.Fab) (width 0.025))
+ (fp_line (start 0.5 0.25) (end 0.5 -0.25) (layer B.Fab) (width 0.025))
+ (fp_line (start -0.5 0.25) (end 0.5 0.25) (layer B.Fab) (width 0.025))
+ (fp_text user %R (at 0 0 315) (layer B.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)) (justify mirror))
+ )
+ (pad 2 smd rect (at 0.46 0 315) (size 0.58 0.58) (layers 4_bot B.Paste B.Mask)
(net 47 GND))
- (model Capacitors_SMD.3dshapes/C_0402.wrl
+ (pad 1 smd rect (at -0.46 0 315) (size 0.58 0.58) (layers 4_bot B.Paste B.Mask)
+ (net 122 +1V8))
+ (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0402_1005Metric.step
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
- (module ipc_capc:IPC_CAPC1005X55L25N (layer 4_bot) (tedit 58FD88A2) (tstamp 58EB0320)
- (at 109.4 133.5 135)
+ (module ipc_capc:IPC_CAPC100X50X55L25N (layer 4_bot) (tedit 5BD22B06) (tstamp 5BD11C17)
+ (at 109.35 133.45 135)
(path /53A8C780/53A8D56C)
(attr smd)
(fp_text reference C33 (at 1.838478 0 135) (layer B.SilkS)
@@ -2268,28 +2655,29 @@
(fp_text value 100N (at 0 0 135) (layer B.Fab)
(effects (font (size 0.6096 0.6096) (thickness 0.12)) (justify mirror))
)
+ (fp_text user %R (at 0 0 135) (layer B.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)) (justify mirror))
+ )
(fp_line (start -0.5 0.25) (end 0.5 0.25) (layer B.Fab) (width 0.025))
(fp_line (start 0.5 0.25) (end 0.5 -0.25) (layer B.Fab) (width 0.025))
(fp_line (start 0.5 -0.25) (end -0.5 -0.25) (layer B.Fab) (width 0.025))
(fp_line (start -0.5 -0.25) (end -0.5 0.25) (layer B.Fab) (width 0.025))
- (fp_line (start -0.5 0.48) (end 0.5 0.48) (layer B.SilkS) (width 0.12))
- (fp_line (start 0.5 -0.48) (end -0.5 -0.48) (layer B.SilkS) (width 0.12))
- (fp_line (start -0.85 0.54) (end 0.85 0.54) (layer B.CrtYd) (width 0.05))
- (fp_line (start 0.85 0.54) (end 0.85 -0.54) (layer B.CrtYd) (width 0.05))
- (fp_line (start 0.85 -0.54) (end -0.85 -0.54) (layer B.CrtYd) (width 0.05))
- (fp_line (start -0.85 -0.54) (end -0.85 0.54) (layer B.CrtYd) (width 0.05))
- (pad 1 smd rect (at -0.43 0 135) (size 0.54 0.6) (layers 4_bot B.Paste B.Mask)
+ (fp_line (start -0.9 0.44) (end 0.9 0.44) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 0.9 0.44) (end 0.9 -0.44) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 0.9 -0.44) (end -0.9 -0.44) (layer B.CrtYd) (width 0.05))
+ (fp_line (start -0.9 -0.44) (end -0.9 0.44) (layer B.CrtYd) (width 0.05))
+ (pad 1 smd rect (at -0.46 0 135) (size 0.58 0.58) (layers 4_bot B.Paste B.Mask)
(net 122 +1V8))
- (pad 2 smd rect (at 0.43 0 135) (size 0.54 0.6) (layers 4_bot B.Paste B.Mask)
+ (pad 2 smd rect (at 0.46 0 135) (size 0.58 0.58) (layers 4_bot B.Paste B.Mask)
(net 47 GND))
- (model Capacitors_SMD.3dshapes/C_0402.wrl
+ (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0402_1005Metric.step
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
- (module ipc_capc:IPC_CAPC1005X55L25N (layer 4_bot) (tedit 58FD8888) (tstamp 58EB033E)
+ (module ipc_capc:IPC_CAPC100X50X55L25N (layer 4_bot) (tedit 5BD22CE9) (tstamp 5BD11C35)
(at 92.8 129.6 90)
(path /53A8C780/53A8D572)
(attr smd)
@@ -2299,58 +2687,63 @@
(fp_text value 100N (at 0 0 90) (layer B.Fab)
(effects (font (size 0.6096 0.6096) (thickness 0.12)) (justify mirror))
)
+ (fp_text user %R (at 0 0 90) (layer B.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)) (justify mirror))
+ )
(fp_line (start -0.5 0.25) (end 0.5 0.25) (layer B.Fab) (width 0.025))
(fp_line (start 0.5 0.25) (end 0.5 -0.25) (layer B.Fab) (width 0.025))
(fp_line (start 0.5 -0.25) (end -0.5 -0.25) (layer B.Fab) (width 0.025))
(fp_line (start -0.5 -0.25) (end -0.5 0.25) (layer B.Fab) (width 0.025))
- (fp_line (start -0.5 0.48) (end 0.5 0.48) (layer B.SilkS) (width 0.12))
- (fp_line (start 0.5 -0.48) (end -0.5 -0.48) (layer B.SilkS) (width 0.12))
- (fp_line (start -0.85 0.54) (end 0.85 0.54) (layer B.CrtYd) (width 0.05))
- (fp_line (start 0.85 0.54) (end 0.85 -0.54) (layer B.CrtYd) (width 0.05))
- (fp_line (start 0.85 -0.54) (end -0.85 -0.54) (layer B.CrtYd) (width 0.05))
- (fp_line (start -0.85 -0.54) (end -0.85 0.54) (layer B.CrtYd) (width 0.05))
- (pad 1 smd rect (at -0.43 0 90) (size 0.54 0.6) (layers 4_bot B.Paste B.Mask)
+ (fp_line (start -0.9 0.44) (end 0.9 0.44) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 0.9 0.44) (end 0.9 -0.44) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 0.9 -0.44) (end -0.9 -0.44) (layer B.CrtYd) (width 0.05))
+ (fp_line (start -0.9 -0.44) (end -0.9 0.44) (layer B.CrtYd) (width 0.05))
+ (pad 1 smd rect (at -0.46 0 90) (size 0.58 0.58) (layers 4_bot B.Paste B.Mask)
(net 122 +1V8))
- (pad 2 smd rect (at 0.43 0 90) (size 0.54 0.6) (layers 4_bot B.Paste B.Mask)
+ (pad 2 smd rect (at 0.46 0 90) (size 0.58 0.58) (layers 4_bot B.Paste B.Mask)
(net 47 GND))
- (model Capacitors_SMD.3dshapes/C_0402.wrl
+ (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0402_1005Metric.step
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
- (module ipc_capc:IPC_CAPC2012X135L45N (layer 4_bot) (tedit 58FD89F8) (tstamp 58EB0398)
+ (module ipc_capc:IPC_CAPC200X125X135L45N (layer 4_bot) (tedit 5BD22C49) (tstamp 5BD11C93)
(at 173.6 158.7 180)
(path /58CFF3E3/58D008E2)
+ (attr smd)
(fp_text reference C41 (at -2.6 0 180) (layer B.SilkS)
(effects (font (size 0.6096 0.6096) (thickness 0.12)) (justify mirror))
)
(fp_text value 10U (at 0 0 180) (layer B.Fab)
(effects (font (size 0.6096 0.6096) (thickness 0.12)) (justify mirror))
)
- (fp_line (start -1 0.625) (end 1 0.625) (layer B.Fab) (width 0.025))
- (fp_line (start 1 0.625) (end 1 -0.625) (layer B.Fab) (width 0.025))
- (fp_line (start 1 -0.625) (end -1 -0.625) (layer B.Fab) (width 0.025))
+ (fp_line (start -1.565 -0.89) (end -1.565 0.89) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 1.565 -0.89) (end -1.565 -0.89) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 1.565 0.89) (end 1.565 -0.89) (layer B.CrtYd) (width 0.05))
+ (fp_line (start -1.565 0.89) (end 1.565 0.89) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 0.185 0.685) (end -0.185 0.685) (layer B.SilkS) (width 0.12))
+ (fp_line (start -0.185 -0.685) (end 0.185 -0.685) (layer B.SilkS) (width 0.12))
(fp_line (start -1 -0.625) (end -1 0.625) (layer B.Fab) (width 0.025))
- (fp_line (start -1 0.87) (end 1 0.87) (layer B.SilkS) (width 0.12))
- (fp_line (start 1 -0.87) (end -1 -0.87) (layer B.SilkS) (width 0.12))
- (fp_line (start -1.665 0.94) (end 1.665 0.94) (layer B.CrtYd) (width 0.05))
- (fp_line (start 1.665 0.94) (end 1.665 -0.94) (layer B.CrtYd) (width 0.05))
- (fp_line (start 1.665 -0.94) (end -1.665 -0.94) (layer B.CrtYd) (width 0.05))
- (fp_line (start -1.665 -0.94) (end -1.665 0.94) (layer B.CrtYd) (width 0.05))
- (pad 1 smd rect (at -0.89 0 180) (size 1.05 1.38) (layers 4_bot B.Paste B.Mask)
- (net 46 /hackrf_if/VBAT))
- (pad 2 smd rect (at 0.89 0 180) (size 1.05 1.38) (layers 4_bot B.Paste B.Mask)
+ (fp_line (start 1 -0.625) (end -1 -0.625) (layer B.Fab) (width 0.025))
+ (fp_line (start 1 0.625) (end 1 -0.625) (layer B.Fab) (width 0.025))
+ (fp_line (start -1 0.625) (end 1 0.625) (layer B.Fab) (width 0.025))
+ (fp_text user %R (at 0 0 180) (layer B.Fab)
+ (effects (font (size 0.6 0.6) (thickness 0.025)) (justify mirror))
+ )
+ (pad 2 smd rect (at 0.865 0 180) (size 1 1.38) (layers 4_bot B.Paste B.Mask)
(net 47 GND))
- (model Capacitors_SMD.3dshapes/C_0805.wrl
+ (pad 1 smd rect (at -0.865 0 180) (size 1 1.38) (layers 4_bot B.Paste B.Mask)
+ (net 46 /hackrf_if/VBAT))
+ (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0805_2012Metric.step
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
- (module ipc_capc:IPC_CAPC2012X135L45N (layer 4_bot) (tedit 58FE217E) (tstamp 58EB03B6)
+ (module ipc_capc:IPC_CAPC200X125X135L45N (layer 4_bot) (tedit 5BD22C68) (tstamp 5BD11CB3)
(at 165.6 154.3 270)
(path /53A8C780/53B1A065)
(attr smd)
@@ -2360,28 +2753,31 @@
(fp_text value 10U (at 0 0 270) (layer B.Fab)
(effects (font (size 0.6096 0.6096) (thickness 0.12)) (justify mirror))
)
+ (fp_text user %R (at 0 0 270) (layer B.Fab)
+ (effects (font (size 0.6 0.6) (thickness 0.025)) (justify mirror))
+ )
(fp_line (start -1 0.625) (end 1 0.625) (layer B.Fab) (width 0.025))
(fp_line (start 1 0.625) (end 1 -0.625) (layer B.Fab) (width 0.025))
(fp_line (start 1 -0.625) (end -1 -0.625) (layer B.Fab) (width 0.025))
(fp_line (start -1 -0.625) (end -1 0.625) (layer B.Fab) (width 0.025))
- (fp_line (start -1 0.87) (end 1 0.87) (layer B.SilkS) (width 0.12))
- (fp_line (start 1 -0.87) (end -1 -0.87) (layer B.SilkS) (width 0.12))
- (fp_line (start -1.665 0.94) (end 1.665 0.94) (layer B.CrtYd) (width 0.05))
- (fp_line (start 1.665 0.94) (end 1.665 -0.94) (layer B.CrtYd) (width 0.05))
- (fp_line (start 1.665 -0.94) (end -1.665 -0.94) (layer B.CrtYd) (width 0.05))
- (fp_line (start -1.665 -0.94) (end -1.665 0.94) (layer B.CrtYd) (width 0.05))
- (pad 1 smd rect (at -0.89 0 270) (size 1.05 1.38) (layers 4_bot B.Paste B.Mask)
+ (fp_line (start -0.185 -0.685) (end 0.185 -0.685) (layer B.SilkS) (width 0.12))
+ (fp_line (start 0.185 0.685) (end -0.185 0.685) (layer B.SilkS) (width 0.12))
+ (fp_line (start -1.565 0.89) (end 1.565 0.89) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 1.565 0.89) (end 1.565 -0.89) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 1.565 -0.89) (end -1.565 -0.89) (layer B.CrtYd) (width 0.05))
+ (fp_line (start -1.565 -0.89) (end -1.565 0.89) (layer B.CrtYd) (width 0.05))
+ (pad 1 smd rect (at -0.865 0 270) (size 1 1.38) (layers 4_bot B.Paste B.Mask)
(net 121 +3V3))
- (pad 2 smd rect (at 0.89 0 270) (size 1.05 1.38) (layers 4_bot B.Paste B.Mask)
+ (pad 2 smd rect (at 0.865 0 270) (size 1 1.38) (layers 4_bot B.Paste B.Mask)
(net 47 GND))
- (model Capacitors_SMD.3dshapes/C_0805.wrl
+ (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0805_2012Metric.step
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
- (module ipc_capc:IPC_CAPC2012X135L45N (layer 4_bot) (tedit 58FD8E38) (tstamp 58EB03A7)
+ (module ipc_capc:IPC_CAPC200X125X135L45N (layer 4_bot) (tedit 5BD22C6C) (tstamp 5BD11CA3)
(at 155.2 157.9 180)
(path /53A8C780/53B1911F)
(attr smd)
@@ -2391,28 +2787,31 @@
(fp_text value 10U (at 0 0 180) (layer B.Fab)
(effects (font (size 0.6096 0.6096) (thickness 0.12)) (justify mirror))
)
+ (fp_text user %R (at 0 0 180) (layer B.Fab)
+ (effects (font (size 0.6 0.6) (thickness 0.025)) (justify mirror))
+ )
(fp_line (start -1 0.625) (end 1 0.625) (layer B.Fab) (width 0.025))
(fp_line (start 1 0.625) (end 1 -0.625) (layer B.Fab) (width 0.025))
(fp_line (start 1 -0.625) (end -1 -0.625) (layer B.Fab) (width 0.025))
(fp_line (start -1 -0.625) (end -1 0.625) (layer B.Fab) (width 0.025))
- (fp_line (start -1 0.87) (end 1 0.87) (layer B.SilkS) (width 0.12))
- (fp_line (start 1 -0.87) (end -1 -0.87) (layer B.SilkS) (width 0.12))
- (fp_line (start -1.665 0.94) (end 1.665 0.94) (layer B.CrtYd) (width 0.05))
- (fp_line (start 1.665 0.94) (end 1.665 -0.94) (layer B.CrtYd) (width 0.05))
- (fp_line (start 1.665 -0.94) (end -1.665 -0.94) (layer B.CrtYd) (width 0.05))
- (fp_line (start -1.665 -0.94) (end -1.665 0.94) (layer B.CrtYd) (width 0.05))
- (pad 1 smd rect (at -0.89 0 180) (size 1.05 1.38) (layers 4_bot B.Paste B.Mask)
+ (fp_line (start -0.185 -0.685) (end 0.185 -0.685) (layer B.SilkS) (width 0.12))
+ (fp_line (start 0.185 0.685) (end -0.185 0.685) (layer B.SilkS) (width 0.12))
+ (fp_line (start -1.565 0.89) (end 1.565 0.89) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 1.565 0.89) (end 1.565 -0.89) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 1.565 -0.89) (end -1.565 -0.89) (layer B.CrtYd) (width 0.05))
+ (fp_line (start -1.565 -0.89) (end -1.565 0.89) (layer B.CrtYd) (width 0.05))
+ (pad 1 smd rect (at -0.865 0 180) (size 1 1.38) (layers 4_bot B.Paste B.Mask)
(net 121 +3V3))
- (pad 2 smd rect (at 0.89 0 180) (size 1.05 1.38) (layers 4_bot B.Paste B.Mask)
+ (pad 2 smd rect (at 0.865 0 180) (size 1 1.38) (layers 4_bot B.Paste B.Mask)
(net 47 GND))
- (model Capacitors_SMD.3dshapes/C_0805.wrl
+ (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0805_2012Metric.step
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
- (module ipc_capc:IPC_CAPC2012X135L45N (layer 4_bot) (tedit 58FD8D49) (tstamp 58EB0389)
+ (module ipc_capc:IPC_CAPC200X125X135L45N (layer 4_bot) (tedit 5BD22B9C) (tstamp 5BD11C83)
(at 143.65 110.85 180)
(path /58CFF3E3/58CFF92C)
(attr smd)
@@ -2422,28 +2821,31 @@
(fp_text value 10U (at 0 0 180) (layer B.Fab)
(effects (font (size 0.6096 0.6096) (thickness 0.12)) (justify mirror))
)
+ (fp_text user %R (at 0 0 180) (layer B.Fab)
+ (effects (font (size 0.6 0.6) (thickness 0.025)) (justify mirror))
+ )
(fp_line (start -1 0.625) (end 1 0.625) (layer B.Fab) (width 0.025))
(fp_line (start 1 0.625) (end 1 -0.625) (layer B.Fab) (width 0.025))
(fp_line (start 1 -0.625) (end -1 -0.625) (layer B.Fab) (width 0.025))
(fp_line (start -1 -0.625) (end -1 0.625) (layer B.Fab) (width 0.025))
- (fp_line (start -1 0.87) (end 1 0.87) (layer B.SilkS) (width 0.12))
- (fp_line (start 1 -0.87) (end -1 -0.87) (layer B.SilkS) (width 0.12))
- (fp_line (start -1.665 0.94) (end 1.665 0.94) (layer B.CrtYd) (width 0.05))
- (fp_line (start 1.665 0.94) (end 1.665 -0.94) (layer B.CrtYd) (width 0.05))
- (fp_line (start 1.665 -0.94) (end -1.665 -0.94) (layer B.CrtYd) (width 0.05))
- (fp_line (start -1.665 -0.94) (end -1.665 0.94) (layer B.CrtYd) (width 0.05))
- (pad 1 smd rect (at -0.89 0 180) (size 1.05 1.38) (layers 4_bot B.Paste B.Mask)
+ (fp_line (start -0.185 -0.685) (end 0.185 -0.685) (layer B.SilkS) (width 0.12))
+ (fp_line (start 0.185 0.685) (end -0.185 0.685) (layer B.SilkS) (width 0.12))
+ (fp_line (start -1.565 0.89) (end 1.565 0.89) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 1.565 0.89) (end 1.565 -0.89) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 1.565 -0.89) (end -1.565 -0.89) (layer B.CrtYd) (width 0.05))
+ (fp_line (start -1.565 -0.89) (end -1.565 0.89) (layer B.CrtYd) (width 0.05))
+ (pad 1 smd rect (at -0.865 0 180) (size 1 1.38) (layers 4_bot B.Paste B.Mask)
(net 122 +1V8))
- (pad 2 smd rect (at 0.89 0 180) (size 1.05 1.38) (layers 4_bot B.Paste B.Mask)
+ (pad 2 smd rect (at 0.865 0 180) (size 1 1.38) (layers 4_bot B.Paste B.Mask)
(net 47 GND))
- (model Capacitors_SMD.3dshapes/C_0805.wrl
+ (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0805_2012Metric.step
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
- (module ipc_capc:IPC_CAPC2012X135L45N (layer 4_bot) (tedit 58FD8D5A) (tstamp 58EB036B)
+ (module ipc_capc:IPC_CAPC200X125X135L45N (layer 4_bot) (tedit 5BD22B6F) (tstamp 5BD11C63)
(at 140.1 108.2 90)
(path /58CFF3E3/58CFF923)
(attr smd)
@@ -2453,28 +2855,31 @@
(fp_text value 10U (at 0 0 90) (layer B.Fab)
(effects (font (size 0.6096 0.6096) (thickness 0.12)) (justify mirror))
)
- (fp_line (start -1 0.625) (end 1 0.625) (layer B.Fab) (width 0.025))
- (fp_line (start 1 0.625) (end 1 -0.625) (layer B.Fab) (width 0.025))
- (fp_line (start 1 -0.625) (end -1 -0.625) (layer B.Fab) (width 0.025))
+ (fp_line (start -1.565 -0.89) (end -1.565 0.89) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 1.565 -0.89) (end -1.565 -0.89) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 1.565 0.89) (end 1.565 -0.89) (layer B.CrtYd) (width 0.05))
+ (fp_line (start -1.565 0.89) (end 1.565 0.89) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 0.185 0.685) (end -0.185 0.685) (layer B.SilkS) (width 0.12))
+ (fp_line (start -0.185 -0.685) (end 0.185 -0.685) (layer B.SilkS) (width 0.12))
(fp_line (start -1 -0.625) (end -1 0.625) (layer B.Fab) (width 0.025))
- (fp_line (start -1 0.87) (end 1 0.87) (layer B.SilkS) (width 0.12))
- (fp_line (start 1 -0.87) (end -1 -0.87) (layer B.SilkS) (width 0.12))
- (fp_line (start -1.665 0.94) (end 1.665 0.94) (layer B.CrtYd) (width 0.05))
- (fp_line (start 1.665 0.94) (end 1.665 -0.94) (layer B.CrtYd) (width 0.05))
- (fp_line (start 1.665 -0.94) (end -1.665 -0.94) (layer B.CrtYd) (width 0.05))
- (fp_line (start -1.665 -0.94) (end -1.665 0.94) (layer B.CrtYd) (width 0.05))
- (pad 1 smd rect (at -0.89 0 90) (size 1.05 1.38) (layers 4_bot B.Paste B.Mask)
- (net 121 +3V3))
- (pad 2 smd rect (at 0.89 0 90) (size 1.05 1.38) (layers 4_bot B.Paste B.Mask)
+ (fp_line (start 1 -0.625) (end -1 -0.625) (layer B.Fab) (width 0.025))
+ (fp_line (start 1 0.625) (end 1 -0.625) (layer B.Fab) (width 0.025))
+ (fp_line (start -1 0.625) (end 1 0.625) (layer B.Fab) (width 0.025))
+ (fp_text user %R (at 0 0 90) (layer B.Fab)
+ (effects (font (size 0.6 0.6) (thickness 0.025)) (justify mirror))
+ )
+ (pad 2 smd rect (at 0.865 0 90) (size 1 1.38) (layers 4_bot B.Paste B.Mask)
(net 47 GND))
- (model Capacitors_SMD.3dshapes/C_0805.wrl
+ (pad 1 smd rect (at -0.865 0 90) (size 1 1.38) (layers 4_bot B.Paste B.Mask)
+ (net 121 +3V3))
+ (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0805_2012Metric.step
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
- (module ipc_capc:IPC_CAPC2012X135L45N (layer 4_bot) (tedit 58FD8859) (tstamp 58EB035C)
+ (module ipc_capc:IPC_CAPC200X125X135L45N (layer 4_bot) (tedit 5BD22CFD) (tstamp 5BD11C53)
(at 97.4 144.6 270)
(path /53A8C780/53A8D5E0)
(attr smd)
@@ -2484,28 +2889,31 @@
(fp_text value 10U (at 0 0 270) (layer B.Fab)
(effects (font (size 0.6096 0.6096) (thickness 0.12)) (justify mirror))
)
- (fp_line (start -1 0.625) (end 1 0.625) (layer B.Fab) (width 0.025))
- (fp_line (start 1 0.625) (end 1 -0.625) (layer B.Fab) (width 0.025))
- (fp_line (start 1 -0.625) (end -1 -0.625) (layer B.Fab) (width 0.025))
+ (fp_line (start -1.565 -0.89) (end -1.565 0.89) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 1.565 -0.89) (end -1.565 -0.89) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 1.565 0.89) (end 1.565 -0.89) (layer B.CrtYd) (width 0.05))
+ (fp_line (start -1.565 0.89) (end 1.565 0.89) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 0.185 0.685) (end -0.185 0.685) (layer B.SilkS) (width 0.12))
+ (fp_line (start -0.185 -0.685) (end 0.185 -0.685) (layer B.SilkS) (width 0.12))
(fp_line (start -1 -0.625) (end -1 0.625) (layer B.Fab) (width 0.025))
- (fp_line (start -1 0.87) (end 1 0.87) (layer B.SilkS) (width 0.12))
- (fp_line (start 1 -0.87) (end -1 -0.87) (layer B.SilkS) (width 0.12))
- (fp_line (start -1.665 0.94) (end 1.665 0.94) (layer B.CrtYd) (width 0.05))
- (fp_line (start 1.665 0.94) (end 1.665 -0.94) (layer B.CrtYd) (width 0.05))
- (fp_line (start 1.665 -0.94) (end -1.665 -0.94) (layer B.CrtYd) (width 0.05))
- (fp_line (start -1.665 -0.94) (end -1.665 0.94) (layer B.CrtYd) (width 0.05))
- (pad 1 smd rect (at -0.89 0 270) (size 1.05 1.38) (layers 4_bot B.Paste B.Mask)
- (net 122 +1V8))
- (pad 2 smd rect (at 0.89 0 270) (size 1.05 1.38) (layers 4_bot B.Paste B.Mask)
+ (fp_line (start 1 -0.625) (end -1 -0.625) (layer B.Fab) (width 0.025))
+ (fp_line (start 1 0.625) (end 1 -0.625) (layer B.Fab) (width 0.025))
+ (fp_line (start -1 0.625) (end 1 0.625) (layer B.Fab) (width 0.025))
+ (fp_text user %R (at 0 0 270) (layer B.Fab)
+ (effects (font (size 0.6 0.6) (thickness 0.025)) (justify mirror))
+ )
+ (pad 2 smd rect (at 0.865 0 270) (size 1 1.38) (layers 4_bot B.Paste B.Mask)
(net 47 GND))
- (model Capacitors_SMD.3dshapes/C_0805.wrl
+ (pad 1 smd rect (at -0.865 0 270) (size 1 1.38) (layers 4_bot B.Paste B.Mask)
+ (net 122 +1V8))
+ (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0805_2012Metric.step
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
- (module ipc_capc:IPC_CAPC2012X135L45N (layer 4_bot) (tedit 58FD8891) (tstamp 58EB034D)
+ (module ipc_capc:IPC_CAPC200X125X135L45N (layer 4_bot) (tedit 5BD22B16) (tstamp 5BD11C43)
(at 103.1 131.1 135)
(path /53A8C780/53A8D5DA)
(attr smd)
@@ -2515,28 +2923,31 @@
(fp_text value 10U (at 0 0 135) (layer B.Fab)
(effects (font (size 0.6096 0.6096) (thickness 0.12)) (justify mirror))
)
- (fp_line (start -1 0.625) (end 1 0.625) (layer B.Fab) (width 0.025))
- (fp_line (start 1 0.625) (end 1 -0.625) (layer B.Fab) (width 0.025))
- (fp_line (start 1 -0.625) (end -1 -0.625) (layer B.Fab) (width 0.025))
+ (fp_line (start -1.565 -0.89) (end -1.565 0.89) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 1.565 -0.89) (end -1.565 -0.89) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 1.565 0.89) (end 1.565 -0.89) (layer B.CrtYd) (width 0.05))
+ (fp_line (start -1.565 0.89) (end 1.565 0.89) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 0.185 0.685) (end -0.185 0.685) (layer B.SilkS) (width 0.12))
+ (fp_line (start -0.185 -0.685) (end 0.185 -0.685) (layer B.SilkS) (width 0.12))
(fp_line (start -1 -0.625) (end -1 0.625) (layer B.Fab) (width 0.025))
- (fp_line (start -1 0.87) (end 1 0.87) (layer B.SilkS) (width 0.12))
- (fp_line (start 1 -0.87) (end -1 -0.87) (layer B.SilkS) (width 0.12))
- (fp_line (start -1.665 0.94) (end 1.665 0.94) (layer B.CrtYd) (width 0.05))
- (fp_line (start 1.665 0.94) (end 1.665 -0.94) (layer B.CrtYd) (width 0.05))
- (fp_line (start 1.665 -0.94) (end -1.665 -0.94) (layer B.CrtYd) (width 0.05))
- (fp_line (start -1.665 -0.94) (end -1.665 0.94) (layer B.CrtYd) (width 0.05))
- (pad 1 smd rect (at -0.89 0 135) (size 1.05 1.38) (layers 4_bot B.Paste B.Mask)
- (net 122 +1V8))
- (pad 2 smd rect (at 0.89 0 135) (size 1.05 1.38) (layers 4_bot B.Paste B.Mask)
+ (fp_line (start 1 -0.625) (end -1 -0.625) (layer B.Fab) (width 0.025))
+ (fp_line (start 1 0.625) (end 1 -0.625) (layer B.Fab) (width 0.025))
+ (fp_line (start -1 0.625) (end 1 0.625) (layer B.Fab) (width 0.025))
+ (fp_text user %R (at 0 0 135) (layer B.Fab)
+ (effects (font (size 0.6 0.6) (thickness 0.025)) (justify mirror))
+ )
+ (pad 2 smd rect (at 0.865 0 135) (size 1 1.38) (layers 4_bot B.Paste B.Mask)
(net 47 GND))
- (model Capacitors_SMD.3dshapes/C_0805.wrl
+ (pad 1 smd rect (at -0.865 0 135) (size 1 1.38) (layers 4_bot B.Paste B.Mask)
+ (net 122 +1V8))
+ (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0805_2012Metric.step
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
- (module ipc_capc:IPC_CAPC2012X135L45N (layer 4_bot) (tedit 58FD88CA) (tstamp 58EB0311)
+ (module ipc_capc:IPC_CAPC200X125X135L45N (layer 4_bot) (tedit 5BD22C92) (tstamp 5BD11C07)
(at 123.5 158.9 180)
(path /53A8C780/53A8D5C2)
(attr smd)
@@ -2546,28 +2957,31 @@
(fp_text value 10U (at 0 0 180) (layer B.Fab)
(effects (font (size 0.6096 0.6096) (thickness 0.12)) (justify mirror))
)
+ (fp_text user %R (at 0 0 180) (layer B.Fab)
+ (effects (font (size 0.6 0.6) (thickness 0.025)) (justify mirror))
+ )
(fp_line (start -1 0.625) (end 1 0.625) (layer B.Fab) (width 0.025))
(fp_line (start 1 0.625) (end 1 -0.625) (layer B.Fab) (width 0.025))
(fp_line (start 1 -0.625) (end -1 -0.625) (layer B.Fab) (width 0.025))
(fp_line (start -1 -0.625) (end -1 0.625) (layer B.Fab) (width 0.025))
- (fp_line (start -1 0.87) (end 1 0.87) (layer B.SilkS) (width 0.12))
- (fp_line (start 1 -0.87) (end -1 -0.87) (layer B.SilkS) (width 0.12))
- (fp_line (start -1.665 0.94) (end 1.665 0.94) (layer B.CrtYd) (width 0.05))
- (fp_line (start 1.665 0.94) (end 1.665 -0.94) (layer B.CrtYd) (width 0.05))
- (fp_line (start 1.665 -0.94) (end -1.665 -0.94) (layer B.CrtYd) (width 0.05))
- (fp_line (start -1.665 -0.94) (end -1.665 0.94) (layer B.CrtYd) (width 0.05))
- (pad 1 smd rect (at -0.89 0 180) (size 1.05 1.38) (layers 4_bot B.Paste B.Mask)
+ (fp_line (start -0.185 -0.685) (end 0.185 -0.685) (layer B.SilkS) (width 0.12))
+ (fp_line (start 0.185 0.685) (end -0.185 0.685) (layer B.SilkS) (width 0.12))
+ (fp_line (start -1.565 0.89) (end 1.565 0.89) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 1.565 0.89) (end 1.565 -0.89) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 1.565 -0.89) (end -1.565 -0.89) (layer B.CrtYd) (width 0.05))
+ (fp_line (start -1.565 -0.89) (end -1.565 0.89) (layer B.CrtYd) (width 0.05))
+ (pad 1 smd rect (at -0.865 0 180) (size 1 1.38) (layers 4_bot B.Paste B.Mask)
(net 121 +3V3))
- (pad 2 smd rect (at 0.89 0 180) (size 1.05 1.38) (layers 4_bot B.Paste B.Mask)
+ (pad 2 smd rect (at 0.865 0 180) (size 1 1.38) (layers 4_bot B.Paste B.Mask)
(net 47 GND))
- (model Capacitors_SMD.3dshapes/C_0805.wrl
+ (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0805_2012Metric.step
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
- (module ipc_capc:IPC_CAPC2012X135L45N (layer 4_bot) (tedit 58FD8DD0) (tstamp 58EB02B7)
+ (module ipc_capc:IPC_CAPC200X125X135L45N (layer 4_bot) (tedit 5BD22B5C) (tstamp 5BD11BB1)
(at 80.1 116)
(path /53A9129D/53A8C71C)
(attr smd)
@@ -2577,28 +2991,31 @@
(fp_text value 10U (at 0 0) (layer B.Fab)
(effects (font (size 0.6096 0.6096) (thickness 0.12)) (justify mirror))
)
+ (fp_text user %R (at 0 0) (layer B.Fab)
+ (effects (font (size 0.6 0.6) (thickness 0.025)) (justify mirror))
+ )
(fp_line (start -1 0.625) (end 1 0.625) (layer B.Fab) (width 0.025))
(fp_line (start 1 0.625) (end 1 -0.625) (layer B.Fab) (width 0.025))
(fp_line (start 1 -0.625) (end -1 -0.625) (layer B.Fab) (width 0.025))
(fp_line (start -1 -0.625) (end -1 0.625) (layer B.Fab) (width 0.025))
- (fp_line (start -1 0.87) (end 1 0.87) (layer B.SilkS) (width 0.12))
- (fp_line (start 1 -0.87) (end -1 -0.87) (layer B.SilkS) (width 0.12))
- (fp_line (start -1.665 0.94) (end 1.665 0.94) (layer B.CrtYd) (width 0.05))
- (fp_line (start 1.665 0.94) (end 1.665 -0.94) (layer B.CrtYd) (width 0.05))
- (fp_line (start 1.665 -0.94) (end -1.665 -0.94) (layer B.CrtYd) (width 0.05))
- (fp_line (start -1.665 -0.94) (end -1.665 0.94) (layer B.CrtYd) (width 0.05))
- (pad 1 smd rect (at -0.89 0) (size 1.05 1.38) (layers 4_bot B.Paste B.Mask)
+ (fp_line (start -0.185 -0.685) (end 0.185 -0.685) (layer B.SilkS) (width 0.12))
+ (fp_line (start 0.185 0.685) (end -0.185 0.685) (layer B.SilkS) (width 0.12))
+ (fp_line (start -1.565 0.89) (end 1.565 0.89) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 1.565 0.89) (end 1.565 -0.89) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 1.565 -0.89) (end -1.565 -0.89) (layer B.CrtYd) (width 0.05))
+ (fp_line (start -1.565 -0.89) (end -1.565 0.89) (layer B.CrtYd) (width 0.05))
+ (pad 1 smd rect (at -0.865 0) (size 1 1.38) (layers 4_bot B.Paste B.Mask)
(net 121 +3V3))
- (pad 2 smd rect (at 0.89 0) (size 1.05 1.38) (layers 4_bot B.Paste B.Mask)
+ (pad 2 smd rect (at 0.865 0) (size 1 1.38) (layers 4_bot B.Paste B.Mask)
(net 47 GND))
- (model Capacitors_SMD.3dshapes/C_0805.wrl
+ (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0805_2012Metric.step
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
- (module ipc_capc:IPC_CAPC2012X135L45N (layer 4_bot) (tedit 58FD8CBE) (tstamp 58EB026C)
+ (module ipc_capc:IPC_CAPC200X125X135L45N (layer 4_bot) (tedit 5BD22BE7) (tstamp 5BD11B41)
(at 148.1 115.7 180)
(path /53A8BFC3/53A8C720)
(attr smd)
@@ -2608,28 +3025,31 @@
(fp_text value 10U (at 0 0 180) (layer B.Fab)
(effects (font (size 0.6096 0.6096) (thickness 0.12)) (justify mirror))
)
+ (fp_text user %R (at 0 0 180) (layer B.Fab)
+ (effects (font (size 0.6 0.6) (thickness 0.025)) (justify mirror))
+ )
(fp_line (start -1 0.625) (end 1 0.625) (layer B.Fab) (width 0.025))
(fp_line (start 1 0.625) (end 1 -0.625) (layer B.Fab) (width 0.025))
(fp_line (start 1 -0.625) (end -1 -0.625) (layer B.Fab) (width 0.025))
(fp_line (start -1 -0.625) (end -1 0.625) (layer B.Fab) (width 0.025))
- (fp_line (start -1 0.87) (end 1 0.87) (layer B.SilkS) (width 0.12))
- (fp_line (start 1 -0.87) (end -1 -0.87) (layer B.SilkS) (width 0.12))
- (fp_line (start -1.665 0.94) (end 1.665 0.94) (layer B.CrtYd) (width 0.05))
- (fp_line (start 1.665 0.94) (end 1.665 -0.94) (layer B.CrtYd) (width 0.05))
- (fp_line (start 1.665 -0.94) (end -1.665 -0.94) (layer B.CrtYd) (width 0.05))
- (fp_line (start -1.665 -0.94) (end -1.665 0.94) (layer B.CrtYd) (width 0.05))
- (pad 1 smd rect (at -0.89 0 180) (size 1.05 1.38) (layers 4_bot B.Paste B.Mask)
+ (fp_line (start -0.185 -0.685) (end 0.185 -0.685) (layer B.SilkS) (width 0.12))
+ (fp_line (start 0.185 0.685) (end -0.185 0.685) (layer B.SilkS) (width 0.12))
+ (fp_line (start -1.565 0.89) (end 1.565 0.89) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 1.565 0.89) (end 1.565 -0.89) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 1.565 -0.89) (end -1.565 -0.89) (layer B.CrtYd) (width 0.05))
+ (fp_line (start -1.565 -0.89) (end -1.565 0.89) (layer B.CrtYd) (width 0.05))
+ (pad 1 smd rect (at -0.865 0 180) (size 1 1.38) (layers 4_bot B.Paste B.Mask)
(net 72 /power/AUDIO_SVDD))
- (pad 2 smd rect (at 0.89 0 180) (size 1.05 1.38) (layers 4_bot B.Paste B.Mask)
+ (pad 2 smd rect (at 0.865 0 180) (size 1 1.38) (layers 4_bot B.Paste B.Mask)
(net 47 GND))
- (model Capacitors_SMD.3dshapes/C_0805.wrl
+ (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0805_2012Metric.step
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
- (module ipc_capc:IPC_CAPC2012X135L45N (layer 4_bot) (tedit 58FD8B93) (tstamp 58EB024E)
+ (module ipc_capc:IPC_CAPC200X125X135L45N (layer 4_bot) (tedit 5BD22B95) (tstamp 5BD11B21)
(at 158.5 106.7 90)
(path /53A8BFC3/53A8C72C)
(attr smd)
@@ -2639,28 +3059,31 @@
(fp_text value 10U (at 0 0 90) (layer B.Fab)
(effects (font (size 0.6096 0.6096) (thickness 0.12)) (justify mirror))
)
- (fp_line (start -1 0.625) (end 1 0.625) (layer B.Fab) (width 0.025))
- (fp_line (start 1 0.625) (end 1 -0.625) (layer B.Fab) (width 0.025))
- (fp_line (start 1 -0.625) (end -1 -0.625) (layer B.Fab) (width 0.025))
+ (fp_line (start -1.565 -0.89) (end -1.565 0.89) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 1.565 -0.89) (end -1.565 -0.89) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 1.565 0.89) (end 1.565 -0.89) (layer B.CrtYd) (width 0.05))
+ (fp_line (start -1.565 0.89) (end 1.565 0.89) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 0.185 0.685) (end -0.185 0.685) (layer B.SilkS) (width 0.12))
+ (fp_line (start -0.185 -0.685) (end 0.185 -0.685) (layer B.SilkS) (width 0.12))
(fp_line (start -1 -0.625) (end -1 0.625) (layer B.Fab) (width 0.025))
- (fp_line (start -1 0.87) (end 1 0.87) (layer B.SilkS) (width 0.12))
- (fp_line (start 1 -0.87) (end -1 -0.87) (layer B.SilkS) (width 0.12))
- (fp_line (start -1.665 0.94) (end 1.665 0.94) (layer B.CrtYd) (width 0.05))
- (fp_line (start 1.665 0.94) (end 1.665 -0.94) (layer B.CrtYd) (width 0.05))
- (fp_line (start 1.665 -0.94) (end -1.665 -0.94) (layer B.CrtYd) (width 0.05))
- (fp_line (start -1.665 -0.94) (end -1.665 0.94) (layer B.CrtYd) (width 0.05))
- (pad 1 smd rect (at -0.89 0 90) (size 1.05 1.38) (layers 4_bot B.Paste B.Mask)
- (net 121 +3V3))
- (pad 2 smd rect (at 0.89 0 90) (size 1.05 1.38) (layers 4_bot B.Paste B.Mask)
+ (fp_line (start 1 -0.625) (end -1 -0.625) (layer B.Fab) (width 0.025))
+ (fp_line (start 1 0.625) (end 1 -0.625) (layer B.Fab) (width 0.025))
+ (fp_line (start -1 0.625) (end 1 0.625) (layer B.Fab) (width 0.025))
+ (fp_text user %R (at 0 0 90) (layer B.Fab)
+ (effects (font (size 0.6 0.6) (thickness 0.025)) (justify mirror))
+ )
+ (pad 2 smd rect (at 0.865 0 90) (size 1 1.38) (layers 4_bot B.Paste B.Mask)
(net 47 GND))
- (model Capacitors_SMD.3dshapes/C_0805.wrl
+ (pad 1 smd rect (at -0.865 0 90) (size 1 1.38) (layers 4_bot B.Paste B.Mask)
+ (net 121 +3V3))
+ (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0805_2012Metric.step
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
- (module ipc_capc:IPC_CAPC2012X135L45N (layer 4_bot) (tedit 58FD8CC5) (tstamp 58EB0212)
+ (module ipc_capc:IPC_CAPC200X125X135L45N (layer 4_bot) (tedit 5BD22BE3) (tstamp 5BD11AF1)
(at 150.75 117.45 270)
(path /53A8BFC3/53A8C70E)
(attr smd)
@@ -2670,88 +3093,99 @@
(fp_text value 10U (at 0 0 270) (layer B.Fab)
(effects (font (size 0.6096 0.6096) (thickness 0.12)) (justify mirror))
)
- (fp_line (start -1 0.625) (end 1 0.625) (layer B.Fab) (width 0.025))
- (fp_line (start 1 0.625) (end 1 -0.625) (layer B.Fab) (width 0.025))
- (fp_line (start 1 -0.625) (end -1 -0.625) (layer B.Fab) (width 0.025))
+ (fp_line (start -1.565 -0.89) (end -1.565 0.89) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 1.565 -0.89) (end -1.565 -0.89) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 1.565 0.89) (end 1.565 -0.89) (layer B.CrtYd) (width 0.05))
+ (fp_line (start -1.565 0.89) (end 1.565 0.89) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 0.185 0.685) (end -0.185 0.685) (layer B.SilkS) (width 0.12))
+ (fp_line (start -0.185 -0.685) (end 0.185 -0.685) (layer B.SilkS) (width 0.12))
(fp_line (start -1 -0.625) (end -1 0.625) (layer B.Fab) (width 0.025))
- (fp_line (start -1 0.87) (end 1 0.87) (layer B.SilkS) (width 0.12))
- (fp_line (start 1 -0.87) (end -1 -0.87) (layer B.SilkS) (width 0.12))
- (fp_line (start -1.665 0.94) (end 1.665 0.94) (layer B.CrtYd) (width 0.05))
- (fp_line (start 1.665 0.94) (end 1.665 -0.94) (layer B.CrtYd) (width 0.05))
- (fp_line (start 1.665 -0.94) (end -1.665 -0.94) (layer B.CrtYd) (width 0.05))
- (fp_line (start -1.665 -0.94) (end -1.665 0.94) (layer B.CrtYd) (width 0.05))
- (pad 1 smd rect (at -0.89 0 270) (size 1.05 1.38) (layers 4_bot B.Paste B.Mask)
- (net 121 +3V3))
- (pad 2 smd rect (at 0.89 0 270) (size 1.05 1.38) (layers 4_bot B.Paste B.Mask)
+ (fp_line (start 1 -0.625) (end -1 -0.625) (layer B.Fab) (width 0.025))
+ (fp_line (start 1 0.625) (end 1 -0.625) (layer B.Fab) (width 0.025))
+ (fp_line (start -1 0.625) (end 1 0.625) (layer B.Fab) (width 0.025))
+ (fp_text user %R (at 0 0 270) (layer B.Fab)
+ (effects (font (size 0.6 0.6) (thickness 0.025)) (justify mirror))
+ )
+ (pad 2 smd rect (at 0.865 0 270) (size 1 1.38) (layers 4_bot B.Paste B.Mask)
(net 47 GND))
- (model Capacitors_SMD.3dshapes/C_0805.wrl
+ (pad 1 smd rect (at -0.865 0 270) (size 1 1.38) (layers 4_bot B.Paste B.Mask)
+ (net 121 +3V3))
+ (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0805_2012Metric.step
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
- (module ipc_capc:IPC_CAPC2012X135L45N (layer 4_bot) (tedit 58FD8AA6) (tstamp 58F1AEE1)
+ (module ipc_capc:IPC_CAPC200X125X135L45N (layer 4_bot) (tedit 5BD22C24) (tstamp 5BD11B61)
(at 171.35 126.95)
(path /58CFF3E3/58F1B1AB)
+ (attr smd)
(fp_text reference C15 (at -0.05 1.45) (layer B.SilkS)
(effects (font (size 0.6096 0.6096) (thickness 0.12)) (justify mirror))
)
(fp_text value 4U7 (at 0 0) (layer B.Fab)
(effects (font (size 0.6096 0.6096) (thickness 0.12)) (justify mirror))
)
+ (fp_text user %R (at 0 0) (layer B.Fab)
+ (effects (font (size 0.6 0.6) (thickness 0.025)) (justify mirror))
+ )
(fp_line (start -1 0.625) (end 1 0.625) (layer B.Fab) (width 0.025))
(fp_line (start 1 0.625) (end 1 -0.625) (layer B.Fab) (width 0.025))
(fp_line (start 1 -0.625) (end -1 -0.625) (layer B.Fab) (width 0.025))
(fp_line (start -1 -0.625) (end -1 0.625) (layer B.Fab) (width 0.025))
- (fp_line (start -1 0.87) (end 1 0.87) (layer B.SilkS) (width 0.12))
- (fp_line (start 1 -0.87) (end -1 -0.87) (layer B.SilkS) (width 0.12))
- (fp_line (start -1.665 0.94) (end 1.665 0.94) (layer B.CrtYd) (width 0.05))
- (fp_line (start 1.665 0.94) (end 1.665 -0.94) (layer B.CrtYd) (width 0.05))
- (fp_line (start 1.665 -0.94) (end -1.665 -0.94) (layer B.CrtYd) (width 0.05))
- (fp_line (start -1.665 -0.94) (end -1.665 0.94) (layer B.CrtYd) (width 0.05))
- (pad 1 smd rect (at -0.89 0) (size 1.05 1.38) (layers 4_bot B.Paste B.Mask)
+ (fp_line (start -0.185 -0.685) (end 0.185 -0.685) (layer B.SilkS) (width 0.12))
+ (fp_line (start 0.185 0.685) (end -0.185 0.685) (layer B.SilkS) (width 0.12))
+ (fp_line (start -1.565 0.89) (end 1.565 0.89) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 1.565 0.89) (end 1.565 -0.89) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 1.565 -0.89) (end -1.565 -0.89) (layer B.CrtYd) (width 0.05))
+ (fp_line (start -1.565 -0.89) (end -1.565 0.89) (layer B.CrtYd) (width 0.05))
+ (pad 1 smd rect (at -0.865 0) (size 1 1.38) (layers 4_bot B.Paste B.Mask)
(net 118 /power/BBAT))
- (pad 2 smd rect (at 0.89 0) (size 1.05 1.38) (layers 4_bot B.Paste B.Mask)
+ (pad 2 smd rect (at 0.865 0) (size 1 1.38) (layers 4_bot B.Paste B.Mask)
(net 47 GND))
- (model Capacitors_SMD.3dshapes/C_0805.wrl
+ (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0805_2012Metric.step
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
- (module ipc_capc:IPC_CAPC1608X90L35N (layer 4_bot) (tedit 58FD8C02) (tstamp 58EB037A)
+ (module ipc_capc:IPC_CAPC160X80X90L35N (layer 4_bot) (tedit 5BD22B77) (tstamp 5BD11C73)
(at 143.8 105.8 180)
(path /58CFF3E3/58CFF945)
+ (attr smd)
(fp_text reference C39 (at 0.05 1.2 180) (layer B.SilkS)
(effects (font (size 0.6096 0.6096) (thickness 0.12)) (justify mirror))
)
(fp_text value R (at 0 0 180) (layer B.Fab)
(effects (font (size 0.6096 0.6096) (thickness 0.12)) (justify mirror))
)
- (fp_line (start -0.8 0.4) (end 0.8 0.4) (layer B.Fab) (width 0.025))
- (fp_line (start 0.8 0.4) (end 0.8 -0.4) (layer B.Fab) (width 0.025))
- (fp_line (start 0.8 -0.4) (end -0.8 -0.4) (layer B.Fab) (width 0.025))
+ (fp_line (start -1.365 -0.665) (end -1.365 0.665) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 1.365 -0.665) (end -1.365 -0.665) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 1.365 0.665) (end 1.365 -0.665) (layer B.CrtYd) (width 0.05))
+ (fp_line (start -1.365 0.665) (end 1.365 0.665) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 0.145 0.46) (end -0.145 0.46) (layer B.SilkS) (width 0.12))
+ (fp_line (start -0.145 -0.46) (end 0.145 -0.46) (layer B.SilkS) (width 0.12))
(fp_line (start -0.8 -0.4) (end -0.8 0.4) (layer B.Fab) (width 0.025))
- (fp_line (start -0.8 0.645) (end 0.8 0.645) (layer B.SilkS) (width 0.12))
- (fp_line (start 0.8 -0.645) (end -0.8 -0.645) (layer B.SilkS) (width 0.12))
- (fp_line (start -1.465 0.715) (end 1.465 0.715) (layer B.CrtYd) (width 0.05))
- (fp_line (start 1.465 0.715) (end 1.465 -0.715) (layer B.CrtYd) (width 0.05))
- (fp_line (start 1.465 -0.715) (end -1.465 -0.715) (layer B.CrtYd) (width 0.05))
- (fp_line (start -1.465 -0.715) (end -1.465 0.715) (layer B.CrtYd) (width 0.05))
- (pad 1 smd rect (at -0.77 0 180) (size 0.89 0.93) (layers 4_bot B.Paste B.Mask)
- (net 48 "Net-(C39-Pad1)"))
- (pad 2 smd rect (at 0.77 0 180) (size 0.89 0.93) (layers 4_bot B.Paste B.Mask)
+ (fp_line (start 0.8 -0.4) (end -0.8 -0.4) (layer B.Fab) (width 0.025))
+ (fp_line (start 0.8 0.4) (end 0.8 -0.4) (layer B.Fab) (width 0.025))
+ (fp_line (start -0.8 0.4) (end 0.8 0.4) (layer B.Fab) (width 0.025))
+ (fp_text user %R (at 0 0 180) (layer B.Fab)
+ (effects (font (size 0.45 0.45) (thickness 0.025)) (justify mirror))
+ )
+ (pad 2 smd rect (at 0.745 0 180) (size 0.84 0.93) (layers 4_bot B.Paste B.Mask)
(net 47 GND))
- (model Capacitors_SMD.3dshapes/C_0603.wrl
+ (pad 1 smd rect (at -0.745 0 180) (size 0.84 0.93) (layers 4_bot B.Paste B.Mask)
+ (net 48 "Net-(C39-Pad1)"))
+ (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.step
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
- (module ipc_capc:IPC_CAPC1608X90L35N (layer 4_bot) (tedit 58FD8B9A) (tstamp 58EB025D)
+ (module ipc_capc:IPC_CAPC160X80X90L35N (layer 4_bot) (tedit 5BD22B92) (tstamp 5BD11B31)
(at 156.8 106.2 270)
(path /53A8BFC3/53A8C6F0)
(attr smd)
@@ -2761,28 +3195,31 @@
(fp_text value 2U2 (at 0 0 270) (layer B.Fab)
(effects (font (size 0.6096 0.6096) (thickness 0.12)) (justify mirror))
)
- (fp_line (start -0.8 0.4) (end 0.8 0.4) (layer B.Fab) (width 0.025))
- (fp_line (start 0.8 0.4) (end 0.8 -0.4) (layer B.Fab) (width 0.025))
- (fp_line (start 0.8 -0.4) (end -0.8 -0.4) (layer B.Fab) (width 0.025))
+ (fp_line (start -1.365 -0.665) (end -1.365 0.665) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 1.365 -0.665) (end -1.365 -0.665) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 1.365 0.665) (end 1.365 -0.665) (layer B.CrtYd) (width 0.05))
+ (fp_line (start -1.365 0.665) (end 1.365 0.665) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 0.145 0.46) (end -0.145 0.46) (layer B.SilkS) (width 0.12))
+ (fp_line (start -0.145 -0.46) (end 0.145 -0.46) (layer B.SilkS) (width 0.12))
(fp_line (start -0.8 -0.4) (end -0.8 0.4) (layer B.Fab) (width 0.025))
- (fp_line (start -0.8 0.645) (end 0.8 0.645) (layer B.SilkS) (width 0.12))
- (fp_line (start 0.8 -0.645) (end -0.8 -0.645) (layer B.SilkS) (width 0.12))
- (fp_line (start -1.465 0.715) (end 1.465 0.715) (layer B.CrtYd) (width 0.05))
- (fp_line (start 1.465 0.715) (end 1.465 -0.715) (layer B.CrtYd) (width 0.05))
- (fp_line (start 1.465 -0.715) (end -1.465 -0.715) (layer B.CrtYd) (width 0.05))
- (fp_line (start -1.465 -0.715) (end -1.465 0.715) (layer B.CrtYd) (width 0.05))
- (pad 1 smd rect (at -0.77 0 270) (size 0.89 0.93) (layers 4_bot B.Paste B.Mask)
- (net 47 GND))
- (pad 2 smd rect (at 0.77 0 270) (size 0.89 0.93) (layers 4_bot B.Paste B.Mask)
+ (fp_line (start 0.8 -0.4) (end -0.8 -0.4) (layer B.Fab) (width 0.025))
+ (fp_line (start 0.8 0.4) (end 0.8 -0.4) (layer B.Fab) (width 0.025))
+ (fp_line (start -0.8 0.4) (end 0.8 0.4) (layer B.Fab) (width 0.025))
+ (fp_text user %R (at 0 0 270) (layer B.Fab)
+ (effects (font (size 0.45 0.45) (thickness 0.025)) (justify mirror))
+ )
+ (pad 2 smd rect (at 0.745 0 270) (size 0.84 0.93) (layers 4_bot B.Paste B.Mask)
(net 77 /audio/REGFIL))
- (model Capacitors_SMD.3dshapes/C_0603.wrl
+ (pad 1 smd rect (at -0.745 0 270) (size 0.84 0.93) (layers 4_bot B.Paste B.Mask)
+ (net 47 GND))
+ (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.step
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
- (module ipc_capc:IPC_CAPC1608X90L35N (layer 4_bot) (tedit 58FD8BA8) (tstamp 58EB023F)
+ (module ipc_capc:IPC_CAPC160X80X90L35N (layer 4_bot) (tedit 5BD22B8E) (tstamp 5BD11B11)
(at 155.3 106.2 270)
(path /53A8BFC3/53A8C68D)
(attr smd)
@@ -2792,28 +3229,31 @@
(fp_text value 2U2 (at 0 0 270) (layer B.Fab)
(effects (font (size 0.6096 0.6096) (thickness 0.12)) (justify mirror))
)
+ (fp_text user %R (at 0 0 270) (layer B.Fab)
+ (effects (font (size 0.45 0.45) (thickness 0.025)) (justify mirror))
+ )
(fp_line (start -0.8 0.4) (end 0.8 0.4) (layer B.Fab) (width 0.025))
(fp_line (start 0.8 0.4) (end 0.8 -0.4) (layer B.Fab) (width 0.025))
(fp_line (start 0.8 -0.4) (end -0.8 -0.4) (layer B.Fab) (width 0.025))
(fp_line (start -0.8 -0.4) (end -0.8 0.4) (layer B.Fab) (width 0.025))
- (fp_line (start -0.8 0.645) (end 0.8 0.645) (layer B.SilkS) (width 0.12))
- (fp_line (start 0.8 -0.645) (end -0.8 -0.645) (layer B.SilkS) (width 0.12))
- (fp_line (start -1.465 0.715) (end 1.465 0.715) (layer B.CrtYd) (width 0.05))
- (fp_line (start 1.465 0.715) (end 1.465 -0.715) (layer B.CrtYd) (width 0.05))
- (fp_line (start 1.465 -0.715) (end -1.465 -0.715) (layer B.CrtYd) (width 0.05))
- (fp_line (start -1.465 -0.715) (end -1.465 0.715) (layer B.CrtYd) (width 0.05))
- (pad 1 smd rect (at -0.77 0 270) (size 0.89 0.93) (layers 4_bot B.Paste B.Mask)
- (net 47 GND))
- (pad 2 smd rect (at 0.77 0 270) (size 0.89 0.93) (layers 4_bot B.Paste B.Mask)
+ (fp_line (start -0.145 -0.46) (end 0.145 -0.46) (layer B.SilkS) (width 0.12))
+ (fp_line (start 0.145 0.46) (end -0.145 0.46) (layer B.SilkS) (width 0.12))
+ (fp_line (start -1.365 0.665) (end 1.365 0.665) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 1.365 0.665) (end 1.365 -0.665) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 1.365 -0.665) (end -1.365 -0.665) (layer B.CrtYd) (width 0.05))
+ (fp_line (start -1.365 -0.665) (end -1.365 0.665) (layer B.CrtYd) (width 0.05))
+ (pad 1 smd rect (at -0.745 0 270) (size 0.84 0.93) (layers 4_bot B.Paste B.Mask)
+ (net 47 GND))
+ (pad 2 smd rect (at 0.745 0 270) (size 0.84 0.93) (layers 4_bot B.Paste B.Mask)
(net 76 /audio/VCOM))
- (model Capacitors_SMD.3dshapes/C_0603.wrl
+ (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.step
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
- (module ipc_capc:IPC_CAPC1608X90L35N (layer 4_bot) (tedit 58FD8BD0) (tstamp 58EB0221)
+ (module ipc_capc:IPC_CAPC160X80X90L35N (layer 4_bot) (tedit 5BD22BA7) (tstamp 5BD11B01)
(at 149.9 108.4 90)
(path /53A8BFC3/53A8C6F6)
(attr smd)
@@ -2823,28 +3263,31 @@
(fp_text value 2U2 (at 0 0 90) (layer B.Fab)
(effects (font (size 0.6096 0.6096) (thickness 0.12)) (justify mirror))
)
+ (fp_text user %R (at 0 0 90) (layer B.Fab)
+ (effects (font (size 0.45 0.45) (thickness 0.025)) (justify mirror))
+ )
(fp_line (start -0.8 0.4) (end 0.8 0.4) (layer B.Fab) (width 0.025))
(fp_line (start 0.8 0.4) (end 0.8 -0.4) (layer B.Fab) (width 0.025))
(fp_line (start 0.8 -0.4) (end -0.8 -0.4) (layer B.Fab) (width 0.025))
(fp_line (start -0.8 -0.4) (end -0.8 0.4) (layer B.Fab) (width 0.025))
- (fp_line (start -0.8 0.645) (end 0.8 0.645) (layer B.SilkS) (width 0.12))
- (fp_line (start 0.8 -0.645) (end -0.8 -0.645) (layer B.SilkS) (width 0.12))
- (fp_line (start -1.465 0.715) (end 1.465 0.715) (layer B.CrtYd) (width 0.05))
- (fp_line (start 1.465 0.715) (end 1.465 -0.715) (layer B.CrtYd) (width 0.05))
- (fp_line (start 1.465 -0.715) (end -1.465 -0.715) (layer B.CrtYd) (width 0.05))
- (fp_line (start -1.465 -0.715) (end -1.465 0.715) (layer B.CrtYd) (width 0.05))
- (pad 1 smd rect (at -0.77 0 90) (size 0.89 0.93) (layers 4_bot B.Paste B.Mask)
+ (fp_line (start -0.145 -0.46) (end 0.145 -0.46) (layer B.SilkS) (width 0.12))
+ (fp_line (start 0.145 0.46) (end -0.145 0.46) (layer B.SilkS) (width 0.12))
+ (fp_line (start -1.365 0.665) (end 1.365 0.665) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 1.365 0.665) (end 1.365 -0.665) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 1.365 -0.665) (end -1.365 -0.665) (layer B.CrtYd) (width 0.05))
+ (fp_line (start -1.365 -0.665) (end -1.365 0.665) (layer B.CrtYd) (width 0.05))
+ (pad 1 smd rect (at -0.745 0 90) (size 0.84 0.93) (layers 4_bot B.Paste B.Mask)
(net 75 /audio/VEE))
- (pad 2 smd rect (at 0.77 0 90) (size 0.89 0.93) (layers 4_bot B.Paste B.Mask)
+ (pad 2 smd rect (at 0.745 0 90) (size 0.84 0.93) (layers 4_bot B.Paste B.Mask)
(net 47 GND))
- (model Capacitors_SMD.3dshapes/C_0603.wrl
+ (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.step
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
- (module ipc_capc:IPC_CAPC1608X90L35N (layer 4_bot) (tedit 58FD8BC3) (tstamp 58EB0203)
+ (module ipc_capc:IPC_CAPC160X80X90L35N (layer 4_bot) (tedit 5BD22B8A) (tstamp 5BD11AE1)
(at 151.9 106.4 90)
(path /53A8BFC3/53A8C687)
(attr smd)
@@ -2854,28 +3297,31 @@
(fp_text value 2U2 (at 0 0 90) (layer B.Fab)
(effects (font (size 0.6096 0.6096) (thickness 0.12)) (justify mirror))
)
- (fp_line (start -0.8 0.4) (end 0.8 0.4) (layer B.Fab) (width 0.025))
- (fp_line (start 0.8 0.4) (end 0.8 -0.4) (layer B.Fab) (width 0.025))
- (fp_line (start 0.8 -0.4) (end -0.8 -0.4) (layer B.Fab) (width 0.025))
+ (fp_line (start -1.365 -0.665) (end -1.365 0.665) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 1.365 -0.665) (end -1.365 -0.665) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 1.365 0.665) (end 1.365 -0.665) (layer B.CrtYd) (width 0.05))
+ (fp_line (start -1.365 0.665) (end 1.365 0.665) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 0.145 0.46) (end -0.145 0.46) (layer B.SilkS) (width 0.12))
+ (fp_line (start -0.145 -0.46) (end 0.145 -0.46) (layer B.SilkS) (width 0.12))
(fp_line (start -0.8 -0.4) (end -0.8 0.4) (layer B.Fab) (width 0.025))
- (fp_line (start -0.8 0.645) (end 0.8 0.645) (layer B.SilkS) (width 0.12))
- (fp_line (start 0.8 -0.645) (end -0.8 -0.645) (layer B.SilkS) (width 0.12))
- (fp_line (start -1.465 0.715) (end 1.465 0.715) (layer B.CrtYd) (width 0.05))
- (fp_line (start 1.465 0.715) (end 1.465 -0.715) (layer B.CrtYd) (width 0.05))
- (fp_line (start 1.465 -0.715) (end -1.465 -0.715) (layer B.CrtYd) (width 0.05))
- (fp_line (start -1.465 -0.715) (end -1.465 0.715) (layer B.CrtYd) (width 0.05))
- (pad 1 smd rect (at -0.77 0 90) (size 0.89 0.93) (layers 4_bot B.Paste B.Mask)
- (net 73 /audio/CP))
- (pad 2 smd rect (at 0.77 0 90) (size 0.89 0.93) (layers 4_bot B.Paste B.Mask)
+ (fp_line (start 0.8 -0.4) (end -0.8 -0.4) (layer B.Fab) (width 0.025))
+ (fp_line (start 0.8 0.4) (end 0.8 -0.4) (layer B.Fab) (width 0.025))
+ (fp_line (start -0.8 0.4) (end 0.8 0.4) (layer B.Fab) (width 0.025))
+ (fp_text user %R (at 0 0 90) (layer B.Fab)
+ (effects (font (size 0.45 0.45) (thickness 0.025)) (justify mirror))
+ )
+ (pad 2 smd rect (at 0.745 0 90) (size 0.84 0.93) (layers 4_bot B.Paste B.Mask)
(net 74 /audio/CN))
- (model Capacitors_SMD.3dshapes/C_0603.wrl
+ (pad 1 smd rect (at -0.745 0 90) (size 0.84 0.93) (layers 4_bot B.Paste B.Mask)
+ (net 73 /audio/CP))
+ (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.step
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
- (module ipc_capc:IPC_CAPC1608X90L35N (layer 4_bot) (tedit 58FD8BD8) (tstamp 58EB0299)
+ (module ipc_capc:IPC_CAPC160X80X90L35N (layer 4_bot) (tedit 5BD22BA2) (tstamp 5BD11B91)
(at 148.4 108.4 90)
(path /53A8BFC3/53A8C284)
(attr smd)
@@ -2885,28 +3331,31 @@
(fp_text value 220N (at 0 0 90) (layer B.Fab)
(effects (font (size 0.6096 0.6096) (thickness 0.12)) (justify mirror))
)
- (fp_line (start -0.8 0.4) (end 0.8 0.4) (layer B.Fab) (width 0.025))
- (fp_line (start 0.8 0.4) (end 0.8 -0.4) (layer B.Fab) (width 0.025))
- (fp_line (start 0.8 -0.4) (end -0.8 -0.4) (layer B.Fab) (width 0.025))
+ (fp_line (start -1.365 -0.665) (end -1.365 0.665) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 1.365 -0.665) (end -1.365 -0.665) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 1.365 0.665) (end 1.365 -0.665) (layer B.CrtYd) (width 0.05))
+ (fp_line (start -1.365 0.665) (end 1.365 0.665) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 0.145 0.46) (end -0.145 0.46) (layer B.SilkS) (width 0.12))
+ (fp_line (start -0.145 -0.46) (end 0.145 -0.46) (layer B.SilkS) (width 0.12))
(fp_line (start -0.8 -0.4) (end -0.8 0.4) (layer B.Fab) (width 0.025))
- (fp_line (start -0.8 0.645) (end 0.8 0.645) (layer B.SilkS) (width 0.12))
- (fp_line (start 0.8 -0.645) (end -0.8 -0.645) (layer B.SilkS) (width 0.12))
- (fp_line (start -1.465 0.715) (end 1.465 0.715) (layer B.CrtYd) (width 0.05))
- (fp_line (start 1.465 0.715) (end 1.465 -0.715) (layer B.CrtYd) (width 0.05))
- (fp_line (start 1.465 -0.715) (end -1.465 -0.715) (layer B.CrtYd) (width 0.05))
- (fp_line (start -1.465 -0.715) (end -1.465 0.715) (layer B.CrtYd) (width 0.05))
- (pad 1 smd rect (at -0.77 0 90) (size 0.89 0.93) (layers 4_bot B.Paste B.Mask)
- (net 2 /audio/RHPOUT))
- (pad 2 smd rect (at 0.77 0 90) (size 0.89 0.93) (layers 4_bot B.Paste B.Mask)
+ (fp_line (start 0.8 -0.4) (end -0.8 -0.4) (layer B.Fab) (width 0.025))
+ (fp_line (start 0.8 0.4) (end 0.8 -0.4) (layer B.Fab) (width 0.025))
+ (fp_line (start -0.8 0.4) (end 0.8 0.4) (layer B.Fab) (width 0.025))
+ (fp_text user %R (at 0 0 90) (layer B.Fab)
+ (effects (font (size 0.45 0.45) (thickness 0.025)) (justify mirror))
+ )
+ (pad 2 smd rect (at 0.745 0 90) (size 0.84 0.93) (layers 4_bot B.Paste B.Mask)
(net 78 "Net-(C23-Pad2)"))
- (model Capacitors_SMD.3dshapes/C_0603.wrl
+ (pad 1 smd rect (at -0.745 0 90) (size 0.84 0.93) (layers 4_bot B.Paste B.Mask)
+ (net 2 /audio/RHPOUT))
+ (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.step
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
- (module ipc_capc:IPC_CAPC1608X90L35N (layer 4_bot) (tedit 58FD8C0E) (tstamp 58EB028A)
+ (module ipc_capc:IPC_CAPC160X80X90L35N (layer 4_bot) (tedit 5BD22B9F) (tstamp 5BD11B81)
(at 146.05 108.4 90)
(path /53A8BFC3/53A8C27E)
(attr smd)
@@ -2916,28 +3365,31 @@
(fp_text value 220N (at 0 0 90) (layer B.Fab)
(effects (font (size 0.6096 0.6096) (thickness 0.12)) (justify mirror))
)
+ (fp_text user %R (at 0 0 90) (layer B.Fab)
+ (effects (font (size 0.45 0.45) (thickness 0.025)) (justify mirror))
+ )
(fp_line (start -0.8 0.4) (end 0.8 0.4) (layer B.Fab) (width 0.025))
(fp_line (start 0.8 0.4) (end 0.8 -0.4) (layer B.Fab) (width 0.025))
(fp_line (start 0.8 -0.4) (end -0.8 -0.4) (layer B.Fab) (width 0.025))
(fp_line (start -0.8 -0.4) (end -0.8 0.4) (layer B.Fab) (width 0.025))
- (fp_line (start -0.8 0.645) (end 0.8 0.645) (layer B.SilkS) (width 0.12))
- (fp_line (start 0.8 -0.645) (end -0.8 -0.645) (layer B.SilkS) (width 0.12))
- (fp_line (start -1.465 0.715) (end 1.465 0.715) (layer B.CrtYd) (width 0.05))
- (fp_line (start 1.465 0.715) (end 1.465 -0.715) (layer B.CrtYd) (width 0.05))
- (fp_line (start 1.465 -0.715) (end -1.465 -0.715) (layer B.CrtYd) (width 0.05))
- (fp_line (start -1.465 -0.715) (end -1.465 0.715) (layer B.CrtYd) (width 0.05))
- (pad 1 smd rect (at -0.77 0 90) (size 0.89 0.93) (layers 4_bot B.Paste B.Mask)
+ (fp_line (start -0.145 -0.46) (end 0.145 -0.46) (layer B.SilkS) (width 0.12))
+ (fp_line (start 0.145 0.46) (end -0.145 0.46) (layer B.SilkS) (width 0.12))
+ (fp_line (start -1.365 0.665) (end 1.365 0.665) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 1.365 0.665) (end 1.365 -0.665) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 1.365 -0.665) (end -1.365 -0.665) (layer B.CrtYd) (width 0.05))
+ (fp_line (start -1.365 -0.665) (end -1.365 0.665) (layer B.CrtYd) (width 0.05))
+ (pad 1 smd rect (at -0.745 0 90) (size 0.84 0.93) (layers 4_bot B.Paste B.Mask)
(net 1 /audio/LHPOUT))
- (pad 2 smd rect (at 0.77 0 90) (size 0.89 0.93) (layers 4_bot B.Paste B.Mask)
+ (pad 2 smd rect (at 0.745 0 90) (size 0.84 0.93) (layers 4_bot B.Paste B.Mask)
(net 92 "Net-(C22-Pad2)"))
- (model Capacitors_SMD.3dshapes/C_0603.wrl
+ (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.step
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
- (module ipc_capc:IPC_CAPC1608X90L35N (layer 4_bot) (tedit 58FD8B73) (tstamp 58EB02A8)
+ (module ipc_capc:IPC_CAPC160X80X90L35N (layer 4_bot) (tedit 5B60D757) (tstamp 5BD11BA1)
(at 161 108.7)
(path /53A8BFC3/53A8C2A2)
(attr smd)
@@ -2947,28 +3399,31 @@
(fp_text value 1U (at 0 0) (layer B.Fab)
(effects (font (size 0.6096 0.6096) (thickness 0.12)) (justify mirror))
)
+ (fp_text user %R (at 0 0) (layer B.Fab)
+ (effects (font (size 0.45 0.45) (thickness 0.025)) (justify mirror))
+ )
(fp_line (start -0.8 0.4) (end 0.8 0.4) (layer B.Fab) (width 0.025))
(fp_line (start 0.8 0.4) (end 0.8 -0.4) (layer B.Fab) (width 0.025))
(fp_line (start 0.8 -0.4) (end -0.8 -0.4) (layer B.Fab) (width 0.025))
(fp_line (start -0.8 -0.4) (end -0.8 0.4) (layer B.Fab) (width 0.025))
- (fp_line (start -0.8 0.645) (end 0.8 0.645) (layer B.SilkS) (width 0.12))
- (fp_line (start 0.8 -0.645) (end -0.8 -0.645) (layer B.SilkS) (width 0.12))
- (fp_line (start -1.465 0.715) (end 1.465 0.715) (layer B.CrtYd) (width 0.05))
- (fp_line (start 1.465 0.715) (end 1.465 -0.715) (layer B.CrtYd) (width 0.05))
- (fp_line (start 1.465 -0.715) (end -1.465 -0.715) (layer B.CrtYd) (width 0.05))
- (fp_line (start -1.465 -0.715) (end -1.465 0.715) (layer B.CrtYd) (width 0.05))
- (pad 1 smd rect (at -0.77 0) (size 0.89 0.93) (layers 4_bot B.Paste B.Mask)
+ (fp_line (start -0.145 -0.46) (end 0.145 -0.46) (layer B.SilkS) (width 0.12))
+ (fp_line (start 0.145 0.46) (end -0.145 0.46) (layer B.SilkS) (width 0.12))
+ (fp_line (start -1.365 0.665) (end 1.365 0.665) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 1.365 0.665) (end 1.365 -0.665) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 1.365 -0.665) (end -1.365 -0.665) (layer B.CrtYd) (width 0.05))
+ (fp_line (start -1.365 -0.665) (end -1.365 0.665) (layer B.CrtYd) (width 0.05))
+ (pad 1 smd rect (at -0.745 0) (size 0.84 0.93) (layers 4_bot B.Paste B.Mask)
(net 79 "Net-(C25-Pad1)"))
- (pad 2 smd rect (at 0.77 0) (size 0.89 0.93) (layers 4_bot B.Paste B.Mask)
+ (pad 2 smd rect (at 0.745 0) (size 0.84 0.93) (layers 4_bot B.Paste B.Mask)
(net 90 /audio/MIC))
- (model Capacitors_SMD.3dshapes/C_0603.wrl
+ (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.step
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
- (module ipc_capc:IPC_CAPC1608X90L35N (layer 4_bot) (tedit 58FD8839) (tstamp 58EB027B)
+ (module ipc_capc:IPC_CAPC160X80X90L35N (layer 4_bot) (tedit 5BD22CF9) (tstamp 5BD11B51)
(at 97.2 148.5 270)
(path /53A9129D/58D0DFA2)
(attr smd)
@@ -2978,21 +3433,24 @@
(fp_text value 1U (at 0 0 270) (layer B.Fab)
(effects (font (size 0.6096 0.6096) (thickness 0.12)) (justify mirror))
)
+ (fp_text user %R (at 0 0 270) (layer B.Fab)
+ (effects (font (size 0.45 0.45) (thickness 0.025)) (justify mirror))
+ )
(fp_line (start -0.8 0.4) (end 0.8 0.4) (layer B.Fab) (width 0.025))
(fp_line (start 0.8 0.4) (end 0.8 -0.4) (layer B.Fab) (width 0.025))
(fp_line (start 0.8 -0.4) (end -0.8 -0.4) (layer B.Fab) (width 0.025))
(fp_line (start -0.8 -0.4) (end -0.8 0.4) (layer B.Fab) (width 0.025))
- (fp_line (start -0.8 0.645) (end 0.8 0.645) (layer B.SilkS) (width 0.12))
- (fp_line (start 0.8 -0.645) (end -0.8 -0.645) (layer B.SilkS) (width 0.12))
- (fp_line (start -1.465 0.715) (end 1.465 0.715) (layer B.CrtYd) (width 0.05))
- (fp_line (start 1.465 0.715) (end 1.465 -0.715) (layer B.CrtYd) (width 0.05))
- (fp_line (start 1.465 -0.715) (end -1.465 -0.715) (layer B.CrtYd) (width 0.05))
- (fp_line (start -1.465 -0.715) (end -1.465 0.715) (layer B.CrtYd) (width 0.05))
- (pad 1 smd rect (at -0.77 0 270) (size 0.89 0.93) (layers 4_bot B.Paste B.Mask)
+ (fp_line (start -0.145 -0.46) (end 0.145 -0.46) (layer B.SilkS) (width 0.12))
+ (fp_line (start 0.145 0.46) (end -0.145 0.46) (layer B.SilkS) (width 0.12))
+ (fp_line (start -1.365 0.665) (end 1.365 0.665) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 1.365 0.665) (end 1.365 -0.665) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 1.365 -0.665) (end -1.365 -0.665) (layer B.CrtYd) (width 0.05))
+ (fp_line (start -1.365 -0.665) (end -1.365 0.665) (layer B.CrtYd) (width 0.05))
+ (pad 1 smd rect (at -0.745 0 270) (size 0.84 0.93) (layers 4_bot B.Paste B.Mask)
(net 121 +3V3))
- (pad 2 smd rect (at 0.77 0 270) (size 0.89 0.93) (layers 4_bot B.Paste B.Mask)
+ (pad 2 smd rect (at 0.745 0 270) (size 0.84 0.93) (layers 4_bot B.Paste B.Mask)
(net 47 GND))
- (model Capacitors_SMD.3dshapes/C_0603.wrl
+ (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.step
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
@@ -3077,7 +3535,7 @@
(net 93 "Net-(TP1-Pad1)"))
)
- (module ipc_resc:IPC_RESC1608X55L25N (layer 4_bot) (tedit 58FD8BDE) (tstamp 58EB03F2)
+ (module ipc_resc:IPC_RESC160X80X55L25N (layer 4_bot) (tedit 5BD22B80) (tstamp 5BD11D61)
(at 148.4 105.4 90)
(path /53A8BFC3/53A8C26A)
(attr smd)
@@ -3087,28 +3545,31 @@
(fp_text value 33R (at 0 0 90) (layer B.Fab)
(effects (font (size 0.6096 0.6096) (thickness 0.12)) (justify mirror))
)
- (fp_line (start -0.8 0.4) (end 0.8 0.4) (layer B.Fab) (width 0.025))
- (fp_line (start 0.8 0.4) (end 0.8 -0.4) (layer B.Fab) (width 0.025))
- (fp_line (start 0.8 -0.4) (end -0.8 -0.4) (layer B.Fab) (width 0.025))
+ (fp_line (start -1.365 -0.665) (end -1.365 0.665) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 1.365 -0.665) (end -1.365 -0.665) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 1.365 0.665) (end 1.365 -0.665) (layer B.CrtYd) (width 0.05))
+ (fp_line (start -1.365 0.665) (end 1.365 0.665) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 0.245 0.46) (end -0.245 0.46) (layer B.SilkS) (width 0.12))
+ (fp_line (start -0.245 -0.46) (end 0.245 -0.46) (layer B.SilkS) (width 0.12))
(fp_line (start -0.8 -0.4) (end -0.8 0.4) (layer B.Fab) (width 0.025))
- (fp_line (start -0.8 0.645) (end 0.8 0.645) (layer B.SilkS) (width 0.12))
- (fp_line (start 0.8 -0.645) (end -0.8 -0.645) (layer B.SilkS) (width 0.12))
- (fp_line (start -1.465 0.715) (end 1.465 0.715) (layer B.CrtYd) (width 0.05))
- (fp_line (start 1.465 0.715) (end 1.465 -0.715) (layer B.CrtYd) (width 0.05))
- (fp_line (start 1.465 -0.715) (end -1.465 -0.715) (layer B.CrtYd) (width 0.05))
- (fp_line (start -1.465 -0.715) (end -1.465 0.715) (layer B.CrtYd) (width 0.05))
- (pad 1 smd rect (at -0.82 0 90) (size 0.79 0.93) (layers 4_bot B.Paste B.Mask)
- (net 78 "Net-(C23-Pad2)"))
- (pad 2 smd rect (at 0.82 0 90) (size 0.79 0.93) (layers 4_bot B.Paste B.Mask)
+ (fp_line (start 0.8 -0.4) (end -0.8 -0.4) (layer B.Fab) (width 0.025))
+ (fp_line (start 0.8 0.4) (end 0.8 -0.4) (layer B.Fab) (width 0.025))
+ (fp_line (start -0.8 0.4) (end 0.8 0.4) (layer B.Fab) (width 0.025))
+ (fp_text user %R (at 0 0 90) (layer B.Fab)
+ (effects (font (size 0.45 0.45) (thickness 0.025)) (justify mirror))
+ )
+ (pad 2 smd rect (at 0.795 0 90) (size 0.74 0.93) (layers 4_bot B.Paste B.Mask)
(net 47 GND))
- (model Resistors_SMD.3dshapes/R_0603.wrl
+ (pad 1 smd rect (at -0.795 0 90) (size 0.74 0.93) (layers 4_bot B.Paste B.Mask)
+ (net 78 "Net-(C23-Pad2)"))
+ (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.step
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
- (module ipc_resc:IPC_RESC1608X55L25N (layer 4_bot) (tedit 58FD8BF7) (tstamp 58EB03E3)
+ (module ipc_resc:IPC_RESC160X80X55L25N (layer 4_bot) (tedit 5BD22B7C) (tstamp 5BD11D51)
(at 146.05 105.4 90)
(path /53A8BFC3/53A8C264)
(attr smd)
@@ -3118,21 +3579,24 @@
(fp_text value 33R (at 0 0 90) (layer B.Fab)
(effects (font (size 0.6096 0.6096) (thickness 0.12)) (justify mirror))
)
+ (fp_text user %R (at 0 0 90) (layer B.Fab)
+ (effects (font (size 0.45 0.45) (thickness 0.025)) (justify mirror))
+ )
(fp_line (start -0.8 0.4) (end 0.8 0.4) (layer B.Fab) (width 0.025))
(fp_line (start 0.8 0.4) (end 0.8 -0.4) (layer B.Fab) (width 0.025))
(fp_line (start 0.8 -0.4) (end -0.8 -0.4) (layer B.Fab) (width 0.025))
(fp_line (start -0.8 -0.4) (end -0.8 0.4) (layer B.Fab) (width 0.025))
- (fp_line (start -0.8 0.645) (end 0.8 0.645) (layer B.SilkS) (width 0.12))
- (fp_line (start 0.8 -0.645) (end -0.8 -0.645) (layer B.SilkS) (width 0.12))
- (fp_line (start -1.465 0.715) (end 1.465 0.715) (layer B.CrtYd) (width 0.05))
- (fp_line (start 1.465 0.715) (end 1.465 -0.715) (layer B.CrtYd) (width 0.05))
- (fp_line (start 1.465 -0.715) (end -1.465 -0.715) (layer B.CrtYd) (width 0.05))
- (fp_line (start -1.465 -0.715) (end -1.465 0.715) (layer B.CrtYd) (width 0.05))
- (pad 1 smd rect (at -0.82 0 90) (size 0.79 0.93) (layers 4_bot B.Paste B.Mask)
+ (fp_line (start -0.245 -0.46) (end 0.245 -0.46) (layer B.SilkS) (width 0.12))
+ (fp_line (start 0.245 0.46) (end -0.245 0.46) (layer B.SilkS) (width 0.12))
+ (fp_line (start -1.365 0.665) (end 1.365 0.665) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 1.365 0.665) (end 1.365 -0.665) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 1.365 -0.665) (end -1.365 -0.665) (layer B.CrtYd) (width 0.05))
+ (fp_line (start -1.365 -0.665) (end -1.365 0.665) (layer B.CrtYd) (width 0.05))
+ (pad 1 smd rect (at -0.795 0 90) (size 0.74 0.93) (layers 4_bot B.Paste B.Mask)
(net 92 "Net-(C22-Pad2)"))
- (pad 2 smd rect (at 0.82 0 90) (size 0.79 0.93) (layers 4_bot B.Paste B.Mask)
+ (pad 2 smd rect (at 0.795 0 90) (size 0.74 0.93) (layers 4_bot B.Paste B.Mask)
(net 47 GND))
- (model Resistors_SMD.3dshapes/R_0603.wrl
+ (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.step
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
@@ -3181,10 +3645,10 @@
(solder_mask_margin 0.8255) (clearance 1.0795))
)
- (module hole:HOLE_3200UM_VIAS locked (layer 1_top) (tedit 53AA3E1E) (tstamp 53AA27FC)
+ (module hole:HOLE_3200UM_VIAS locked (layer 1_top) (tedit 5BD2303B) (tstamp 53AA27FC)
(at 64 104)
(path /5369BC14)
- (fp_text reference H5 (at 0 0) (layer F.SilkS)
+ (fp_text reference H5 (at 0 0) (layer F.SilkS) hide
(effects (font (size 0.6096 0.6096) (thickness 0.12)))
)
(fp_text value HOLE1 (at 0 0) (layer F.SilkS)
@@ -3210,10 +3674,10 @@
(net 47 GND))
)
- (module hole:HOLE_3200UM_VIAS locked (layer 1_top) (tedit 53AA3E1E) (tstamp 53AA27EF)
+ (module hole:HOLE_3200UM_VIAS locked (layer 1_top) (tedit 5BD2304A) (tstamp 53AA27EF)
(at 64 171)
(path /5369BC00)
- (fp_text reference H4 (at 0 0) (layer F.SilkS)
+ (fp_text reference H4 (at 0 0) (layer F.SilkS) hide
(effects (font (size 0.6096 0.6096) (thickness 0.12)))
)
(fp_text value HOLE1 (at 0 0) (layer F.SilkS)
@@ -3239,10 +3703,10 @@
(net 47 GND))
)
- (module hole:HOLE_3200UM_VIAS locked (layer 1_top) (tedit 53AA3E1E) (tstamp 53AA27E2)
+ (module hole:HOLE_3200UM_VIAS locked (layer 1_top) (tedit 5BD23045) (tstamp 53AA27E2)
(at 176 171)
(path /5369BBEC)
- (fp_text reference H3 (at 0 0) (layer F.SilkS)
+ (fp_text reference H3 (at 0 0) (layer F.SilkS) hide
(effects (font (size 0.6096 0.6096) (thickness 0.12)))
)
(fp_text value HOLE1 (at 0 0) (layer F.SilkS)
@@ -3268,10 +3732,10 @@
(net 47 GND))
)
- (module hole:HOLE_3200UM_VIAS locked (layer 1_top) (tedit 53AA3E1E) (tstamp 53AA27D5)
+ (module hole:HOLE_3200UM_VIAS locked (layer 1_top) (tedit 5BD23040) (tstamp 53AA27D5)
(at 176 104)
(path /5369BBD8)
- (fp_text reference H2 (at 0 0) (layer F.SilkS)
+ (fp_text reference H2 (at 0 0) (layer F.SilkS) hide
(effects (font (size 0.6096 0.6096) (thickness 0.12)))
)
(fp_text value HOLE1 (at 0 0) (layer F.SilkS)
@@ -3297,97 +3761,107 @@
(net 47 GND))
)
- (module ipc_capc:IPC_CAPC2012X135L45N (layer 4_bot) (tedit 58FD8B18) (tstamp 58F1AEDB)
+ (module ipc_capc:IPC_CAPC200X125X135L45N (layer 4_bot) (tedit 5BD22C03) (tstamp 5BD11A99)
(at 173.65 121.85 90)
(path /58CFF3E3/58F1AC44)
+ (attr smd)
(fp_text reference C1 (at -0.05 2.85 90) (layer B.SilkS)
(effects (font (size 0.6096 0.6096) (thickness 0.12)) (justify mirror))
)
(fp_text value 1U (at 0 0 90) (layer B.Fab)
(effects (font (size 0.6096 0.6096) (thickness 0.12)) (justify mirror))
)
+ (fp_text user %R (at 0 0 90) (layer B.Fab)
+ (effects (font (size 0.6 0.6) (thickness 0.025)) (justify mirror))
+ )
(fp_line (start -1 0.625) (end 1 0.625) (layer B.Fab) (width 0.025))
(fp_line (start 1 0.625) (end 1 -0.625) (layer B.Fab) (width 0.025))
(fp_line (start 1 -0.625) (end -1 -0.625) (layer B.Fab) (width 0.025))
(fp_line (start -1 -0.625) (end -1 0.625) (layer B.Fab) (width 0.025))
- (fp_line (start -1 0.87) (end 1 0.87) (layer B.SilkS) (width 0.12))
- (fp_line (start 1 -0.87) (end -1 -0.87) (layer B.SilkS) (width 0.12))
- (fp_line (start -1.665 0.94) (end 1.665 0.94) (layer B.CrtYd) (width 0.05))
- (fp_line (start 1.665 0.94) (end 1.665 -0.94) (layer B.CrtYd) (width 0.05))
- (fp_line (start 1.665 -0.94) (end -1.665 -0.94) (layer B.CrtYd) (width 0.05))
- (fp_line (start -1.665 -0.94) (end -1.665 0.94) (layer B.CrtYd) (width 0.05))
- (pad 1 smd rect (at -0.89 0 90) (size 1.05 1.38) (layers 4_bot B.Paste B.Mask)
+ (fp_line (start -0.185 -0.685) (end 0.185 -0.685) (layer B.SilkS) (width 0.12))
+ (fp_line (start 0.185 0.685) (end -0.185 0.685) (layer B.SilkS) (width 0.12))
+ (fp_line (start -1.565 0.89) (end 1.565 0.89) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 1.565 0.89) (end 1.565 -0.89) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 1.565 -0.89) (end -1.565 -0.89) (layer B.CrtYd) (width 0.05))
+ (fp_line (start -1.565 -0.89) (end -1.565 0.89) (layer B.CrtYd) (width 0.05))
+ (pad 1 smd rect (at -0.865 0 90) (size 1 1.38) (layers 4_bot B.Paste B.Mask)
(net 99 /hackrf_if/VBUS))
- (pad 2 smd rect (at 0.89 0 90) (size 1.05 1.38) (layers 4_bot B.Paste B.Mask)
+ (pad 2 smd rect (at 0.865 0 90) (size 1 1.38) (layers 4_bot B.Paste B.Mask)
(net 47 GND))
- (model Capacitors_SMD.3dshapes/C_0805.wrl
+ (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0805_2012Metric.step
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
- (module ipc_capc:IPC_CAPC2012X135L45N (layer 4_bot) (tedit 58FD902D) (tstamp 58F1AEE7)
+ (module ipc_capc:IPC_CAPC200X125X135L45N (layer 4_bot) (tedit 5BD22BFB) (tstamp 5BD11B71)
(at 170.6 120 90)
(path /58CFF3E3/58F1AE50)
+ (attr smd)
(fp_text reference C16 (at 1 2.35 90) (layer B.SilkS)
(effects (font (size 0.6096 0.6096) (thickness 0.12)) (justify mirror))
)
(fp_text value 4U7 (at 0 0 90) (layer B.Fab)
(effects (font (size 0.6096 0.6096) (thickness 0.12)) (justify mirror))
)
- (fp_line (start -1 0.625) (end 1 0.625) (layer B.Fab) (width 0.025))
- (fp_line (start 1 0.625) (end 1 -0.625) (layer B.Fab) (width 0.025))
- (fp_line (start 1 -0.625) (end -1 -0.625) (layer B.Fab) (width 0.025))
+ (fp_line (start -1.565 -0.89) (end -1.565 0.89) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 1.565 -0.89) (end -1.565 -0.89) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 1.565 0.89) (end 1.565 -0.89) (layer B.CrtYd) (width 0.05))
+ (fp_line (start -1.565 0.89) (end 1.565 0.89) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 0.185 0.685) (end -0.185 0.685) (layer B.SilkS) (width 0.12))
+ (fp_line (start -0.185 -0.685) (end 0.185 -0.685) (layer B.SilkS) (width 0.12))
(fp_line (start -1 -0.625) (end -1 0.625) (layer B.Fab) (width 0.025))
- (fp_line (start -1 0.87) (end 1 0.87) (layer B.SilkS) (width 0.12))
- (fp_line (start 1 -0.87) (end -1 -0.87) (layer B.SilkS) (width 0.12))
- (fp_line (start -1.665 0.94) (end 1.665 0.94) (layer B.CrtYd) (width 0.05))
- (fp_line (start 1.665 0.94) (end 1.665 -0.94) (layer B.CrtYd) (width 0.05))
- (fp_line (start 1.665 -0.94) (end -1.665 -0.94) (layer B.CrtYd) (width 0.05))
- (fp_line (start -1.665 -0.94) (end -1.665 0.94) (layer B.CrtYd) (width 0.05))
- (pad 1 smd rect (at -0.89 0 90) (size 1.05 1.38) (layers 4_bot B.Paste B.Mask)
- (net 72 /power/AUDIO_SVDD))
- (pad 2 smd rect (at 0.89 0 90) (size 1.05 1.38) (layers 4_bot B.Paste B.Mask)
+ (fp_line (start 1 -0.625) (end -1 -0.625) (layer B.Fab) (width 0.025))
+ (fp_line (start 1 0.625) (end 1 -0.625) (layer B.Fab) (width 0.025))
+ (fp_line (start -1 0.625) (end 1 0.625) (layer B.Fab) (width 0.025))
+ (fp_text user %R (at 0 0 90) (layer B.Fab)
+ (effects (font (size 0.6 0.6) (thickness 0.025)) (justify mirror))
+ )
+ (pad 2 smd rect (at 0.865 0 90) (size 1 1.38) (layers 4_bot B.Paste B.Mask)
(net 47 GND))
- (model Capacitors_SMD.3dshapes/C_0805.wrl
+ (pad 1 smd rect (at -0.865 0 90) (size 1 1.38) (layers 4_bot B.Paste B.Mask)
+ (net 72 /power/AUDIO_SVDD))
+ (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0805_2012Metric.step
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
- (module ipc_resc:IPC_RESC1005X40L25N (layer 4_bot) (tedit 58FD8AE6) (tstamp 58F45929)
+ (module ipc_resc:IPC_RESC100X50X40L25N (layer 4_bot) (tedit 5BD22C16) (tstamp 5BD11D71)
(at 166.8 125.15 90)
(path /58CFF3E3/58F4495E)
+ (attr smd)
(fp_text reference R13 (at -1.75 -1.6 90) (layer B.SilkS)
(effects (font (size 0.6096 0.6096) (thickness 0.12)) (justify mirror))
)
(fp_text value 10K (at 0 0 90) (layer B.Fab)
(effects (font (size 0.6096 0.6096) (thickness 0.12)) (justify mirror))
)
- (fp_line (start -0.5 0.25) (end 0.5 0.25) (layer B.Fab) (width 0.025))
- (fp_line (start 0.5 0.25) (end 0.5 -0.25) (layer B.Fab) (width 0.025))
- (fp_line (start 0.5 -0.25) (end -0.5 -0.25) (layer B.Fab) (width 0.025))
+ (fp_line (start -0.9 -0.44) (end -0.9 0.44) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 0.9 -0.44) (end -0.9 -0.44) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 0.9 0.44) (end 0.9 -0.44) (layer B.CrtYd) (width 0.05))
+ (fp_line (start -0.9 0.44) (end 0.9 0.44) (layer B.CrtYd) (width 0.05))
(fp_line (start -0.5 -0.25) (end -0.5 0.25) (layer B.Fab) (width 0.025))
- (fp_line (start -0.5 0.48) (end 0.5 0.48) (layer B.SilkS) (width 0.12))
- (fp_line (start 0.5 -0.48) (end -0.5 -0.48) (layer B.SilkS) (width 0.12))
- (fp_line (start -0.85 0.54) (end 0.85 0.54) (layer B.CrtYd) (width 0.05))
- (fp_line (start 0.85 0.54) (end 0.85 -0.54) (layer B.CrtYd) (width 0.05))
- (fp_line (start 0.85 -0.54) (end -0.85 -0.54) (layer B.CrtYd) (width 0.05))
- (fp_line (start -0.85 -0.54) (end -0.85 0.54) (layer B.CrtYd) (width 0.05))
- (pad 1 smd rect (at -0.43 0 90) (size 0.54 0.6) (layers 4_bot B.Paste B.Mask)
- (net 72 /power/AUDIO_SVDD))
- (pad 2 smd rect (at 0.43 0 90) (size 0.54 0.6) (layers 4_bot B.Paste B.Mask)
+ (fp_line (start 0.5 -0.25) (end -0.5 -0.25) (layer B.Fab) (width 0.025))
+ (fp_line (start 0.5 0.25) (end 0.5 -0.25) (layer B.Fab) (width 0.025))
+ (fp_line (start -0.5 0.25) (end 0.5 0.25) (layer B.Fab) (width 0.025))
+ (fp_text user %R (at 0 0 90) (layer B.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)) (justify mirror))
+ )
+ (pad 2 smd rect (at 0.46 0 90) (size 0.58 0.58) (layers 4_bot B.Paste B.Mask)
(net 107 "Net-(R13-Pad2)"))
- (model Resistors_SMD.3dshapes/R_0402.wrl
+ (pad 1 smd rect (at -0.46 0 90) (size 0.58 0.58) (layers 4_bot B.Paste B.Mask)
+ (net 72 /power/AUDIO_SVDD))
+ (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0402_1005Metric.step
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
- (module ipc_capc:IPC_CAPC2012X135L45N (layer 4_bot) (tedit 58FD88B7) (tstamp 58EB032F)
+ (module ipc_capc:IPC_CAPC200X125X135L45N (layer 4_bot) (tedit 5B60D756) (tstamp 5BD11C25)
(at 114.1 139.9)
(path /53A8C780/53A8D5C8)
(attr smd)
@@ -3397,326 +3871,31 @@
(fp_text value 10U (at 0 0) (layer B.Fab)
(effects (font (size 0.6096 0.6096) (thickness 0.12)) (justify mirror))
)
- (fp_line (start -1 0.625) (end 1 0.625) (layer B.Fab) (width 0.025))
- (fp_line (start 1 0.625) (end 1 -0.625) (layer B.Fab) (width 0.025))
- (fp_line (start 1 -0.625) (end -1 -0.625) (layer B.Fab) (width 0.025))
+ (fp_line (start -1.565 -0.89) (end -1.565 0.89) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 1.565 -0.89) (end -1.565 -0.89) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 1.565 0.89) (end 1.565 -0.89) (layer B.CrtYd) (width 0.05))
+ (fp_line (start -1.565 0.89) (end 1.565 0.89) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 0.185 0.685) (end -0.185 0.685) (layer B.SilkS) (width 0.12))
+ (fp_line (start -0.185 -0.685) (end 0.185 -0.685) (layer B.SilkS) (width 0.12))
(fp_line (start -1 -0.625) (end -1 0.625) (layer B.Fab) (width 0.025))
- (fp_line (start -1 0.87) (end 1 0.87) (layer B.SilkS) (width 0.12))
- (fp_line (start 1 -0.87) (end -1 -0.87) (layer B.SilkS) (width 0.12))
- (fp_line (start -1.665 0.94) (end 1.665 0.94) (layer B.CrtYd) (width 0.05))
- (fp_line (start 1.665 0.94) (end 1.665 -0.94) (layer B.CrtYd) (width 0.05))
- (fp_line (start 1.665 -0.94) (end -1.665 -0.94) (layer B.CrtYd) (width 0.05))
- (fp_line (start -1.665 -0.94) (end -1.665 0.94) (layer B.CrtYd) (width 0.05))
- (pad 1 smd rect (at -0.89 0) (size 1.05 1.38) (layers 4_bot B.Paste B.Mask)
- (net 121 +3V3))
- (pad 2 smd rect (at 0.89 0) (size 1.05 1.38) (layers 4_bot B.Paste B.Mask)
- (net 47 GND))
- (model Capacitors_SMD.3dshapes/C_0805.wrl
- (at (xyz 0 0 0))
- (scale (xyz 1 1 1))
- (rotate (xyz 0 0 0))
- )
- )
-
- (module header:HEADER_11X2_REV_SM_254_AP locked (layer 4_bot) (tedit 5919730F) (tstamp 53AA299C)
- (at 123.5 143.25)
- (descr "MLE TSHSM-1")
- (path /53A8C780/53A8CDBE)
- (attr smd)
- (fp_text reference P28 (at 3.6 14.85) (layer B.SilkS)
- (effects (font (size 0.6096 0.6096) (thickness 0.12)) (justify mirror))
- )
- (fp_text value HACKRF_ONE_P28 (at 0 0) (layer B.Fab)
- (effects (font (size 0.6096 0.6096) (thickness 0.12)) (justify mirror))
- )
- (fp_line (start -2.5 13.97) (end -2.5 13.39) (layer B.SilkS) (width 0.12))
- (fp_line (start -2.5 12.01) (end -2.5 10.85) (layer B.SilkS) (width 0.12))
- (fp_line (start 2.5 13.97) (end 2.5 13.39) (layer B.SilkS) (width 0.12))
- (fp_line (start -4.82 14.47) (end 4.82 14.47) (layer B.CrtYd) (width 0.05))
- (fp_line (start -4.82 -14.47) (end -4.82 14.47) (layer B.CrtYd) (width 0.05))
- (fp_line (start 4.82 -14.47) (end -4.82 -14.47) (layer B.CrtYd) (width 0.05))
- (fp_line (start 4.82 14.47) (end 4.82 -14.47) (layer B.CrtYd) (width 0.05))
- (fp_circle (center 3.025 14) (end 2.9 14) (layer B.SilkS) (width 0.25))
- (fp_line (start -2.5 13.97) (end 2.5 13.97) (layer B.SilkS) (width 0.12))
- (fp_line (start 2.5 -13.97) (end -2.5 -13.97) (layer B.SilkS) (width 0.12))
- (fp_line (start -2.5 13.97) (end 2.5 13.97) (layer B.Fab) (width 0.025))
- (fp_line (start 2.5 13.97) (end 2.5 -13.97) (layer B.Fab) (width 0.025))
- (fp_line (start 2.5 -13.97) (end -2.5 -13.97) (layer B.Fab) (width 0.025))
- (fp_line (start -2.5 -13.97) (end -2.5 13.97) (layer B.Fab) (width 0.025))
- (fp_line (start 2.5 12.01) (end 2.5 10.85) (layer B.SilkS) (width 0.12))
- (fp_line (start -2.5 9.47) (end -2.5 8.31) (layer B.SilkS) (width 0.12))
- (fp_line (start 2.5 9.47) (end 2.5 8.31) (layer B.SilkS) (width 0.12))
- (fp_line (start -2.5 6.93) (end -2.5 5.77) (layer B.SilkS) (width 0.12))
- (fp_line (start 2.5 6.93) (end 2.5 5.77) (layer B.SilkS) (width 0.12))
- (fp_line (start -2.5 4.39) (end -2.5 3.23) (layer B.SilkS) (width 0.12))
- (fp_line (start 2.5 4.39) (end 2.5 3.23) (layer B.SilkS) (width 0.12))
- (fp_line (start -2.5 1.85) (end -2.5 0.69) (layer B.SilkS) (width 0.12))
- (fp_line (start 2.5 1.85) (end 2.5 0.69) (layer B.SilkS) (width 0.12))
- (fp_line (start -2.5 -0.69) (end -2.5 -1.85) (layer B.SilkS) (width 0.12))
- (fp_line (start 2.5 -0.69) (end 2.5 -1.85) (layer B.SilkS) (width 0.12))
- (fp_line (start -2.5 -3.23) (end -2.5 -4.39) (layer B.SilkS) (width 0.12))
- (fp_line (start 2.5 -3.23) (end 2.5 -4.39) (layer B.SilkS) (width 0.12))
- (fp_line (start -2.5 -5.77) (end -2.5 -6.93) (layer B.SilkS) (width 0.12))
- (fp_line (start 2.5 -5.77) (end 2.5 -6.93) (layer B.SilkS) (width 0.12))
- (fp_line (start -2.5 -8.31) (end -2.5 -9.47) (layer B.SilkS) (width 0.12))
- (fp_line (start 2.5 -8.31) (end 2.5 -9.47) (layer B.SilkS) (width 0.12))
- (fp_line (start -2.5 -10.85) (end -2.5 -12.01) (layer B.SilkS) (width 0.12))
- (fp_line (start 2.5 -10.85) (end 2.5 -12.01) (layer B.SilkS) (width 0.12))
- (fp_line (start -2.5 -13.39) (end -2.5 -13.97) (layer B.SilkS) (width 0.12))
- (fp_line (start 2.5 -13.39) (end 2.5 -13.97) (layer B.SilkS) (width 0.12))
- (pad 2 smd rect (at -2.73 12.7) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask)
- (net 47 GND))
- (pad 1 smd rect (at 2.73 12.7) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask)
- (net 121 +3V3))
- (pad 4 smd rect (at -2.73 10.16) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask)
- (net 34 /hackrf_if/SD_DAT3))
- (pad 3 smd rect (at 2.73 10.16) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask)
- (net 28 /hackrf_if/SD_CD))
- (pad 6 smd rect (at -2.73 7.62) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask)
- (net 32 /hackrf_if/SD_DAT1))
- (pad 5 smd rect (at 2.73 7.62) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask)
- (net 33 /hackrf_if/SD_DAT2))
- (pad 8 smd rect (at -2.73 5.08) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask)
- (net 63 /hackrf_if/PP_CPLD_TMS))
- (pad 7 smd rect (at 2.73 5.08) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask)
- (net 31 /hackrf_if/SD_DAT0))
- (pad 10 smd rect (at -2.73 2.54) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask)
- (net 64 /hackrf_if/PP_CPLD_TDO))
- (pad 9 smd rect (at 2.73 2.54) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask)
- (net 30 /hackrf_if/SD_CMD))
- (pad 12 smd rect (at -2.73 0) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask)
- (net 47 GND))
- (pad 11 smd rect (at 2.73 0) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask)
- (net 29 /hackrf_if/SD_CLK))
- (pad 14 smd rect (at -2.73 -2.54) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask))
- (pad 13 smd rect (at 2.73 -2.54) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask))
- (pad 16 smd rect (at -2.73 -5.08) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask))
- (pad 15 smd rect (at 2.73 -5.08) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask))
- (pad 18 smd rect (at -2.73 -7.62) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask))
- (pad 17 smd rect (at 2.73 -7.62) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask)
- (net 65 /hackrf_if/H1_CPLD_TCK))
- (pad 20 smd rect (at -2.73 -10.16) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask))
- (pad 19 smd rect (at 2.73 -10.16) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask)
- (net 85 /hackrf_if/I2S0_RX_SDA))
- (pad 22 smd rect (at -2.73 -12.7) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask))
- (pad 21 smd rect (at 2.73 -12.7) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask))
- (pad "" np_thru_hole circle (at 0 11.43) (size 1.95 1.95) (drill 1.95) (layers *.Cu *.Mask)
- (clearance 0.4))
- (pad "" np_thru_hole circle (at 0 -11.43) (size 1.95 1.95) (drill 1.95) (layers *.Cu *.Mask)
- (clearance 0.4))
- (model ${KISBLIB}/header.pretty/TSM-111-01-L-DV-A-P-TR.wrl
- (offset (xyz 0 0 2.539999961853027))
- (scale (xyz 1 1 1))
- (rotate (xyz -90 0 90))
- )
- )
-
- (module header:HEADER_11X2_REV_SM_254_AP locked (layer 4_bot) (tedit 5919731F) (tstamp 53AA295A)
- (at 171.76 143.25)
- (descr "MLE TSHSM-1")
- (path /53A8C780/53A8CDAE)
- (attr smd)
- (fp_text reference P20 (at 4.34 14.05) (layer B.SilkS)
- (effects (font (size 0.6096 0.6096) (thickness 0.12)) (justify mirror))
- )
- (fp_text value HACKRF_ONE_P20 (at 0 0) (layer B.Fab)
- (effects (font (size 0.6096 0.6096) (thickness 0.12)) (justify mirror))
- )
- (fp_line (start -2.5 13.97) (end -2.5 13.39) (layer B.SilkS) (width 0.12))
- (fp_line (start -2.5 12.01) (end -2.5 10.85) (layer B.SilkS) (width 0.12))
- (fp_line (start 2.5 13.97) (end 2.5 13.39) (layer B.SilkS) (width 0.12))
- (fp_line (start -4.82 14.47) (end 4.82 14.47) (layer B.CrtYd) (width 0.05))
- (fp_line (start -4.82 -14.47) (end -4.82 14.47) (layer B.CrtYd) (width 0.05))
- (fp_line (start 4.82 -14.47) (end -4.82 -14.47) (layer B.CrtYd) (width 0.05))
- (fp_line (start 4.82 14.47) (end 4.82 -14.47) (layer B.CrtYd) (width 0.05))
- (fp_circle (center 3.025 14) (end 2.9 14) (layer B.SilkS) (width 0.25))
- (fp_line (start -2.5 13.97) (end 2.5 13.97) (layer B.SilkS) (width 0.12))
- (fp_line (start 2.5 -13.97) (end -2.5 -13.97) (layer B.SilkS) (width 0.12))
- (fp_line (start -2.5 13.97) (end 2.5 13.97) (layer B.Fab) (width 0.025))
- (fp_line (start 2.5 13.97) (end 2.5 -13.97) (layer B.Fab) (width 0.025))
- (fp_line (start 2.5 -13.97) (end -2.5 -13.97) (layer B.Fab) (width 0.025))
- (fp_line (start -2.5 -13.97) (end -2.5 13.97) (layer B.Fab) (width 0.025))
- (fp_line (start 2.5 12.01) (end 2.5 10.85) (layer B.SilkS) (width 0.12))
- (fp_line (start -2.5 9.47) (end -2.5 8.31) (layer B.SilkS) (width 0.12))
- (fp_line (start 2.5 9.47) (end 2.5 8.31) (layer B.SilkS) (width 0.12))
- (fp_line (start -2.5 6.93) (end -2.5 5.77) (layer B.SilkS) (width 0.12))
- (fp_line (start 2.5 6.93) (end 2.5 5.77) (layer B.SilkS) (width 0.12))
- (fp_line (start -2.5 4.39) (end -2.5 3.23) (layer B.SilkS) (width 0.12))
- (fp_line (start 2.5 4.39) (end 2.5 3.23) (layer B.SilkS) (width 0.12))
- (fp_line (start -2.5 1.85) (end -2.5 0.69) (layer B.SilkS) (width 0.12))
- (fp_line (start 2.5 1.85) (end 2.5 0.69) (layer B.SilkS) (width 0.12))
- (fp_line (start -2.5 -0.69) (end -2.5 -1.85) (layer B.SilkS) (width 0.12))
- (fp_line (start 2.5 -0.69) (end 2.5 -1.85) (layer B.SilkS) (width 0.12))
- (fp_line (start -2.5 -3.23) (end -2.5 -4.39) (layer B.SilkS) (width 0.12))
- (fp_line (start 2.5 -3.23) (end 2.5 -4.39) (layer B.SilkS) (width 0.12))
- (fp_line (start -2.5 -5.77) (end -2.5 -6.93) (layer B.SilkS) (width 0.12))
- (fp_line (start 2.5 -5.77) (end 2.5 -6.93) (layer B.SilkS) (width 0.12))
- (fp_line (start -2.5 -8.31) (end -2.5 -9.47) (layer B.SilkS) (width 0.12))
- (fp_line (start 2.5 -8.31) (end 2.5 -9.47) (layer B.SilkS) (width 0.12))
- (fp_line (start -2.5 -10.85) (end -2.5 -12.01) (layer B.SilkS) (width 0.12))
- (fp_line (start 2.5 -10.85) (end 2.5 -12.01) (layer B.SilkS) (width 0.12))
- (fp_line (start -2.5 -13.39) (end -2.5 -13.97) (layer B.SilkS) (width 0.12))
- (fp_line (start 2.5 -13.39) (end 2.5 -13.97) (layer B.SilkS) (width 0.12))
- (pad 2 smd rect (at -2.73 12.7) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask))
- (pad 1 smd rect (at 2.73 12.7) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask)
- (net 46 /hackrf_if/VBAT))
- (pad 4 smd rect (at -2.73 10.16) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask))
- (pad 3 smd rect (at 2.73 10.16) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask)
- (net 121 +3V3))
- (pad 6 smd rect (at -2.73 7.62) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask)
- (net 49 /hackrf_if/MCU_D1))
- (pad 5 smd rect (at 2.73 7.62) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask)
- (net 50 /hackrf_if/MCU_D0))
- (pad 8 smd rect (at -2.73 5.08) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask)
- (net 51 /hackrf_if/MCU_D3))
- (pad 7 smd rect (at 2.73 5.08) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask)
- (net 52 /hackrf_if/MCU_D2))
- (pad 10 smd rect (at -2.73 2.54) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask)
- (net 53 /hackrf_if/MCU_D5))
- (pad 9 smd rect (at 2.73 2.54) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask)
- (net 54 /hackrf_if/MCU_D4))
- (pad 12 smd rect (at -2.73 0) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask)
- (net 55 /hackrf_if/MCU_D7))
- (pad 11 smd rect (at 2.73 0) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask)
- (net 56 /hackrf_if/MCU_D6))
- (pad 14 smd rect (at -2.73 -2.54) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask)
- (net 44 /hackrf_if/TP_R))
- (pad 13 smd rect (at 2.73 -2.54) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask)
- (net 47 GND))
- (pad 16 smd rect (at -2.73 -5.08) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask)
- (net 42 /hackrf_if/TP_D))
- (pad 15 smd rect (at 2.73 -5.08) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask)
- (net 47 GND))
- (pad 18 smd rect (at -2.73 -7.62) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask)
- (net 43 /hackrf_if/TP_L))
- (pad 17 smd rect (at 2.73 -7.62) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask)
- (net 100 /hackrf_if/VBUSCTRL))
- (pad 20 smd rect (at -2.73 -10.16) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask)
- (net 45 /hackrf_if/TP_U))
- (pad 19 smd rect (at 2.73 -10.16) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask)
- (net 47 GND))
- (pad 22 smd rect (at -2.73 -12.7) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask)
- (net 72 /power/AUDIO_SVDD))
- (pad 21 smd rect (at 2.73 -12.7) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask)
- (net 99 /hackrf_if/VBUS))
- (pad "" np_thru_hole circle (at 0 11.43) (size 1.95 1.95) (drill 1.95) (layers *.Cu *.Mask)
- (clearance 0.4))
- (pad "" np_thru_hole circle (at 0 -11.43) (size 1.95 1.95) (drill 1.95) (layers *.Cu *.Mask)
- (clearance 0.4))
- (model ${KISBLIB}/header.pretty/TSM-111-01-L-DV-A-P-TR.wrl
- (offset (xyz 0 0 2.539999961853027))
- (scale (xyz 1 1 1))
- (rotate (xyz -90 0 90))
+ (fp_line (start 1 -0.625) (end -1 -0.625) (layer B.Fab) (width 0.025))
+ (fp_line (start 1 0.625) (end 1 -0.625) (layer B.Fab) (width 0.025))
+ (fp_line (start -1 0.625) (end 1 0.625) (layer B.Fab) (width 0.025))
+ (fp_text user %R (at 0 0) (layer B.Fab)
+ (effects (font (size 0.6 0.6) (thickness 0.025)) (justify mirror))
)
- )
-
- (module header:HEADER_13X2_REV_SM_254_AP locked (layer 4_bot) (tedit 59197333) (tstamp 53AA297D)
- (at 152.71 164.84 90)
- (descr "MLE TSHSM-1")
- (path /53A8C780/53A8CDB6)
- (attr smd)
- (fp_text reference P22 (at 4.29 16.59 90) (layer B.SilkS)
- (effects (font (size 0.6096 0.6096) (thickness 0.12)) (justify mirror))
- )
- (fp_text value HACKRF_ONE_P22 (at 0 0 90) (layer B.Fab)
- (effects (font (size 0.6096 0.6096) (thickness 0.12)) (justify mirror))
- )
- (fp_line (start -2.5 14.55) (end -2.5 13.39) (layer B.SilkS) (width 0.12))
- (fp_line (start 2.5 -16.51) (end 2.5 -15.93) (layer B.SilkS) (width 0.12))
- (fp_line (start -2.5 -15.93) (end -2.5 -16.51) (layer B.SilkS) (width 0.12))
- (fp_line (start -4.82 17.01) (end 4.82 17.01) (layer B.CrtYd) (width 0.05))
- (fp_line (start -4.82 -17.01) (end -4.82 17.01) (layer B.CrtYd) (width 0.05))
- (fp_line (start 4.82 -17.01) (end -4.82 -17.01) (layer B.CrtYd) (width 0.05))
- (fp_line (start 4.82 17.01) (end 4.82 -17.01) (layer B.CrtYd) (width 0.05))
- (fp_circle (center 3.025 16.6) (end 2.9 16.6) (layer B.SilkS) (width 0.25))
- (fp_line (start -2.5 16.51) (end 2.5 16.51) (layer B.SilkS) (width 0.12))
- (fp_line (start 2.5 16.51) (end 2.5 15.93) (layer B.SilkS) (width 0.12))
- (fp_line (start 2.5 -16.51) (end -2.5 -16.51) (layer B.SilkS) (width 0.12))
- (fp_line (start -2.5 15.93) (end -2.5 16.51) (layer B.SilkS) (width 0.12))
- (fp_line (start -2.5 16.51) (end 2.5 16.51) (layer B.Fab) (width 0.025))
- (fp_line (start 2.5 16.51) (end 2.5 -16.51) (layer B.Fab) (width 0.025))
- (fp_line (start 2.5 -16.51) (end -2.5 -16.51) (layer B.Fab) (width 0.025))
- (fp_line (start -2.5 -16.51) (end -2.5 16.51) (layer B.Fab) (width 0.025))
- (fp_line (start 2.5 14.55) (end 2.5 13.39) (layer B.SilkS) (width 0.12))
- (fp_line (start -2.5 12.01) (end -2.5 10.85) (layer B.SilkS) (width 0.12))
- (fp_line (start 2.5 12.01) (end 2.5 10.85) (layer B.SilkS) (width 0.12))
- (fp_line (start -2.5 9.47) (end -2.5 8.31) (layer B.SilkS) (width 0.12))
- (fp_line (start 2.5 9.47) (end 2.5 8.31) (layer B.SilkS) (width 0.12))
- (fp_line (start -2.5 6.93) (end -2.5 5.77) (layer B.SilkS) (width 0.12))
- (fp_line (start 2.5 6.93) (end 2.5 5.77) (layer B.SilkS) (width 0.12))
- (fp_line (start -2.5 4.39) (end -2.5 3.23) (layer B.SilkS) (width 0.12))
- (fp_line (start 2.5 4.39) (end 2.5 3.23) (layer B.SilkS) (width 0.12))
- (fp_line (start -2.5 1.85) (end -2.5 0.69) (layer B.SilkS) (width 0.12))
- (fp_line (start 2.5 1.85) (end 2.5 0.69) (layer B.SilkS) (width 0.12))
- (fp_line (start -2.5 -0.69) (end -2.5 -1.85) (layer B.SilkS) (width 0.12))
- (fp_line (start 2.5 -0.69) (end 2.5 -1.85) (layer B.SilkS) (width 0.12))
- (fp_line (start -2.5 -3.23) (end -2.5 -4.39) (layer B.SilkS) (width 0.12))
- (fp_line (start 2.5 -3.23) (end 2.5 -4.39) (layer B.SilkS) (width 0.12))
- (fp_line (start -2.5 -5.77) (end -2.5 -6.93) (layer B.SilkS) (width 0.12))
- (fp_line (start 2.5 -5.77) (end 2.5 -6.93) (layer B.SilkS) (width 0.12))
- (fp_line (start -2.5 -8.31) (end -2.5 -9.47) (layer B.SilkS) (width 0.12))
- (fp_line (start 2.5 -8.31) (end 2.5 -9.47) (layer B.SilkS) (width 0.12))
- (fp_line (start -2.5 -10.85) (end -2.5 -12.01) (layer B.SilkS) (width 0.12))
- (fp_line (start 2.5 -10.85) (end 2.5 -12.01) (layer B.SilkS) (width 0.12))
- (fp_line (start -2.5 -13.39) (end -2.5 -14.55) (layer B.SilkS) (width 0.12))
- (fp_line (start 2.5 -13.39) (end 2.5 -14.55) (layer B.SilkS) (width 0.12))
- (pad 2 smd rect (at -2.73 15.24 90) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask)
- (net 70 /hackrf_if/CLKIN))
- (pad 1 smd rect (at 2.73 15.24 90) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask))
- (pad 4 smd rect (at -2.73 12.7 90) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask)
- (net 47 GND))
- (pad 3 smd rect (at 2.73 12.7 90) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask)
- (net 113 /hackrf_if/RESET#))
- (pad 6 smd rect (at -2.73 10.16 90) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask)
- (net 57 /hackrf_if/MCU_LCD_TE))
- (pad 5 smd rect (at 2.73 10.16 90) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask)
- (net 58 /hackrf_if/MCU_LCD_RD))
- (pad 8 smd rect (at -2.73 7.62 90) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask))
- (pad 7 smd rect (at 2.73 7.62 90) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask))
- (pad 10 smd rect (at -2.73 5.08 90) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask)
+ (pad 2 smd rect (at 0.865 0) (size 1 1.38) (layers 4_bot B.Paste B.Mask)
(net 47 GND))
- (pad 9 smd rect (at 2.73 5.08 90) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask))
- (pad 12 smd rect (at -2.73 2.54 90) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask))
- (pad 11 smd rect (at 2.73 2.54 90) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask)
+ (pad 1 smd rect (at -0.865 0) (size 1 1.38) (layers 4_bot B.Paste B.Mask)
(net 121 +3V3))
- (pad 14 smd rect (at -2.73 0 90) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask))
- (pad 13 smd rect (at 2.73 0 90) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask)
- (net 81 /hackrf_if/I2S0_TX_SDA))
- (pad 16 smd rect (at -2.73 -2.54 90) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask)
- (net 82 /audio/BICK))
- (pad 15 smd rect (at 2.73 -2.54 90) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask)
- (net 83 /hackrf_if/I2S0_WS))
- (pad 18 smd rect (at -2.73 -5.08 90) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask)
- (net 47 GND))
- (pad 17 smd rect (at 2.73 -5.08 90) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask)
- (net 84 /hackrf_if/I2S0_MCLK))
- (pad 20 smd rect (at -2.73 -7.62 90) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask)
- (net 59 /hackrf_if/MCU_IO_STBX))
- (pad 19 smd rect (at 2.73 -7.62 90) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask)
- (net 60 /hackrf_if/MCU_ADDR))
- (pad 22 smd rect (at -2.73 -10.16 90) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask)
- (net 61 /hackrf_if/MCU_DIR))
- (pad 21 smd rect (at 2.73 -10.16 90) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask)
- (net 62 /hackrf_if/MCU_LCD_WR))
- (pad 24 smd rect (at -2.73 -12.7 90) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask)
- (net 4 /audio/SDA))
- (pad 23 smd rect (at 2.73 -12.7 90) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask)
- (net 27 /hackrf_if/P2_8))
- (pad 26 smd rect (at -2.73 -15.24 90) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask)
- (net 3 /audio/SCL))
- (pad 25 smd rect (at 2.73 -15.24 90) (size 3.18 1.02) (layers 4_bot B.Paste B.Mask))
- (pad "" np_thru_hole circle (at 0 13.97 90) (size 1.95 1.95) (drill 1.95) (layers *.Cu *.Mask)
- (clearance 0.4))
- (pad "" np_thru_hole circle (at 0 -13.97 90) (size 1.95 1.95) (drill 1.95) (layers *.Cu *.Mask)
- (clearance 0.4))
- (model ${KISBLIB}/header.pretty/TSM-113-01-L-DV-A-P-TR.wrl
- (offset (xyz 0 0 2.539999961853027))
+ (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0805_2012Metric.step
+ (at (xyz 0 0 0))
(scale (xyz 1 1 1))
- (rotate (xyz -90 0 90))
+ (rotate (xyz 0 0 0))
)
)
- (module ipc_qfp:IPC_QFP65P40_900X900X120L60X18T450N (layer 4_bot) (tedit 59232C2C) (tstamp 58F11820)
+ (module ipc_qfp:IPC_QFP65P40_900X900X120L60X18T450N (layer 4_bot) (tedit 5BD749F4) (tstamp 58F11820)
(at 105 139 225)
(path /53A8C780/53A8D11B)
(attr smd)
@@ -3726,193 +3905,190 @@
(fp_text value 5M40ZE64 (at 0 0 225) (layer B.Fab)
(effects (font (size 0.6096 0.6096) (thickness 0.12)) (justify mirror))
)
- (fp_line (start -5.21 5.21) (end 5.21 5.21) (layer B.CrtYd) (width 0.05))
- (fp_line (start 5.21 5.21) (end 5.21 -5.21) (layer B.CrtYd) (width 0.05))
- (fp_line (start 5.21 -5.21) (end -5.21 -5.21) (layer B.CrtYd) (width 0.05))
- (fp_line (start -5.21 -5.21) (end -5.21 5.21) (layer B.CrtYd) (width 0.05))
- (fp_line (start -3.56 3.56) (end -3.56 3.3) (layer B.SilkS) (width 0.12))
- (fp_line (start -3.56 -3.3) (end -3.56 -3.56) (layer B.SilkS) (width 0.12))
- (fp_line (start -3.56 -3.56) (end -3.3 -3.56) (layer B.SilkS) (width 0.12))
- (fp_line (start 3.3 -3.56) (end 3.56 -3.56) (layer B.SilkS) (width 0.12))
- (fp_line (start 3.56 -3.56) (end 3.56 -3.3) (layer B.SilkS) (width 0.12))
- (fp_line (start 3.56 3.3) (end 3.56 3.56) (layer B.SilkS) (width 0.12))
- (fp_line (start 3.56 3.56) (end 3.3 3.56) (layer B.SilkS) (width 0.12))
- (fp_line (start -3.3 3.56) (end -3.56 3.56) (layer B.SilkS) (width 0.12))
- (fp_circle (center -5.33 3) (end -5.205 3) (layer B.SilkS) (width 0.25))
- (fp_line (start -3.5 3.5) (end 3.5 3.5) (layer B.Fab) (width 0.025))
- (fp_line (start 3.5 3.5) (end 3.5 -3.5) (layer B.Fab) (width 0.025))
- (fp_line (start 3.5 -3.5) (end -3.5 -3.5) (layer B.Fab) (width 0.025))
+ (fp_text user %R (at 0 0 225) (layer B.Fab)
+ (effects (font (size 1 1) (thickness 0.025)) (justify mirror))
+ )
+ (fp_poly (pts (xy 1.1 -1.1) (xy 2.1 -1.1) (xy 2.1 -2.1) (xy 1.1 -2.1)) (layer B.Paste) (width 0))
+ (fp_poly (pts (xy -0.5 -1.1) (xy 0.5 -1.1) (xy 0.5 -2.1) (xy -0.5 -2.1)) (layer B.Paste) (width 0))
+ (fp_poly (pts (xy -2.1 -1.1) (xy -1.1 -1.1) (xy -1.1 -2.1) (xy -2.1 -2.1)) (layer B.Paste) (width 0))
+ (fp_poly (pts (xy -2.1 0.5) (xy -1.1 0.5) (xy -1.1 -0.5) (xy -2.1 -0.5)) (layer B.Paste) (width 0))
+ (fp_poly (pts (xy -0.5 0.5) (xy 0.5 0.5) (xy 0.5 -0.5) (xy -0.5 -0.5)) (layer B.Paste) (width 0))
+ (fp_poly (pts (xy 1.1 0.5) (xy 2.1 0.5) (xy 2.1 -0.5) (xy 1.1 -0.5)) (layer B.Paste) (width 0))
+ (fp_poly (pts (xy 1.1 2.1) (xy 2.1 2.1) (xy 2.1 1.1) (xy 1.1 1.1)) (layer B.Paste) (width 0))
+ (fp_poly (pts (xy -0.5 2.1) (xy 0.5 2.1) (xy 0.5 1.1) (xy -0.5 1.1)) (layer B.Paste) (width 0))
+ (fp_poly (pts (xy -0.6 0.6) (xy 0.6 0.6) (xy 0.6 -0.6) (xy -0.6 -0.6)) (layer B.Mask) (width 0))
+ (fp_poly (pts (xy 1 0.6) (xy 2.2 0.6) (xy 2.2 -0.6) (xy 1 -0.6)) (layer B.Mask) (width 0))
+ (fp_poly (pts (xy 1 -1) (xy 2.2 -1) (xy 2.2 -2.2) (xy 1 -2.2)) (layer B.Mask) (width 0))
+ (fp_poly (pts (xy -0.6 -1) (xy 0.6 -1) (xy 0.6 -2.2) (xy -0.6 -2.2)) (layer B.Mask) (width 0))
+ (fp_poly (pts (xy -2.2 -1) (xy -1 -1) (xy -1 -2.2) (xy -2.2 -2.2)) (layer B.Mask) (width 0))
+ (fp_poly (pts (xy -2.2 0.6) (xy -1 0.6) (xy -1 -0.6) (xy -2.2 -0.6)) (layer B.Mask) (width 0))
+ (fp_poly (pts (xy 1 2.2) (xy 2.2 2.2) (xy 2.2 1) (xy 1 1)) (layer B.Mask) (width 0))
+ (fp_poly (pts (xy -0.6 2.2) (xy 0.6 2.2) (xy 0.6 1) (xy -0.6 1)) (layer B.Mask) (width 0))
+ (fp_poly (pts (xy -2.2 2.2) (xy -1 2.2) (xy -1 1) (xy -2.2 1)) (layer B.Mask) (width 0))
(fp_line (start -3.5 -3.5) (end -3.5 3.5) (layer B.Fab) (width 0.025))
- (pad 65 smd rect (at -1.125 -1 225) (size 2.25 1.5) (layers 4_bot B.Paste B.Mask)
- (net 47 GND) (solder_paste_margin -0.25))
- (pad 65 smd rect (at 1.125 -1 225) (size 2.25 1.5) (layers 4_bot B.Paste B.Mask)
- (net 47 GND) (solder_paste_margin -0.25))
- (pad 65 smd rect (at 1.125 1 225) (size 2.25 1.5) (layers 4_bot B.Paste B.Mask)
- (net 47 GND) (solder_paste_margin -0.25))
- (pad 65 smd rect (at -1 -1.125 225) (size 1.5 2.25) (layers 4_bot B.Paste B.Mask)
- (net 47 GND) (solder_paste_margin -0.25))
- (pad 65 smd rect (at 1 -1.125 225) (size 1.5 2.25) (layers 4_bot B.Paste B.Mask)
- (net 47 GND) (solder_paste_margin -0.25))
- (pad 65 smd rect (at 1 1.125 225) (size 1.5 2.25) (layers 4_bot B.Paste B.Mask)
- (net 47 GND) (solder_paste_margin -0.25))
- (pad 65 smd rect (at -1 1.125 225) (size 1.5 2.25) (layers 4_bot B.Paste B.Mask)
- (net 47 GND) (solder_paste_margin -0.25))
- (pad 1 smd oval (at -4.18 3 315) (size 0.24 1.56) (layers 4_bot B.Paste B.Mask)
+ (fp_line (start 3.5 -3.5) (end -3.5 -3.5) (layer B.Fab) (width 0.025))
+ (fp_line (start 3.5 3.5) (end 3.5 -3.5) (layer B.Fab) (width 0.025))
+ (fp_line (start -3.5 3.5) (end 3.5 3.5) (layer B.Fab) (width 0.025))
+ (fp_circle (center -5.33 3) (end -5.205 3) (layer B.SilkS) (width 0.25))
+ (fp_line (start -3.3 3.560001) (end -3.56 3.56) (layer B.SilkS) (width 0.12))
+ (fp_line (start 3.56 3.56) (end 3.3 3.560001) (layer B.SilkS) (width 0.12))
+ (fp_line (start 3.560001 3.3) (end 3.56 3.56) (layer B.SilkS) (width 0.12))
+ (fp_line (start 3.56 -3.56) (end 3.560001 -3.3) (layer B.SilkS) (width 0.12))
+ (fp_line (start 3.3 -3.560001) (end 3.56 -3.56) (layer B.SilkS) (width 0.12))
+ (fp_line (start -3.56 -3.56) (end -3.3 -3.560001) (layer B.SilkS) (width 0.12))
+ (fp_line (start -3.560001 -3.3) (end -3.56 -3.56) (layer B.SilkS) (width 0.12))
+ (fp_line (start -3.56 3.56) (end -3.560001 3.3) (layer B.SilkS) (width 0.12))
+ (fp_line (start -5.21 -5.21) (end -5.21 5.21) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 5.21 -5.21) (end -5.21 -5.21) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 5.21 5.21) (end 5.21 -5.21) (layer B.CrtYd) (width 0.05))
+ (fp_line (start -5.21 5.21) (end 5.21 5.21) (layer B.CrtYd) (width 0.05))
+ (fp_poly (pts (xy -2.1 2.1) (xy -1.1 2.1) (xy -1.1 1.1) (xy -2.1 1.1)) (layer B.Paste) (width 0))
+ (pad 1 smd rect (at -4.18 3 315) (size 0.2 1.56) (layers 4_bot B.Paste B.Mask)
(net 42 /hackrf_if/TP_D))
- (pad 2 smd oval (at -4.18 2.6 315) (size 0.24 1.56) (layers 4_bot B.Paste B.Mask)
+ (pad 2 smd rect (at -4.18 2.6 315) (size 0.2 1.56) (layers 4_bot B.Paste B.Mask)
(net 43 /hackrf_if/TP_L))
- (pad 3 smd oval (at -4.18 2.2 315) (size 0.24 1.56) (layers 4_bot B.Paste B.Mask)
+ (pad 3 smd rect (at -4.18 2.2 315) (size 0.2 1.56) (layers 4_bot B.Paste B.Mask)
(net 45 /hackrf_if/TP_U))
- (pad 4 smd oval (at -4.18 1.8 315) (size 0.24 1.56) (layers 4_bot B.Paste B.Mask)
+ (pad 4 smd rect (at -4.18 1.8 315) (size 0.2 1.56) (layers 4_bot B.Paste B.Mask)
(net 80 /hackrf_if/AUDIO_RESET#))
- (pad 5 smd oval (at -4.18 1.4 315) (size 0.24 1.56) (layers 4_bot B.Paste B.Mask)
+ (pad 5 smd rect (at -4.18 1.4 315) (size 0.2 1.56) (layers 4_bot B.Paste B.Mask)
(net 126 /hackrf_if/REF_EN))
- (pad 6 smd oval (at -4.18 1 315) (size 0.24 1.56) (layers 4_bot B.Paste B.Mask)
+ (pad 6 smd rect (at -4.18 1 315) (size 0.2 1.56) (layers 4_bot B.Paste B.Mask)
(net 121 +3V3))
- (pad 7 smd oval (at -4.18 0.6 315) (size 0.24 1.56) (layers 4_bot B.Paste B.Mask)
+ (pad 7 smd rect (at -4.18 0.6 315) (size 0.2 1.56) (layers 4_bot B.Paste B.Mask)
(net 133 /hackrf_if/GPS_RESET#))
- (pad 8 smd oval (at -4.18 0.2 315) (size 0.24 1.56) (layers 4_bot B.Paste B.Mask)
+ (pad 8 smd rect (at -4.18 0.2 315) (size 0.2 1.56) (layers 4_bot B.Paste B.Mask)
(net 122 +1V8))
- (pad 9 smd oval (at -4.18 -0.2 315) (size 0.24 1.56) (layers 4_bot B.Paste B.Mask)
+ (pad 9 smd rect (at -4.18 -0.2 315) (size 0.2 1.56) (layers 4_bot B.Paste B.Mask)
(net 37 /hackrf_if/SW_R))
- (pad 10 smd oval (at -4.18 -0.6 315) (size 0.24 1.56) (layers 4_bot B.Paste B.Mask)
+ (pad 10 smd rect (at -4.18 -0.6 315) (size 0.2 1.56) (layers 4_bot B.Paste B.Mask)
(net 35 /hackrf_if/SW_D))
- (pad 11 smd oval (at -4.18 -1 315) (size 0.24 1.56) (layers 4_bot B.Paste B.Mask)
+ (pad 11 smd rect (at -4.18 -1 315) (size 0.2 1.56) (layers 4_bot B.Paste B.Mask)
(net 38 /hackrf_if/SW_ROT_A))
- (pad 12 smd oval (at -4.18 -1.4 315) (size 0.24 1.56) (layers 4_bot B.Paste B.Mask)
+ (pad 12 smd rect (at -4.18 -1.4 315) (size 0.2 1.56) (layers 4_bot B.Paste B.Mask)
(net 39 /hackrf_if/SW_ROT_B))
- (pad 13 smd oval (at -4.18 -1.8 315) (size 0.24 1.56) (layers 4_bot B.Paste B.Mask)
+ (pad 13 smd rect (at -4.18 -1.8 315) (size 0.2 1.56) (layers 4_bot B.Paste B.Mask)
(net 40 /hackrf_if/SW_SEL))
- (pad 14 smd oval (at -4.18 -2.2 315) (size 0.24 1.56) (layers 4_bot B.Paste B.Mask)
+ (pad 14 smd rect (at -4.18 -2.2 315) (size 0.2 1.56) (layers 4_bot B.Paste B.Mask)
(net 63 /hackrf_if/PP_CPLD_TMS))
- (pad 15 smd oval (at -4.18 -2.6 315) (size 0.24 1.56) (layers 4_bot B.Paste B.Mask)
+ (pad 15 smd rect (at -4.18 -2.6 315) (size 0.2 1.56) (layers 4_bot B.Paste B.Mask)
(net 85 /hackrf_if/I2S0_RX_SDA))
- (pad 16 smd oval (at -4.18 -3 315) (size 0.24 1.56) (layers 4_bot B.Paste B.Mask)
+ (pad 16 smd rect (at -4.18 -3 315) (size 0.2 1.56) (layers 4_bot B.Paste B.Mask)
(net 65 /hackrf_if/H1_CPLD_TCK))
- (pad 17 smd oval (at -3 -4.18 225) (size 0.24 1.56) (layers 4_bot B.Paste B.Mask)
+ (pad 17 smd rect (at -3 -4.18 225) (size 0.2 1.56) (layers 4_bot B.Paste B.Mask)
(net 64 /hackrf_if/PP_CPLD_TDO))
- (pad 18 smd oval (at -2.6 -4.18 225) (size 0.24 1.56) (layers 4_bot B.Paste B.Mask)
+ (pad 18 smd rect (at -2.6 -4.18 225) (size 0.2 1.56) (layers 4_bot B.Paste B.Mask)
(net 55 /hackrf_if/MCU_D7))
- (pad 19 smd oval (at -2.2 -4.18 225) (size 0.24 1.56) (layers 4_bot B.Paste B.Mask)
+ (pad 19 smd rect (at -2.2 -4.18 225) (size 0.2 1.56) (layers 4_bot B.Paste B.Mask)
(net 56 /hackrf_if/MCU_D6))
- (pad 20 smd oval (at -1.8 -4.18 225) (size 0.24 1.56) (layers 4_bot B.Paste B.Mask)
+ (pad 20 smd rect (at -1.8 -4.18 225) (size 0.2 1.56) (layers 4_bot B.Paste B.Mask)
(net 54 /hackrf_if/MCU_D4))
- (pad 21 smd oval (at -1.4 -4.18 225) (size 0.24 1.56) (layers 4_bot B.Paste B.Mask)
+ (pad 21 smd rect (at -1.4 -4.18 225) (size 0.2 1.56) (layers 4_bot B.Paste B.Mask)
(net 53 /hackrf_if/MCU_D5))
- (pad 22 smd oval (at -1 -4.18 225) (size 0.24 1.56) (layers 4_bot B.Paste B.Mask)
+ (pad 22 smd rect (at -1 -4.18 225) (size 0.2 1.56) (layers 4_bot B.Paste B.Mask)
(net 51 /hackrf_if/MCU_D3))
- (pad 23 smd oval (at -0.6 -4.18 225) (size 0.24 1.56) (layers 4_bot B.Paste B.Mask)
+ (pad 23 smd rect (at -0.6 -4.18 225) (size 0.2 1.56) (layers 4_bot B.Paste B.Mask)
(net 121 +3V3))
- (pad 24 smd oval (at -0.2 -4.18 225) (size 0.24 1.56) (layers 4_bot B.Paste B.Mask)
+ (pad 24 smd rect (at -0.2 -4.18 225) (size 0.2 1.56) (layers 4_bot B.Paste B.Mask)
(net 52 /hackrf_if/MCU_D2))
- (pad 25 smd oval (at 0.2 -4.18 225) (size 0.24 1.56) (layers 4_bot B.Paste B.Mask)
+ (pad 25 smd rect (at 0.2 -4.18 225) (size 0.2 1.56) (layers 4_bot B.Paste B.Mask)
(net 41 /hackrf_if/SW_U))
- (pad 26 smd oval (at 0.6 -4.18 225) (size 0.24 1.56) (layers 4_bot B.Paste B.Mask)
+ (pad 26 smd rect (at 0.6 -4.18 225) (size 0.2 1.56) (layers 4_bot B.Paste B.Mask)
(net 50 /hackrf_if/MCU_D0))
- (pad 27 smd oval (at 1 -4.18 225) (size 0.24 1.56) (layers 4_bot B.Paste B.Mask)
+ (pad 27 smd rect (at 1 -4.18 225) (size 0.2 1.56) (layers 4_bot B.Paste B.Mask)
(net 49 /hackrf_if/MCU_D1))
- (pad 28 smd oval (at 1.4 -4.18 225) (size 0.24 1.56) (layers 4_bot B.Paste B.Mask)
+ (pad 28 smd rect (at 1.4 -4.18 225) (size 0.2 1.56) (layers 4_bot B.Paste B.Mask)
(net 36 /hackrf_if/SW_L))
- (pad 29 smd oval (at 1.8 -4.18 225) (size 0.24 1.56) (layers 4_bot B.Paste B.Mask)
+ (pad 29 smd rect (at 1.8 -4.18 225) (size 0.2 1.56) (layers 4_bot B.Paste B.Mask)
(net 113 /hackrf_if/RESET#))
- (pad 30 smd oval (at 2.2 -4.18 225) (size 0.24 1.56) (layers 4_bot B.Paste B.Mask)
+ (pad 30 smd rect (at 2.2 -4.18 225) (size 0.2 1.56) (layers 4_bot B.Paste B.Mask)
(net 58 /hackrf_if/MCU_LCD_RD))
- (pad 31 smd oval (at 2.6 -4.18 225) (size 0.24 1.56) (layers 4_bot B.Paste B.Mask)
+ (pad 31 smd rect (at 2.6 -4.18 225) (size 0.2 1.56) (layers 4_bot B.Paste B.Mask)
(net 57 /hackrf_if/MCU_LCD_TE))
- (pad 32 smd oval (at 3 -4.18 225) (size 0.24 1.56) (layers 4_bot B.Paste B.Mask)
+ (pad 32 smd rect (at 3 -4.18 225) (size 0.2 1.56) (layers 4_bot B.Paste B.Mask)
(net 59 /hackrf_if/MCU_IO_STBX))
- (pad 33 smd oval (at 4.18 -3 135) (size 0.24 1.56) (layers 4_bot B.Paste B.Mask)
+ (pad 33 smd rect (at 4.18 -3 135) (size 0.2 1.56) (layers 4_bot B.Paste B.Mask)
(net 60 /hackrf_if/MCU_ADDR))
- (pad 34 smd oval (at 4.18 -2.6 135) (size 0.24 1.56) (layers 4_bot B.Paste B.Mask)
+ (pad 34 smd rect (at 4.18 -2.6 135) (size 0.2 1.56) (layers 4_bot B.Paste B.Mask)
(net 27 /hackrf_if/P2_8))
- (pad 35 smd oval (at 4.18 -2.2 135) (size 0.24 1.56) (layers 4_bot B.Paste B.Mask)
+ (pad 35 smd rect (at 4.18 -2.2 135) (size 0.2 1.56) (layers 4_bot B.Paste B.Mask)
(net 138 /hackrf_if/GPS_TIMEPULSE))
- (pad 36 smd oval (at 4.18 -1.8 135) (size 0.24 1.56) (layers 4_bot B.Paste B.Mask)
+ (pad 36 smd rect (at 4.18 -1.8 135) (size 0.2 1.56) (layers 4_bot B.Paste B.Mask)
(net 139 /hackrf_if/GPS_TX_READY))
- (pad 37 smd oval (at 4.18 -1.4 135) (size 0.24 1.56) (layers 4_bot B.Paste B.Mask)
+ (pad 37 smd rect (at 4.18 -1.4 135) (size 0.2 1.56) (layers 4_bot B.Paste B.Mask)
(net 5 /hackrf_if/LCD_BACKLIGHT))
- (pad 38 smd oval (at 4.18 -1 135) (size 0.24 1.56) (layers 4_bot B.Paste B.Mask)
+ (pad 38 smd rect (at 4.18 -1 135) (size 0.2 1.56) (layers 4_bot B.Paste B.Mask)
(net 23 /hackrf_if/LCD_RESET#))
- (pad 39 smd oval (at 4.18 -0.6 135) (size 0.24 1.56) (layers 4_bot B.Paste B.Mask)
+ (pad 39 smd rect (at 4.18 -0.6 135) (size 0.2 1.56) (layers 4_bot B.Paste B.Mask)
(net 122 +1V8))
- (pad 40 smd oval (at 4.18 -0.2 135) (size 0.24 1.56) (layers 4_bot B.Paste B.Mask)
+ (pad 40 smd rect (at 4.18 -0.2 135) (size 0.2 1.56) (layers 4_bot B.Paste B.Mask)
(net 62 /hackrf_if/MCU_LCD_WR))
- (pad 41 smd oval (at 4.18 0.2 135) (size 0.24 1.56) (layers 4_bot B.Paste B.Mask)
+ (pad 41 smd rect (at 4.18 0.2 135) (size 0.2 1.56) (layers 4_bot B.Paste B.Mask)
(net 122 +1V8))
- (pad 42 smd oval (at 4.18 0.6 135) (size 0.24 1.56) (layers 4_bot B.Paste B.Mask)
+ (pad 42 smd rect (at 4.18 0.6 135) (size 0.2 1.56) (layers 4_bot B.Paste B.Mask)
(net 61 /hackrf_if/MCU_DIR))
- (pad 43 smd oval (at 4.18 1 135) (size 0.24 1.56) (layers 4_bot B.Paste B.Mask)
+ (pad 43 smd rect (at 4.18 1 135) (size 0.2 1.56) (layers 4_bot B.Paste B.Mask)
(net 13 /hackrf_if/LCD_DB15))
- (pad 44 smd oval (at 4.18 1.4 135) (size 0.24 1.56) (layers 4_bot B.Paste B.Mask)
+ (pad 44 smd rect (at 4.18 1.4 135) (size 0.2 1.56) (layers 4_bot B.Paste B.Mask)
(net 12 /hackrf_if/LCD_DB14))
- (pad 45 smd oval (at 4.18 1.8 135) (size 0.24 1.56) (layers 4_bot B.Paste B.Mask)
+ (pad 45 smd rect (at 4.18 1.8 135) (size 0.2 1.56) (layers 4_bot B.Paste B.Mask)
(net 11 /hackrf_if/LCD_DB13))
- (pad 46 smd oval (at 4.18 2.2 135) (size 0.24 1.56) (layers 4_bot B.Paste B.Mask)
+ (pad 46 smd rect (at 4.18 2.2 135) (size 0.2 1.56) (layers 4_bot B.Paste B.Mask)
(net 10 /hackrf_if/LCD_DB12))
- (pad 47 smd oval (at 4.18 2.6 135) (size 0.24 1.56) (layers 4_bot B.Paste B.Mask)
+ (pad 47 smd rect (at 4.18 2.6 135) (size 0.2 1.56) (layers 4_bot B.Paste B.Mask)
(net 9 /hackrf_if/LCD_DB11))
- (pad 48 smd oval (at 4.18 3 135) (size 0.24 1.56) (layers 4_bot B.Paste B.Mask)
+ (pad 48 smd rect (at 4.18 3 135) (size 0.2 1.56) (layers 4_bot B.Paste B.Mask)
(net 8 /hackrf_if/LCD_DB10))
- (pad 49 smd oval (at 3 4.18 45) (size 0.24 1.56) (layers 4_bot B.Paste B.Mask)
+ (pad 49 smd rect (at 3 4.18 45) (size 0.2 1.56) (layers 4_bot B.Paste B.Mask)
(net 21 /hackrf_if/LCD_DB9))
- (pad 50 smd oval (at 2.6 4.18 45) (size 0.24 1.56) (layers 4_bot B.Paste B.Mask)
+ (pad 50 smd rect (at 2.6 4.18 45) (size 0.2 1.56) (layers 4_bot B.Paste B.Mask)
(net 20 /hackrf_if/LCD_DB8))
- (pad 51 smd oval (at 2.2 4.18 45) (size 0.24 1.56) (layers 4_bot B.Paste B.Mask)
+ (pad 51 smd rect (at 2.2 4.18 45) (size 0.2 1.56) (layers 4_bot B.Paste B.Mask)
(net 19 /hackrf_if/LCD_DB7))
- (pad 52 smd oval (at 1.8 4.18 45) (size 0.24 1.56) (layers 4_bot B.Paste B.Mask)
+ (pad 52 smd rect (at 1.8 4.18 45) (size 0.2 1.56) (layers 4_bot B.Paste B.Mask)
(net 18 /hackrf_if/LCD_DB6))
- (pad 53 smd oval (at 1.4 4.18 45) (size 0.24 1.56) (layers 4_bot B.Paste B.Mask)
+ (pad 53 smd rect (at 1.4 4.18 45) (size 0.2 1.56) (layers 4_bot B.Paste B.Mask)
(net 17 /hackrf_if/LCD_DB5))
- (pad 54 smd oval (at 1 4.18 45) (size 0.24 1.56) (layers 4_bot B.Paste B.Mask)
+ (pad 54 smd rect (at 1 4.18 45) (size 0.2 1.56) (layers 4_bot B.Paste B.Mask)
(net 16 /hackrf_if/LCD_DB4))
- (pad 55 smd oval (at 0.6 4.18 45) (size 0.24 1.56) (layers 4_bot B.Paste B.Mask)
+ (pad 55 smd rect (at 0.6 4.18 45) (size 0.2 1.56) (layers 4_bot B.Paste B.Mask)
(net 15 /hackrf_if/LCD_DB3))
- (pad 56 smd oval (at 0.2 4.18 45) (size 0.24 1.56) (layers 4_bot B.Paste B.Mask)
+ (pad 56 smd rect (at 0.2 4.18 45) (size 0.2 1.56) (layers 4_bot B.Paste B.Mask)
(net 14 /hackrf_if/LCD_DB2))
- (pad 57 smd oval (at -0.2 4.18 45) (size 0.24 1.56) (layers 4_bot B.Paste B.Mask)
+ (pad 57 smd rect (at -0.2 4.18 45) (size 0.2 1.56) (layers 4_bot B.Paste B.Mask)
(net 122 +1V8))
- (pad 58 smd oval (at -0.6 4.18 45) (size 0.24 1.56) (layers 4_bot B.Paste B.Mask)
+ (pad 58 smd rect (at -0.6 4.18 45) (size 0.2 1.56) (layers 4_bot B.Paste B.Mask)
(net 7 /hackrf_if/LCD_DB1))
- (pad 59 smd oval (at -1 4.18 45) (size 0.24 1.56) (layers 4_bot B.Paste B.Mask)
+ (pad 59 smd rect (at -1 4.18 45) (size 0.2 1.56) (layers 4_bot B.Paste B.Mask)
(net 6 /hackrf_if/LCD_DB0))
- (pad 60 smd oval (at -1.4 4.18 45) (size 0.24 1.56) (layers 4_bot B.Paste B.Mask)
+ (pad 60 smd rect (at -1.4 4.18 45) (size 0.2 1.56) (layers 4_bot B.Paste B.Mask)
(net 22 /hackrf_if/LCD_RD#))
- (pad 61 smd oval (at -1.8 4.18 45) (size 0.24 1.56) (layers 4_bot B.Paste B.Mask)
+ (pad 61 smd rect (at -1.8 4.18 45) (size 0.2 1.56) (layers 4_bot B.Paste B.Mask)
(net 26 /hackrf_if/LCD_WR#))
- (pad 62 smd oval (at -2.2 4.18 45) (size 0.24 1.56) (layers 4_bot B.Paste B.Mask)
+ (pad 62 smd rect (at -2.2 4.18 45) (size 0.2 1.56) (layers 4_bot B.Paste B.Mask)
(net 24 /hackrf_if/LCD_RS))
- (pad 63 smd oval (at -2.6 4.18 45) (size 0.24 1.56) (layers 4_bot B.Paste B.Mask)
+ (pad 63 smd rect (at -2.6 4.18 45) (size 0.2 1.56) (layers 4_bot B.Paste B.Mask)
(net 25 /hackrf_if/LCD_TE))
- (pad 64 smd oval (at -3 4.18 45) (size 0.24 1.56) (layers 4_bot B.Paste B.Mask)
+ (pad 64 smd rect (at -3 4.18 45) (size 0.2 1.56) (layers 4_bot B.Paste B.Mask)
(net 44 /hackrf_if/TP_R))
- (pad 65 smd rect (at -1.125 1 225) (size 2.25 1.5) (layers 4_bot B.Paste B.Mask)
- (net 47 GND) (solder_paste_margin -0.25))
- (pad 65 thru_hole rect (at -2 2 225) (size 0.5 0.5) (drill 0.3048) (layers *.Cu B.Mask)
- (net 47 GND) (zone_connect 2))
- (pad 65 thru_hole rect (at 0 2.000001 225) (size 0.5 0.5) (drill 0.3048) (layers *.Cu B.Mask)
- (net 47 GND) (zone_connect 2))
- (pad 65 thru_hole rect (at 2 2 225) (size 0.5 0.5) (drill 0.3048) (layers *.Cu B.Mask)
- (net 47 GND) (zone_connect 2))
- (pad 65 thru_hole rect (at -2.000001 0 225) (size 0.5 0.5) (drill 0.3048) (layers *.Cu B.Mask)
- (net 47 GND) (zone_connect 2))
- (pad 65 thru_hole rect (at -2 -2 225) (size 0.5 0.5) (drill 0.3048) (layers *.Cu B.Mask)
- (net 47 GND) (zone_connect 2))
- (pad 65 thru_hole rect (at 0 0 225) (size 0.5 0.5) (drill 0.3048) (layers *.Cu B.Mask)
+ (pad 65 smd rect (at 0 0 225) (size 4.5 4.5) (layers 4_bot)
+ (net 47 GND))
+ (pad 65 thru_hole circle (at 0.8 0.8 225) (size 0.5 0.5) (drill 0.3048) (layers *.Cu F.Mask)
(net 47 GND) (zone_connect 2))
- (pad 65 thru_hole rect (at 0 -2.000001 225) (size 0.5 0.5) (drill 0.3048) (layers *.Cu B.Mask)
+ (pad 65 thru_hole circle (at 0.8 -0.8 225) (size 0.5 0.5) (drill 0.3048) (layers *.Cu F.Mask)
(net 47 GND) (zone_connect 2))
- (pad 65 thru_hole rect (at 2.000001 0 225) (size 0.5 0.5) (drill 0.3048) (layers *.Cu B.Mask)
+ (pad 65 thru_hole circle (at -0.8 -0.8 225) (size 0.5 0.5) (drill 0.3048) (layers *.Cu F.Mask)
(net 47 GND) (zone_connect 2))
- (pad 65 thru_hole rect (at 2 -2 225) (size 0.5 0.5) (drill 0.3048) (layers *.Cu B.Mask)
+ (pad 65 thru_hole circle (at -0.8 0.8 225) (size 0.5 0.5) (drill 0.3048) (layers *.Cu F.Mask)
(net 47 GND) (zone_connect 2))
- (model Housings_QFP.3dshapes/TQFP-64_7x7mm_Pitch0.4mm.wrl
+ (model ${KISYS3DMOD}/Package_QFP.3dshapes/TQFP-64_7x7mm_P0.4mm.step
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
- (module ipc_capc:IPC_CAPC100X50X55L25N (layer 4_bot) (tedit 5B60D756) (tstamp 5B75C8BC)
+ (module ipc_capc:IPC_CAPC100X50X55L25N (layer 4_bot) (tedit 5BD22C57) (tstamp 5B75C8BC)
(at 172.95 162.05 90)
(path /58CFF3E3/5B682C91)
(attr smd)
@@ -3923,7 +4099,7 @@
(effects (font (size 0.6096 0.6096) (thickness 0.12)) (justify mirror))
)
(fp_text user %R (at 0 0 90) (layer B.Fab)
- (effects (font (size 0.6096 0.6096) (thickness 0.025)) (justify mirror))
+ (effects (font (size 0.3 0.3) (thickness 0.025)) (justify mirror))
)
(fp_line (start -0.5 0.25) (end 0.5 0.25) (layer B.Fab) (width 0.025))
(fp_line (start 0.5 0.25) (end 0.5 -0.25) (layer B.Fab) (width 0.025))
@@ -3944,7 +4120,7 @@
)
)
- (module ipc_capc:IPC_CAPC100X50X55L25N (layer 4_bot) (tedit 5B60D756) (tstamp 5B6C18C3)
+ (module ipc_capc:IPC_CAPC100X50X55L25N (layer 4_bot) (tedit 5BD22C7E) (tstamp 5B6C18C3)
(at 172.45 166.05 180)
(path /58CFF3E3/5B682CB9)
(attr smd)
@@ -3963,7 +4139,7 @@
(fp_line (start 0.5 0.25) (end 0.5 -0.25) (layer B.Fab) (width 0.025))
(fp_line (start -0.5 0.25) (end 0.5 0.25) (layer B.Fab) (width 0.025))
(fp_text user %R (at 0 0 180) (layer B.Fab)
- (effects (font (size 0.6096 0.6096) (thickness 0.025)) (justify mirror))
+ (effects (font (size 0.3 0.3) (thickness 0.025)) (justify mirror))
)
(pad 2 smd rect (at 0.46 0 180) (size 0.58 0.58) (layers 4_bot B.Paste B.Mask)
(net 124 "Net-(C17-Pad2)"))
@@ -3976,7 +4152,7 @@
)
)
- (module ipc_capc:IPC_CAPC100X50X55L25N (layer 4_bot) (tedit 5B60D756) (tstamp 5B75C7E2)
+ (module ipc_capc:IPC_CAPC100X50X55L25N (layer 4_bot) (tedit 5BD22C4D) (tstamp 5B75C7E2)
(at 170.2 162.1 90)
(path /58CFF3E3/5B697E1B)
(attr smd)
@@ -3987,7 +4163,7 @@
(effects (font (size 0.6096 0.6096) (thickness 0.12)) (justify mirror))
)
(fp_text user %R (at 0 0 90) (layer B.Fab)
- (effects (font (size 0.6096 0.6096) (thickness 0.025)) (justify mirror))
+ (effects (font (size 0.3 0.3) (thickness 0.025)) (justify mirror))
)
(fp_line (start -0.5 0.25) (end 0.5 0.25) (layer B.Fab) (width 0.025))
(fp_line (start 0.5 0.25) (end 0.5 -0.25) (layer B.Fab) (width 0.025))
@@ -4008,7 +4184,7 @@
)
)
- (module ipc_beadc:IPC_BEADC160X80X95L40N (layer 4_bot) (tedit 5B60D756) (tstamp 5B75C82F)
+ (module ipc_beadc:IPC_BEADC160X80X95L40N (layer 4_bot) (tedit 5BD22C52) (tstamp 5B75C82F)
(at 171.8 161.6 270)
(path /58CFF3E3/5B682CCB)
(attr smd)
@@ -4019,7 +4195,7 @@
(effects (font (size 0.6096 0.6096) (thickness 0.12)) (justify mirror))
)
(fp_text user %R (at 0 0 270) (layer B.Fab)
- (effects (font (size 0.6096 0.6096) (thickness 0.025)) (justify mirror))
+ (effects (font (size 0.45 0.45) (thickness 0.025)) (justify mirror))
)
(fp_line (start -0.8 0.4) (end 0.8 0.4) (layer B.Fab) (width 0.025))
(fp_line (start 0.8 0.4) (end 0.8 -0.4) (layer B.Fab) (width 0.025))
@@ -4042,7 +4218,7 @@
)
)
- (module ipc_resc:IPC_RESC100X50X40L25N (layer 4_bot) (tedit 5B60D758) (tstamp 5B6C1903)
+ (module ipc_resc:IPC_RESC100X50X40L25N (layer 4_bot) (tedit 5BD22C5B) (tstamp 5B6C1903)
(at 174.3 161.25)
(path /58CFF3E3/5B6E2EB4)
(attr smd)
@@ -4053,7 +4229,7 @@
(effects (font (size 0.6096 0.6096) (thickness 0.12)) (justify mirror))
)
(fp_text user %R (at 0 0) (layer B.Fab)
- (effects (font (size 0.6096 0.6096) (thickness 0.025)) (justify mirror))
+ (effects (font (size 0.3 0.3) (thickness 0.025)) (justify mirror))
)
(fp_line (start -0.5 0.25) (end 0.5 0.25) (layer B.Fab) (width 0.025))
(fp_line (start 0.5 0.25) (end 0.5 -0.25) (layer B.Fab) (width 0.025))
@@ -4074,7 +4250,7 @@
)
)
- (module ipc_resc:IPC_RESC100X50X40L25N (layer 4_bot) (tedit 5B60D758) (tstamp 5B75C883)
+ (module ipc_resc:IPC_RESC100X50X40L25N (layer 4_bot) (tedit 5BD22C5E) (tstamp 5B75C883)
(at 176.1 161.25)
(path /58CFF3E3/5B6D148B)
(attr smd)
@@ -4093,7 +4269,7 @@
(fp_line (start 0.5 0.25) (end 0.5 -0.25) (layer B.Fab) (width 0.025))
(fp_line (start -0.5 0.25) (end 0.5 0.25) (layer B.Fab) (width 0.025))
(fp_text user %R (at 0 0) (layer B.Fab)
- (effects (font (size 0.6096 0.6096) (thickness 0.025)) (justify mirror))
+ (effects (font (size 0.3 0.3) (thickness 0.025)) (justify mirror))
)
(pad 2 smd rect (at 0.46 0) (size 0.58 0.58) (layers 4_bot B.Paste B.Mask)
(net 47 GND))
@@ -4106,7 +4282,7 @@
)
)
- (module ipc_resc:IPC_RESC100X50X40L25N (layer 4_bot) (tedit 5B60D758) (tstamp 5B6C3AC6)
+ (module ipc_resc:IPC_RESC100X50X40L25N (layer 4_bot) (tedit 5BD22C79) (tstamp 5B6C3AC6)
(at 170.65 166.05)
(path /58CFF3E3/5B682CA9)
(attr smd)
@@ -4117,7 +4293,7 @@
(effects (font (size 0.6096 0.6096) (thickness 0.12)) (justify mirror))
)
(fp_text user %R (at 0 0) (layer B.Fab)
- (effects (font (size 0.6096 0.6096) (thickness 0.025)) (justify mirror))
+ (effects (font (size 0.3 0.3) (thickness 0.025)) (justify mirror))
)
(fp_line (start -0.5 0.25) (end 0.5 0.25) (layer B.Fab) (width 0.025))
(fp_line (start 0.5 0.25) (end 0.5 -0.25) (layer B.Fab) (width 0.025))
@@ -4138,18 +4314,18 @@
)
)
- (module ipc_resc:IPC_RESC100X50X40L25N (layer 4_bot) (tedit 5B60D758) (tstamp 5B6C1930)
+ (module ipc_resc:IPC_RESC100X50X40L25N (layer 4_bot) (tedit 5BD22C83) (tstamp 5B6C1930)
(at 172.45 166.95)
(path /58CFF3E3/5B682CD3)
(attr smd)
(fp_text reference R21 (at -0.35 3) (layer B.SilkS)
(effects (font (size 0.6096 0.6096) (thickness 0.12)) (justify mirror))
)
- (fp_text value 33R (at 0 0) (layer B.Fab)
+ (fp_text value 100R (at 0 0) (layer B.Fab)
(effects (font (size 0.6096 0.6096) (thickness 0.12)) (justify mirror))
)
(fp_text user %R (at 0 0) (layer B.Fab)
- (effects (font (size 0.6096 0.6096) (thickness 0.025)) (justify mirror))
+ (effects (font (size 0.3 0.3) (thickness 0.025)) (justify mirror))
)
(fp_line (start -0.5 0.25) (end 0.5 0.25) (layer B.Fab) (width 0.025))
(fp_line (start 0.5 0.25) (end 0.5 -0.25) (layer B.Fab) (width 0.025))
@@ -4170,7 +4346,7 @@
)
)
- (module ipc_resc:IPC_RESC100X50X40L25N (layer 4_bot) (tedit 5B60D758) (tstamp 5B6C39D3)
+ (module ipc_resc:IPC_RESC100X50X40L25N (layer 4_bot) (tedit 5BD22C88) (tstamp 5B6C39D3)
(at 170.65 166.95 180)
(path /58CFF3E3/5B682CA2)
(attr smd)
@@ -4189,7 +4365,7 @@
(fp_line (start 0.5 0.25) (end 0.5 -0.25) (layer B.Fab) (width 0.025))
(fp_line (start -0.5 0.25) (end 0.5 0.25) (layer B.Fab) (width 0.025))
(fp_text user %R (at 0 0 180) (layer B.Fab)
- (effects (font (size 0.6096 0.6096) (thickness 0.025)) (justify mirror))
+ (effects (font (size 0.3 0.3) (thickness 0.025)) (justify mirror))
)
(pad 2 smd rect (at 0.46 0 180) (size 0.58 0.58) (layers 4_bot B.Paste B.Mask)
(net 127 "Net-(R17-Pad1)"))
@@ -4202,7 +4378,7 @@
)
)
- (module ipc_sot:IPC_SOT23-5P65_212X110L33X22N (layer 4_bot) (tedit 5B5CDD55) (tstamp 5B6BABEA)
+ (module ipc_sot:IPC_SOT23-5P65_212X110L33X22N (layer 4_bot) (tedit 5BD22FC7) (tstamp 5B6BABEA)
(at 171.4 164.3 180)
(path /58CFF3E3/5B682CC3)
(attr smd)
@@ -4212,8 +4388,8 @@
(fp_text value 74HC1G04GW (at 0 0 180) (layer B.Fab)
(effects (font (size 0.6096 0.6096) (thickness 0.12)) (justify mirror))
)
- (fp_text user %R (at 0 0 180) (layer B.Fab)
- (effects (font (size 0.6096 0.6096) (thickness 0.025)) (justify mirror))
+ (fp_text user %R (at 0 0 270) (layer B.Fab)
+ (effects (font (size 0.6 0.6) (thickness 0.025)) (justify mirror))
)
(fp_line (start -0.625 1.025) (end 0.625 1.025) (layer B.Fab) (width 0.025))
(fp_line (start 0.625 1.025) (end 0.625 -1.025) (layer B.Fab) (width 0.025))
@@ -4247,7 +4423,7 @@
)
)
- (module ipc_capc:IPC_CAPC100X50X55L25N (layer 4_bot) (tedit 5B60D756) (tstamp 5B7883B5)
+ (module ipc_capc:IPC_CAPC100X50X55L25N (layer 4_bot) (tedit 5BD22CC8) (tstamp 5B7883B5)
(at 75.65 170.45 180)
(path /5B7E0B2A/5B7E0D14)
(attr smd)
@@ -4266,7 +4442,7 @@
(fp_line (start 0.5 0.25) (end 0.5 -0.25) (layer B.Fab) (width 0.025))
(fp_line (start -0.5 0.25) (end 0.5 0.25) (layer B.Fab) (width 0.025))
(fp_text user %R (at 0 0 180) (layer B.Fab)
- (effects (font (size 0.6096 0.6096) (thickness 0.025)) (justify mirror))
+ (effects (font (size 0.3 0.3) (thickness 0.025)) (justify mirror))
)
(pad 2 smd rect (at 0.46 0 180) (size 0.58 0.58) (layers 4_bot B.Paste B.Mask)
(net 47 GND))
@@ -4279,7 +4455,7 @@
)
)
- (module ipc_capc:IPC_CAPC100X50X55L25N (layer 4_bot) (tedit 5B60D756) (tstamp 5B78702B)
+ (module ipc_capc:IPC_CAPC100X50X55L25N (layer 4_bot) (tedit 5BD22CD6) (tstamp 5B78702B)
(at 77.65 155.6)
(path /5B7E0B2A/5B7E512B)
(attr smd)
@@ -4290,7 +4466,7 @@
(effects (font (size 0.6096 0.6096) (thickness 0.12)) (justify mirror))
)
(fp_text user %R (at 0 0) (layer B.Fab)
- (effects (font (size 0.6096 0.6096) (thickness 0.025)) (justify mirror))
+ (effects (font (size 0.3 0.3) (thickness 0.025)) (justify mirror))
)
(fp_line (start -0.5 0.25) (end 0.5 0.25) (layer B.Fab) (width 0.025))
(fp_line (start 0.5 0.25) (end 0.5 -0.25) (layer B.Fab) (width 0.025))
@@ -4311,7 +4487,7 @@
)
)
- (module ipc_beadc:IPC_BEADC160X80X95L40N (layer 4_bot) (tedit 5B60D756) (tstamp 5B788D2D)
+ (module ipc_beadc:IPC_BEADC160X80X95L40N (layer 4_bot) (tedit 5BD22C99) (tstamp 5B788D2D)
(at 135.95 171.8 180)
(path /5B7E0B2A/5B7E9718)
(attr smd)
@@ -4332,7 +4508,7 @@
(fp_line (start 0.8 0.4) (end 0.8 -0.4) (layer B.Fab) (width 0.025))
(fp_line (start -0.8 0.4) (end 0.8 0.4) (layer B.Fab) (width 0.025))
(fp_text user %R (at 0 0 180) (layer B.Fab)
- (effects (font (size 0.6096 0.6096) (thickness 0.025)) (justify mirror))
+ (effects (font (size 0.45 0.45) (thickness 0.025)) (justify mirror))
)
(pad 2 smd rect (at 0.71 0 180) (size 0.95 0.97) (layers 4_bot B.Paste B.Mask)
(net 129 "Net-(FB1-Pad2)"))
@@ -4345,7 +4521,7 @@
)
)
- (module ipc_beadc:IPC_BEADC160X80X95L40N (layer 4_bot) (tedit 5B60D756) (tstamp 5B78990B)
+ (module ipc_beadc:IPC_BEADC160X80X95L40N (layer 4_bot) (tedit 5BD22C9D) (tstamp 5B78990B)
(at 133.15 171.2 180)
(path /5B7E0B2A/5B7E9798)
(attr smd)
@@ -4356,7 +4532,7 @@
(effects (font (size 0.6096 0.6096) (thickness 0.12)) (justify mirror))
)
(fp_text user %R (at 0 0 180) (layer B.Fab)
- (effects (font (size 0.6096 0.6096) (thickness 0.025)) (justify mirror))
+ (effects (font (size 0.45 0.45) (thickness 0.025)) (justify mirror))
)
(fp_line (start -0.8 0.4) (end 0.8 0.4) (layer B.Fab) (width 0.025))
(fp_line (start 0.8 0.4) (end 0.8 -0.4) (layer B.Fab) (width 0.025))
@@ -4379,7 +4555,7 @@
)
)
- (module ipc_indc:IPC_INDC100X50X60L20N (layer 4_bot) (tedit 5B60D757) (tstamp 5B7AFBF8)
+ (module ipc_indc:IPC_INDC100X50X60L20N (layer 4_bot) (tedit 5BD22CC0) (tstamp 5B7AFBF8)
(at 76.6 169.55 180)
(path /5B7E0B2A/5B7E0E02)
(attr smd)
@@ -4390,7 +4566,7 @@
(effects (font (size 0.6096 0.6096) (thickness 0.12)) (justify mirror))
)
(fp_text user %R (at 0 0 180) (layer B.Fab)
- (effects (font (size 0.6096 0.6096) (thickness 0.025)) (justify mirror))
+ (effects (font (size 0.3 0.3) (thickness 0.025)) (justify mirror))
)
(fp_line (start -0.5 0.25) (end 0.5 0.25) (layer B.Fab) (width 0.025))
(fp_line (start 0.5 0.25) (end 0.5 -0.25) (layer B.Fab) (width 0.025))
@@ -4413,7 +4589,7 @@
)
)
- (module amp_te:1909763-1 (layer 4_bot) (tedit 5B49377B) (tstamp 5B7AFCBE)
+ (module amp_te:1909763-1 (layer 4_bot) (tedit 5BD23017) (tstamp 5B7AFCBE)
(at 81.4 169.55 90)
(descr http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=1909763&DocType=Customer+Drawing&DocLang=English)
(tags "AMP TE U.FL RF Connector")
@@ -4425,7 +4601,7 @@
(effects (font (size 0.5 0.5) (thickness 0.025)) (justify mirror))
)
(fp_text user %R (at 0 0 90) (layer B.Fab)
- (effects (font (size 0.6096 0.6096) (thickness 0.025)) (justify mirror))
+ (effects (font (size 0.6 0.6) (thickness 0.025)) (justify mirror))
)
(fp_circle (center 0 0) (end 1 0) (layer B.Fab) (width 0.025))
(fp_line (start -1.3 1.3) (end 0.9 1.3) (layer B.Fab) (width 0.025))
@@ -4450,7 +4626,7 @@
)
)
- (module ipc_resc:IPC_RESC100X50X40L25N (layer 4_bot) (tedit 5B60D758) (tstamp 5B7AF3F2)
+ (module ipc_resc:IPC_RESC100X50X40L25N (layer 4_bot) (tedit 5BD22CD2) (tstamp 5B7AF3F2)
(at 75.45 155.6)
(path /5B7E0B2A/5B7ED5AD)
(attr smd)
@@ -4469,7 +4645,7 @@
(fp_line (start 0.5 0.25) (end 0.5 -0.25) (layer B.Fab) (width 0.025))
(fp_line (start -0.5 0.25) (end 0.5 0.25) (layer B.Fab) (width 0.025))
(fp_text user %R (at 0 0) (layer B.Fab)
- (effects (font (size 0.6096 0.6096) (thickness 0.025)) (justify mirror))
+ (effects (font (size 0.3 0.3) (thickness 0.025)) (justify mirror))
)
(pad 2 smd rect (at 0.46 0) (size 0.58 0.58) (layers 4_bot B.Paste B.Mask)
(net 121 +3V3))
@@ -4482,7 +4658,7 @@
)
)
- (module ipc_resc:IPC_RESC100X50X40L25N (layer 4_bot) (tedit 5B60D758) (tstamp 5B78708E)
+ (module ipc_resc:IPC_RESC100X50X40L25N (layer 4_bot) (tedit 5BD22CAA) (tstamp 5B78708E)
(at 111.7 158.95 180)
(path /5B7E0B2A/5B7EC300)
(attr smd)
@@ -4501,7 +4677,7 @@
(fp_line (start 0.5 0.25) (end 0.5 -0.25) (layer B.Fab) (width 0.025))
(fp_line (start -0.5 0.25) (end 0.5 0.25) (layer B.Fab) (width 0.025))
(fp_text user %R (at 0 0 180) (layer B.Fab)
- (effects (font (size 0.6096 0.6096) (thickness 0.025)) (justify mirror))
+ (effects (font (size 0.3 0.3) (thickness 0.025)) (justify mirror))
)
(pad 2 smd rect (at 0.46 0 180) (size 0.58 0.58) (layers 4_bot B.Paste B.Mask)
(net 132 "Net-(R23-Pad1)"))
@@ -4514,7 +4690,7 @@
)
)
- (module ipc_resc:IPC_RESC100X50X40L25N (layer 4_bot) (tedit 5B60D758) (tstamp 5B787677)
+ (module ipc_resc:IPC_RESC100X50X40L25N (layer 4_bot) (tedit 5BD22CDA) (tstamp 5B787677)
(at 79.55 157.3 90)
(path /5B7E0B2A/5B7E62C8)
(attr smd)
@@ -4525,7 +4701,7 @@
(effects (font (size 0.6096 0.6096) (thickness 0.12)) (justify mirror))
)
(fp_text user %R (at 0 0 90) (layer B.Fab)
- (effects (font (size 0.6096 0.6096) (thickness 0.025)) (justify mirror))
+ (effects (font (size 0.3 0.3) (thickness 0.025)) (justify mirror))
)
(fp_line (start -0.5 0.25) (end 0.5 0.25) (layer B.Fab) (width 0.025))
(fp_line (start 0.5 0.25) (end 0.5 -0.25) (layer B.Fab) (width 0.025))
@@ -4546,7 +4722,7 @@
)
)
- (module ipc_resc:IPC_RESC100X50X40L25N (layer 4_bot) (tedit 5B60D758) (tstamp 5B7884EB)
+ (module ipc_resc:IPC_RESC100X50X40L25N (layer 4_bot) (tedit 5BD22CC4) (tstamp 5B7884EB)
(at 74.75 169.55)
(path /5B7E0B2A/5B78A3E5)
(attr smd)
@@ -4565,7 +4741,7 @@
(fp_line (start 0.5 0.25) (end 0.5 -0.25) (layer B.Fab) (width 0.025))
(fp_line (start -0.5 0.25) (end 0.5 0.25) (layer B.Fab) (width 0.025))
(fp_text user %R (at 0 0) (layer B.Fab)
- (effects (font (size 0.6096 0.6096) (thickness 0.025)) (justify mirror))
+ (effects (font (size 0.3 0.3) (thickness 0.025)) (justify mirror))
)
(pad 2 smd rect (at 0.46 0) (size 0.58 0.58) (layers 4_bot B.Paste B.Mask)
(net 128 "Net-(C19-Pad1)"))
@@ -4623,7 +4799,7 @@
(gr_text "Dimensions in inches, unless otherwise specified." (at 205 168) (layer Dwgs.User)
(effects (font (size 1.5 1.5) (thickness 0.1)) (justify left))
)
- (gr_text "Notes, unless otherwise specified:\n\n1. Corner radii, inside: .047 min, unless otherwise stated.\n Corner radii, outside: break all sharp edges and corners.\n\n2. Tolerances:\n Warpage: .010/inch max along longest diag.\n Etching: +/-20% of master pattern.\n\n PTH hole diameter:\n < .100 +/- .003\n > .100 +/- .005\n < .016 + .003, -(hole diameter)\n NPTH hole diameter:\n < .100 +/- .002\n > .100 +/- .003\n\n Front-to-back reg: .005 max.\n (Do not use top-to-bottom pad alignment.)\n Hole plating: .001 min, .003 max.\n Hole diameters are finished sizes.\n\n3. Material: glass-epoxy resin sheet. Refer to board\n stackup for weight of Cu. 2 sides, flame-retardant.\n NEMA grade high temp FR4, TG requirement >= 170C.\n\n4. Finish: Soldermask over bare copper using LPI mask.\n Mask thickness: .0004 min, .0013 max.\n Color: Glossy Black\n\n5. Silkscreen legend to board using non-conductive,\n epoxy paint. Remove silkscreen from pads.\n Color: White\n\n6. Acceptability based on IPC-A-600 class 2 (latest revision).\n\n7. Test all boards for opens and shorts.\n\n8. No silkscreen on pads or test points.\n\n9. Do not block mask fine pitch SMD pads.\n\n10. No solder mask on fiducials.\n\n11. No solder mask may cover any gold fingers, if applicable.\n\n12. Do not use top-to-bottom pad alignment.\n Via alignment is recommended.\n\n13. Do not modify solder mask via flooding design.\n Do not modify solder mask chimney designs for test points.\n\n14. No Gerber modifications allowed without prior written\n approval, except for impedance trace width modifications\n to meet requirements, and the addition of tear drops where\n required.\n\n15. Raw material and finished PCB must be RoHS-compliant." (at 200 90) (layer Dwgs.User)
+ (gr_text "Notes, unless otherwise specified:\n\n1. Corner radii, inside: .047 min, unless otherwise stated.\n Corner radii, outside: break all sharp edges and corners.\n\n2. Tolerances:\n Warpage: .010/inch max along longest diag.\n Etching: +/-20% of master pattern.\n\n PTH hole diameter:\n < .100 +/- .003\n > .100 +/- .005\n < .016 + .003, -(hole diameter)\n NPTH hole diameter:\n < .100 +/- .002\n > .100 +/- .003\n\n Front-to-back reg: .005 max.\n (Do not use top-to-bottom pad alignment.)\n Hole plating: .001 min, .003 max.\n Hole diameters are finished sizes.\n\n3. Material: glass-epoxy resin sheet. Refer to board\n stackup for weight of Cu. 2 sides, flame-retardant.\n NEMA grade high temp FR4, TG requirement >= 150C.\n\n4. Finish: Soldermask over bare copper using LPI mask.\n Mask thickness: .0004 min, .0013 max.\n Color: Blue\n\n5. Silkscreen legend to board using non-conductive,\n epoxy paint. Remove silkscreen from pads.\n Color: White\n\n6. Acceptability based on IPC-A-600 class 2 (latest revision).\n\n7. Test all boards for opens and shorts.\n\n8. No silkscreen on pads or test points.\n\n9. Do not block mask fine pitch SMD pads.\n\n10. No solder mask on fiducials.\n\n11. No solder mask may cover any gold fingers, if applicable.\n\n12. Do not use top-to-bottom pad alignment.\n Via alignment is recommended.\n\n13. Do not modify solder mask via flooding design.\n Do not modify solder mask chimney designs for test points.\n\n14. No Gerber modifications allowed without prior written\n approval, except for impedance trace width modifications\n to meet requirements, and the addition of tear drops where\n required.\n\n15. Raw material and finished PCB must be RoHS-compliant." (at 200 90) (layer Dwgs.User)
(effects (font (size 1.5 1.5) (thickness 0.1)) (justify left))
)
(dimension 75 (width 0.1) (layer Dwgs.User)
@@ -4654,7 +4830,7 @@
(gr_line (start 45 25) (end 54 25) (layer Dwgs.User) (width 0.1))
(gr_line (start 28 25) (end 33 25) (layer Dwgs.User) (width 0.1))
(gr_line (start 20 25) (end 24 25) (layer Dwgs.User) (width 0.1))
- (gr_text "62 mil +/- 10%\nBoard Thickness" (at 107.5 41) (layer Dwgs.User)
+ (gr_text "1.6 mm +/- 10%\nBoard Thickness" (at 107.5 41) (layer Dwgs.User)
(effects (font (size 1.5 1.5) (thickness 0.1)) (justify left))
)
(gr_line (start 105 49) (end 105.5 47.5) (layer Dwgs.User) (width 0.1))
@@ -4728,11 +4904,11 @@
(gr_line (start 77.5 33.7) (end 82.5 33.7) (layer Dwgs.User) (width 0.1))
(gr_line (start 77.5 35.2) (end 77.5 33.7) (layer Dwgs.User) (width 0.1))
(gr_line (start 72.5 35.2) (end 87.5 35.2) (layer Dwgs.User) (width 0.1))
- (gr_text "Material\n\n\nWhite\nBlack\n1.0 oz Copper + ENIG\nFR-4 TG170\n1.0 oz Copper\nFR-4 TG170\n1.0 oz Copper\nFR-4 TG170\n1.0 oz Copper + ENIG\nBlack\nWhite\n\nCenter line is finished edge\n" (at 45 40) (layer Dwgs.User) (tstamp 55E3838A)
+ (gr_text "Material\n\n\nWhite\nBlue\n1.0 oz Copper + ENIG\nFR-4 TG150\n1.0 oz Copper\nFR-4 TG150\n1.0 oz Copper\nFR-4 TG150\n1.0 oz Copper + ENIG\nBlue\nWhite\n\nCenter line is finished edge\n" (at 45 40) (layer Dwgs.User) (tstamp 55E3838A)
(effects (font (size 1.5 1.5) (thickness 0.1)) (justify left))
)
- (gr_text "Thickness\n\n\n\n0.8 mil\n1.7 mil\n8.0 mil\n1.4 mil\n\n1.4 mil\n8.0 mil\n1.7 mil\n0.8 mil\n\n\n\n" (at 90.5 40) (layer Dwgs.User) (tstamp 55E381F6)
- (effects (font (size 1.5 1.5) (thickness 0.1)) (justify left))
+ (gr_text "Thickness\n\n\n\n0.8 mil\n35 um\n110 um\n35 um\n\n35 um\n110 um\n35 um\n0.8 mil\n\n\n\n" (at 101 40) (layer Dwgs.User) (tstamp 55E381F6)
+ (effects (font (size 1.5 1.5) (thickness 0.1)) (justify right))
)
(gr_text "Type\n\nSolder paste\nSilkscreen\nSolder mask\nSignal\nPrepreg\nPower\nCore\nPower\nPrepreg\nSignal\nSolder mask\nSilkscreen\nSolder paste\nBoard outline" (at 28 40) (layer Dwgs.User)
(effects (font (size 1.5 1.5) (thickness 0.1)) (justify left))
@@ -4740,7 +4916,7 @@
(gr_text "File\n\n.GTP\n.GTO\n.GTS\n.GTL\n\n.G2\n\n.G3\n\n.GBL\n.GBS\n.GBO\n.GBP\n.GM1\n" (at 20 40) (layer Dwgs.User)
(effects (font (size 1.5 1.5) (thickness 0.1)) (justify left))
)
- (gr_text 20180820 (at 75 164 180) (layer F.SilkS)
+ (gr_text 20181029 (at 75 164 180) (layer F.SilkS)
(effects (font (size 1.524 0.762) (thickness 0.1524)))
)
(gr_text 4 (at 64.025 156.325) (layer 4_bot)
@@ -4771,10 +4947,10 @@
(gr_arc (start 176 104) (end 176 100) (angle 90) (layer Edge.Cuts) (width 0.381))
(gr_arc (start 64 171) (end 64 175) (angle 90) (layer Edge.Cuts) (width 0.381))
(gr_arc (start 64 104) (end 60 104) (angle 90) (layer Edge.Cuts) (width 0.381))
- (gr_line (start 87.94 126.74) (end 108.26 126.74) (layer Eco2.User) (width 0.1))
- (gr_line (start 108.26 126.74) (end 108.26 131.82) (layer Eco2.User) (width 0.1))
- (gr_line (start 108.26 131.82) (end 87.94 131.82) (layer Eco2.User) (width 0.1))
- (gr_line (start 87.94 131.82) (end 87.94 126.74) (layer Eco2.User) (width 0.1))
+ (gr_line (start 87.94 126.74) (end 108.26 126.74) (layer B.CrtYd) (width 0.1))
+ (gr_line (start 108.26 126.74) (end 108.26 131.82) (layer B.CrtYd) (width 0.1))
+ (gr_line (start 108.26 131.82) (end 87.94 131.82) (layer B.CrtYd) (width 0.1))
+ (gr_line (start 87.94 131.82) (end 87.94 126.74) (layer B.CrtYd) (width 0.1))
(segment (start 164.005 110.35) (end 163.35 110.35) (width 0.2) (layer 4_bot) (net 1) (status 10))
(segment (start 147.5 103.9) (end 147.7 103.7) (width 0.2) (layer 4_bot) (net 1) (tstamp 58F90BAB))
@@ -6183,12 +6359,14 @@
(segment (start 159.5 109.43) (end 160.23 108.7) (width 0.2) (layer 4_bot) (net 79) (tstamp 58EDB954) (status 20))
(segment (start 159.5 110) (end 159.5 109.43) (width 0.2) (layer 4_bot) (net 79) (tstamp 58EDB94E))
(segment (start 159.15 110.35) (end 159.5 110) (width 0.2) (layer 4_bot) (net 79) (tstamp 58EDB94A))
- (segment (start 106.682914 134.771501) (end 117.354415 124.1) (width 0.2) (layer 4_bot) (net 80) (status 10))
- (segment (start 155.4 117.57) (end 155.4 118.7) (width 0.2) (layer 4_bot) (net 80) (status 10))
- (segment (start 138.9 124.1) (end 117.354415 124.1) (width 0.2) (layer 4_bot) (net 80) (tstamp 58FC30BF))
- (segment (start 143.6 119.4) (end 138.9 124.1) (width 0.2) (layer 4_bot) (net 80) (tstamp 58FC30BB))
- (segment (start 154.7 119.4) (end 143.6 119.4) (width 0.2) (layer 4_bot) (net 80) (tstamp 58FC30B7))
- (segment (start 155.4 118.7) (end 154.7 119.4) (width 0.2) (layer 4_bot) (net 80) (tstamp 58FC30B0))
+ (segment (start 108.15 133.304415) (end 106.682914 134.771501) (width 0.2) (layer 4_bot) (net 80))
+ (segment (start 155.4 117.57) (end 155.4 118.7) (width 0.2) (layer 4_bot) (net 80))
+ (segment (start 155.4 118.7) (end 154.7 119.4) (width 0.2) (layer 4_bot) (net 80))
+ (segment (start 154.7 119.4) (end 143.6 119.4) (width 0.2) (layer 4_bot) (net 80))
+ (segment (start 143.6 119.4) (end 138.9 124.1) (width 0.2) (layer 4_bot) (net 80))
+ (segment (start 108.15 133.05) (end 108.15 133.304415) (width 0.2) (layer 4_bot) (net 80))
+ (segment (start 117.1 124.1) (end 108.15 133.05) (width 0.2) (layer 4_bot) (net 80))
+ (segment (start 138.9 124.1) (end 117.1 124.1) (width 0.2) (layer 4_bot) (net 80))
(segment (start 154 146.35) (end 155.95 144.4) (width 0.2) (layer 1_top) (net 81))
(segment (start 154.65 129.3) (end 154.65 124.85) (width 0.2) (layer 1_top) (net 81) (tstamp 58F9828F))
(segment (start 155.95 130.6) (end 154.65 129.3) (width 0.2) (layer 1_top) (net 81) (tstamp 58F98289))
@@ -6780,7 +6958,7 @@
)
)
)
- (zone (net 121) (net_name +3V3) (layer 2_pwr) (tstamp 5B79CB38) (hatch edge 0.508)
+ (zone (net 121) (net_name +3V3) (layer 2_pwr) (tstamp 5BD00446) (hatch edge 0.508)
(priority 1)
(connect_pads (clearance 0.2))
(min_thickness 0.2)
@@ -6794,7 +6972,7 @@
)
)
)
- (zone (net 47) (net_name GND) (layer 3_gnd) (tstamp 5B79CB35) (hatch edge 0.508)
+ (zone (net 47) (net_name GND) (layer 3_gnd) (tstamp 5BD00443) (hatch edge 0.508)
(connect_pads (clearance 0.2))
(min_thickness 0.2)
(fill (arc_segments 16) (thermal_gap 0.2) (thermal_bridge_width 0.4))
@@ -6804,7 +6982,7 @@
)
)
)
- (zone (net 0) (net_name "") (layer B.Mask) (tstamp 5B79CB32) (hatch edge 0.508)
+ (zone (net 0) (net_name "") (layer B.Mask) (tstamp 5BD00440) (hatch edge 0.508)
(connect_pads (clearance 0.2))
(min_thickness 0.2)
(fill (arc_segments 16) (thermal_gap 0.2) (thermal_bridge_width 0.4))
@@ -6814,7 +6992,7 @@
)
)
)
- (zone (net 0) (net_name "") (layer F.Mask) (tstamp 5B79CB2F) (hatch edge 0.508)
+ (zone (net 0) (net_name "") (layer F.Mask) (tstamp 5BD0043D) (hatch edge 0.508)
(connect_pads (clearance 0.2))
(min_thickness 0.2)
(fill (arc_segments 16) (thermal_gap 0.2) (thermal_bridge_width 0.4))
@@ -6824,7 +7002,7 @@
)
)
)
- (zone (net 47) (net_name GND) (layer 2_pwr) (tstamp 5B79CB2C) (hatch edge 0.508)
+ (zone (net 47) (net_name GND) (layer 2_pwr) (tstamp 5BD0043A) (hatch edge 0.508)
(connect_pads (clearance 0.2))
(min_thickness 0.2)
(fill (arc_segments 16) (thermal_gap 0.2) (thermal_bridge_width 0.4))
@@ -6849,7 +7027,7 @@
)
)
)
- (zone (net 47) (net_name GND) (layer 1_top) (tstamp 5B79CB29) (hatch edge 0.508)
+ (zone (net 47) (net_name GND) (layer 1_top) (tstamp 5BD00437) (hatch edge 0.508)
(connect_pads (clearance 0.2))
(min_thickness 0.2)
(fill (arc_segments 16) (thermal_gap 0.2) (thermal_bridge_width 0.4))
@@ -6859,7 +7037,7 @@
)
)
)
- (zone (net 0) (net_name "") (layer B.SilkS) (tstamp 5B79CB26) (hatch edge 0.508)
+ (zone (net 0) (net_name "") (layer B.SilkS) (tstamp 5BD00434) (hatch edge 0.508)
(connect_pads (clearance 0.2))
(min_thickness 0.2)
(fill (arc_segments 16) (thermal_gap 0.2) (thermal_bridge_width 0.4))
@@ -6870,7 +7048,7 @@
)
)
)
- (zone (net 99) (net_name /hackrf_if/VBUS) (layer 2_pwr) (tstamp 5B79CB23) (hatch edge 0.508)
+ (zone (net 99) (net_name /hackrf_if/VBUS) (layer 2_pwr) (tstamp 5BD00431) (hatch edge 0.508)
(priority 2)
(connect_pads (clearance 0.2))
(min_thickness 0.2)
@@ -6881,7 +7059,7 @@
)
)
)
- (zone (net 72) (net_name /power/AUDIO_SVDD) (layer 2_pwr) (tstamp 5B79CB20) (hatch edge 0.508)
+ (zone (net 72) (net_name /power/AUDIO_SVDD) (layer 2_pwr) (tstamp 5BD0042E) (hatch edge 0.508)
(priority 3)
(connect_pads (clearance 0.2))
(min_thickness 0.2)
@@ -6894,7 +7072,7 @@
)
)
)
- (zone (net 47) (net_name GND) (layer 4_bot) (tstamp 5B79CB1D) (hatch edge 0.508)
+ (zone (net 47) (net_name GND) (layer 4_bot) (tstamp 5BD0042B) (hatch edge 0.508)
(connect_pads (clearance 0.2))
(min_thickness 0.2)
(fill (arc_segments 16) (thermal_gap 0.2) (thermal_bridge_width 0.4))
@@ -6913,7 +7091,7 @@
)
)
)
- (zone (net 99) (net_name /hackrf_if/VBUS) (layer 4_bot) (tstamp 5B79CB1A) (hatch edge 0.508)
+ (zone (net 99) (net_name /hackrf_if/VBUS) (layer 4_bot) (tstamp 5BD00428) (hatch edge 0.508)
(connect_pads (clearance 0.2))
(min_thickness 0.2)
(fill (arc_segments 16) (thermal_gap 0.2) (thermal_bridge_width 0.4))
@@ -6923,7 +7101,7 @@
)
)
)
- (zone (net 47) (net_name GND) (layer 4_bot) (tstamp 5B79CB17) (hatch edge 0.508)
+ (zone (net 47) (net_name GND) (layer 4_bot) (tstamp 5BD00425) (hatch edge 0.508)
(connect_pads (clearance 0.2))
(min_thickness 0.2)
(fill (arc_segments 16) (thermal_gap 0.2) (thermal_bridge_width 0.4))
@@ -6933,7 +7111,7 @@
)
)
)
- (zone (net 47) (net_name GND) (layer 4_bot) (tstamp 5B79CB14) (hatch edge 0.508)
+ (zone (net 47) (net_name GND) (layer 4_bot) (tstamp 5BD00422) (hatch edge 0.508)
(connect_pads (clearance 0.2))
(min_thickness 0.2)
(fill (arc_segments 16) (thermal_gap 0.2) (thermal_bridge_width 0.4))
@@ -6943,7 +7121,7 @@
)
)
)
- (zone (net 47) (net_name GND) (layer 4_bot) (tstamp 5B79CB11) (hatch edge 0.508)
+ (zone (net 47) (net_name GND) (layer 4_bot) (tstamp 5BD0041F) (hatch edge 0.508)
(connect_pads (clearance 0.2))
(min_thickness 0.2)
(fill (arc_segments 16) (thermal_gap 0.2) (thermal_bridge_width 0.4))
@@ -6953,7 +7131,7 @@
)
)
)
- (zone (net 72) (net_name /power/AUDIO_SVDD) (layer 4_bot) (tstamp 5B79CB0E) (hatch edge 0.508)
+ (zone (net 72) (net_name /power/AUDIO_SVDD) (layer 4_bot) (tstamp 5BD0041C) (hatch edge 0.508)
(connect_pads (clearance 0.2))
(min_thickness 0.2)
(fill (arc_segments 16) (thermal_gap 0.2) (thermal_bridge_width 0.4))
@@ -6963,7 +7141,7 @@
)
)
)
- (zone (net 72) (net_name /power/AUDIO_SVDD) (layer 4_bot) (tstamp 5B79CB0B) (hatch edge 0.508)
+ (zone (net 72) (net_name /power/AUDIO_SVDD) (layer 4_bot) (tstamp 5BD00419) (hatch edge 0.508)
(connect_pads (clearance 0.2))
(min_thickness 0.2)
(fill (arc_segments 16) (thermal_gap 0.2) (thermal_bridge_width 0.4))
@@ -6973,7 +7151,7 @@
)
)
)
- (zone (net 47) (net_name GND) (layer 4_bot) (tstamp 5B79CB08) (hatch edge 0.508)
+ (zone (net 47) (net_name GND) (layer 4_bot) (tstamp 5BD00416) (hatch edge 0.508)
(connect_pads (clearance 0.2))
(min_thickness 0.2)
(fill (arc_segments 16) (thermal_gap 0.2) (thermal_bridge_width 0.4))
@@ -6983,7 +7161,7 @@
)
)
)
- (zone (net 47) (net_name GND) (layer 4_bot) (tstamp 5B79CB05) (hatch edge 0.508)
+ (zone (net 47) (net_name GND) (layer 4_bot) (tstamp 5BD00413) (hatch edge 0.508)
(connect_pads (clearance 0.2))
(min_thickness 0.2)
(fill (arc_segments 16) (thermal_gap 0.2) (thermal_bridge_width 0.4))
@@ -6995,7 +7173,7 @@
)
)
)
- (zone (net 118) (net_name /power/BBAT) (layer 4_bot) (tstamp 5B79CB02) (hatch edge 0.508)
+ (zone (net 118) (net_name /power/BBAT) (layer 4_bot) (tstamp 5BD00410) (hatch edge 0.508)
(connect_pads (clearance 0.2))
(min_thickness 0.2)
(fill (arc_segments 16) (thermal_gap 0.2) (thermal_bridge_width 0.4))
@@ -7007,7 +7185,7 @@
)
)
)
- (zone (net 47) (net_name GND) (layer 4_bot) (tstamp 5B79CAFF) (hatch edge 0.508)
+ (zone (net 47) (net_name GND) (layer 4_bot) (tstamp 5BD0040D) (hatch edge 0.508)
(connect_pads (clearance 0.2))
(min_thickness 0.2)
(fill (arc_segments 16) (thermal_gap 0.2) (thermal_bridge_width 0.4))
@@ -7017,7 +7195,7 @@
)
)
)
- (zone (net 99) (net_name /hackrf_if/VBUS) (layer 4_bot) (tstamp 5B79CAFC) (hatch edge 0.508)
+ (zone (net 99) (net_name /hackrf_if/VBUS) (layer 4_bot) (tstamp 5BD0040A) (hatch edge 0.508)
(connect_pads (clearance 0.2))
(min_thickness 0.2)
(fill (arc_segments 16) (thermal_gap 0.2) (thermal_bridge_width 0.4))
@@ -7027,7 +7205,7 @@
)
)
)
- (zone (net 72) (net_name /power/AUDIO_SVDD) (layer 4_bot) (tstamp 5B79CAF9) (hatch edge 0.508)
+ (zone (net 72) (net_name /power/AUDIO_SVDD) (layer 4_bot) (tstamp 5BD00407) (hatch edge 0.508)
(priority 1)
(connect_pads (clearance 0.2))
(min_thickness 0.2)
@@ -7038,7 +7216,7 @@
)
)
)
- (zone (net 47) (net_name GND) (layer 4_bot) (tstamp 5B79CAF6) (hatch edge 0.508)
+ (zone (net 47) (net_name GND) (layer 4_bot) (tstamp 5BD00404) (hatch edge 0.508)
(connect_pads (clearance 0.2))
(min_thickness 0.2)
(fill (arc_segments 16) (thermal_gap 0.2) (thermal_bridge_width 0.4))
@@ -7048,7 +7226,7 @@
)
)
)
- (zone (net 121) (net_name +3V3) (layer 4_bot) (tstamp 5B79CAF3) (hatch edge 0.508)
+ (zone (net 121) (net_name +3V3) (layer 4_bot) (tstamp 5BD00401) (hatch edge 0.508)
(connect_pads (clearance 0.2))
(min_thickness 0.2)
(fill (arc_segments 16) (thermal_gap 0.2) (thermal_bridge_width 0.4))
@@ -7058,7 +7236,7 @@
)
)
)
- (zone (net 121) (net_name +3V3) (layer 4_bot) (tstamp 5B79CAF0) (hatch edge 0.508)
+ (zone (net 121) (net_name +3V3) (layer 4_bot) (tstamp 5BD003FE) (hatch edge 0.508)
(connect_pads (clearance 0.2))
(min_thickness 0.2)
(fill (arc_segments 16) (thermal_gap 0.2) (thermal_bridge_width 0.4))
@@ -7068,7 +7246,7 @@
)
)
)
- (zone (net 47) (net_name GND) (layer 4_bot) (tstamp 5B79CAED) (hatch edge 0.508)
+ (zone (net 47) (net_name GND) (layer 4_bot) (tstamp 5BD003FB) (hatch edge 0.508)
(connect_pads (clearance 0.2))
(min_thickness 0.2)
(fill (arc_segments 16) (thermal_gap 0.2) (thermal_bridge_width 0.4))
@@ -7078,7 +7256,7 @@
)
)
)
- (zone (net 47) (net_name GND) (layer 4_bot) (tstamp 5B79CAEA) (hatch edge 0.508)
+ (zone (net 47) (net_name GND) (layer 4_bot) (tstamp 5BD003F8) (hatch edge 0.508)
(connect_pads (clearance 0.2))
(min_thickness 0.2)
(fill (arc_segments 16) (thermal_gap 0.2) (thermal_bridge_width 0.4))
@@ -7090,7 +7268,7 @@
)
)
)
- (zone (net 122) (net_name +1V8) (layer 2_pwr) (tstamp 5B79CAE7) (hatch edge 0.508)
+ (zone (net 122) (net_name +1V8) (layer 2_pwr) (tstamp 5BD003F5) (hatch edge 0.508)
(priority 2)
(connect_pads (clearance 0.2))
(min_thickness 0.2)
@@ -7103,7 +7281,7 @@
)
)
)
- (zone (net 47) (net_name GND) (layer 4_bot) (tstamp 5B79CAE4) (hatch edge 0.508)
+ (zone (net 47) (net_name GND) (layer 4_bot) (tstamp 5BD003F2) (hatch edge 0.508)
(priority 2)
(connect_pads (clearance 0.2))
(min_thickness 0.2)
@@ -7115,7 +7293,7 @@
)
)
)
- (zone (net 121) (net_name +3V3) (layer 4_bot) (tstamp 5B79CAE1) (hatch edge 0.508)
+ (zone (net 121) (net_name +3V3) (layer 4_bot) (tstamp 5BD003EF) (hatch edge 0.508)
(priority 3)
(connect_pads (clearance 0.2))
(min_thickness 0.2)
@@ -7126,7 +7304,7 @@
)
)
)
- (zone (net 47) (net_name GND) (layer 4_bot) (tstamp 5B79CADE) (hatch edge 0.508)
+ (zone (net 47) (net_name GND) (layer 4_bot) (tstamp 5BD003EC) (hatch edge 0.508)
(priority 3)
(connect_pads (clearance 0.2))
(min_thickness 0.2)
@@ -7137,7 +7315,7 @@
)
)
)
- (zone (net 121) (net_name +3V3) (layer 4_bot) (tstamp 5B79CADB) (hatch edge 0.508)
+ (zone (net 121) (net_name +3V3) (layer 4_bot) (tstamp 5BD003E9) (hatch edge 0.508)
(priority 3)
(connect_pads (clearance 0.2))
(min_thickness 0.2)
diff --git a/hardware/portapack_h1/portapack_h1.net b/hardware/portapack_h1/portapack_h1.net
index eac64e412857b9585184f9b6791e7ccd2912ad77..a1dadaf0385f1f423087f21816a229294e3554a0 100644
--- a/hardware/portapack_h1/portapack_h1.net
+++ b/hardware/portapack_h1/portapack_h1.net
@@ -1,14 +1,14 @@
(export (version D)
(design
(source /home/jboone/src/portapack-hackrf/hardware/portapack_h1/portapack_h1.sch)
- (date "Sun 19 Aug 2018 12:51:43 PM PDT")
- (tool "Eeschema 5.0.0-fee4fd1~66~ubuntu18.04.1")
+ (date "Thu 25 Oct 2018 10:48:17 AM PDT")
+ (tool "Eeschema 5.0.1-33cea8e~68~ubuntu18.04.1")
(sheet (number 1) (name /) (tstamps /)
(title_block
(title "PortaPack H1")
(company "ShareBrained Technology, Inc.")
- (rev 20180819)
- (date 2018-08-19)
+ (rev 20181025)
+ (date 2018-10-25)
(source portapack_h1.sch)
(comment (number 1) (value "Copyright © 2014-2018 Jared Boone"))
(comment (number 2) (value "License: GNU General Public License, version 2"))
@@ -18,8 +18,8 @@
(title_block
(title "PortaPack H1")
(company "ShareBrained Technology, Inc.")
- (rev 20180819)
- (date 2018-08-19)
+ (rev 20181025)
+ (date 2018-10-25)
(source audio.sch)
(comment (number 1) (value "Copyright © 2014-2018 Jared Boone"))
(comment (number 2) (value "License: GNU General Public License, version 2"))
@@ -29,8 +29,8 @@
(title_block
(title "PortaPack H1")
(company "ShareBrained Technology, Inc.")
- (rev 20180819)
- (date 2018-08-19)
+ (rev 20181025)
+ (date 2018-10-25)
(source lcd_sw_sd.sch)
(comment (number 1) (value "Copyright © 2014-2018 Jared Boone"))
(comment (number 2) (value "License: GNU General Public License, version 2"))
@@ -40,8 +40,8 @@
(title_block
(title "PortaPack H1")
(company "ShareBrained Technology, Inc.")
- (rev 20180819)
- (date 2018-08-19)
+ (rev 20181025)
+ (date 2018-10-25)
(source hackrf_if.sch)
(comment (number 1) (value "Copyright © 2014-2018 Jared Boone"))
(comment (number 2) (value "License: GNU General Public License, version 2"))
@@ -51,8 +51,8 @@
(title_block
(title "PortaPack H1")
(company "ShareBrained Technology, Inc.")
- (rev 20180819)
- (date 2018-08-19)
+ (rev 20181025)
+ (date 2018-10-25)
(source power.sch)
(comment (number 1) (value "Copyright © 2014-2018 Jared Boone"))
(comment (number 2) (value "License: GNU General Public License, version 2"))
@@ -62,8 +62,8 @@
(title_block
(title "PortaPack H1")
(company "ShareBrained Technology, Inc.")
- (rev 20180819)
- (date 2018-08-19)
+ (rev 20181025)
+ (date 2018-10-25)
(source gps.sch)
(comment (number 1) (value "Copyright © 2014-2018 Jared Boone"))
(comment (number 2) (value "License: GNU General Public License, version 2"))
@@ -850,12 +850,10 @@
(tstamp 5B682C91))
(comp (ref R22)
(value 33R)
- (footprint ipc_resc:IPC_RESC160X80X55L25N)
+ (footprint ipc_resc:IPC_RESC100X50X40L25N)
(datasheet ~)
(fields
- (field (name DNP) DNP)
- (field (name Mfr) Yageo)
- (field (name Part) RC0603FR-0733RL))
+ (field (name DNP) DNP))
(libsource (lib Device) (part R) (description Resistor))
(sheetpath (names /power/) (tstamps /58CFF3E3/))
(tstamp 5B682CA2))
@@ -894,12 +892,12 @@
(sheetpath (names /power/) (tstamps /58CFF3E3/))
(tstamp 5B682CCB))
(comp (ref R21)
- (value 33R)
- (footprint ipc_resc:IPC_RESC160X80X55L25N)
+ (value 100R)
+ (footprint ipc_resc:IPC_RESC100X50X40L25N)
(datasheet ~)
(fields
(field (name Mfr) Yageo)
- (field (name Part) RC0603FR-0733RL))
+ (field (name Part) RC0402FR-07100RL))
(libsource (lib Device) (part R) (description Resistor))
(sheetpath (names /power/) (tstamps /58CFF3E3/))
(tstamp 5B682CD3))
diff --git a/hardware/portapack_h1/portapack_h1.pdf b/hardware/portapack_h1/portapack_h1.pdf
index d17471d797f507d65a63d326582183c3fed473fa..0ae7d1469f82ee8818fb8c959212e0d5ca3c0a81 100644
Binary files a/hardware/portapack_h1/portapack_h1.pdf and b/hardware/portapack_h1/portapack_h1.pdf differ
diff --git a/hardware/portapack_h1/portapack_h1.sch b/hardware/portapack_h1/portapack_h1.sch
index 0d279e1bcc38987f30a4140e785de20fd5d8c17b..94352d6028bf83d828468190b93bf41fd61b2b11 100644
--- a/hardware/portapack_h1/portapack_h1.sch
+++ b/hardware/portapack_h1/portapack_h1.sch
@@ -6,8 +6,8 @@ $Descr A4 11693 8268
encoding utf-8
Sheet 1 6
Title "PortaPack H1"
-Date "2018-08-20"
-Rev "20180820"
+Date "2018-10-29"
+Rev "20181029"
Comp "ShareBrained Technology, Inc."
Comment1 "Copyright © 2014-2018 Jared Boone"
Comment2 "License: GNU General Public License, version 2"
diff --git a/hardware/portapack_h1/power.sch b/hardware/portapack_h1/power.sch
index c25c4e6a5e20b4b19cf866d8563ec89681f5093d..a61c070f4a3b9584f551259908e79f6012ab7c04 100644
--- a/hardware/portapack_h1/power.sch
+++ b/hardware/portapack_h1/power.sch
@@ -6,8 +6,8 @@ $Descr A4 11693 8268
encoding utf-8
Sheet 5 6
Title "PortaPack H1"
-Date "2018-08-20"
-Rev "20180820"
+Date "2018-10-29"
+Rev "20181029"
Comp "ShareBrained Technology, Inc."
Comment1 "Copyright © 2014-2018 Jared Boone"
Comment2 "License: GNU General Public License, version 2"
@@ -878,11 +878,9 @@ AR Path="/53A8C780/5B682CA2" Ref="R?" Part="1"
AR Path="/58CFF3E3/5B682CA2" Ref="R22" Part="1"
F 0 "R22" V 4050 6500 50 0000 C CNN
F 1 "33R" V 4034 6500 50 0001 C CNN
-F 2 "ipc_resc:IPC_RESC160X80X55L25N" V 4080 6500 50 0001 C CNN
+F 2 "ipc_resc:IPC_RESC100X50X40L25N" V 4080 6500 50 0001 C CNN
F 3 "~" H 4150 6500 50 0001 C CNN
F 4 "DNP" V 4150 6500 50 0000 C CNN "DNP"
-F 5 "Yageo" V 4150 6500 50 0001 C CNN "Mfr"
-F 6 "RC0603FR-0733RL" V 4150 6500 50 0001 C CNN "Part"
1 4150 6500
0 1 1 0
$EndComp
@@ -974,11 +972,11 @@ P 3550 7200
AR Path="/53A8C780/5B682CD3" Ref="R?" Part="1"
AR Path="/58CFF3E3/5B682CD3" Ref="R21" Part="1"
F 0 "R21" V 3450 7200 50 0000 C CNN
-F 1 "33R" V 3550 7200 50 0000 C CNN
-F 2 "ipc_resc:IPC_RESC160X80X55L25N" V 3480 7200 50 0001 C CNN
+F 1 "100R" V 3550 7200 50 0000 C CNN
+F 2 "ipc_resc:IPC_RESC100X50X40L25N" V 3480 7200 50 0001 C CNN
F 3 "~" H 3550 7200 50 0001 C CNN
F 4 "Yageo" V 3550 7200 50 0001 C CNN "Mfr"
-F 5 "RC0603FR-0733RL" V 3550 7200 50 0001 C CNN "Part"
+F 5 "RC0402FR-07100RL" V 3550 7200 50 0001 C CNN "Part"
1 3550 7200
0 1 1 0
$EndComp